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* PM: Resonant Clocking Enablement - InfrastructureChristopher M. Riedl2017-04-144-29/+317
* PM: Tools update for verification of HOMER.Prem Shanker Jha2017-04-131-1/+2
* Added RCD Protect time and MNFG Flag check to unmask functionMatthew Hickman2017-04-133-27/+231
* Updates to p9_extract_sbe_rcSoma BhanuTej2017-04-132-158/+190
* p9_htm_setup -- cleanup start behavior for multi-chip systemsJoe McGill2017-04-132-24/+15
* Enable PGPE reset & init in the PM reset-init flowGreg Still2017-04-136-9/+11
* PM: Res. Clocking Enablement - Infrastructure (new file for HB mirror)Christopher M. Riedl2017-04-131-0/+24
* Change RingID to RingId_t in putRingKahn Evans2017-04-111-3/+2
* Add another writeBit API, modify getBit. Add unit tests.Andre Marin2017-04-111-4/+30
* Fix missing CHI DMI scom addresses.Ben Gass2017-04-111-2/+4
* Adding in p9_ss_pll_sync procedure as well as add it it to tod_wrap wrapperCHRISTINA L. GRAVES2017-04-111-1/+2
* Need to disable fast path and cmd bypass for HB loadDean Sanner2017-04-101-2/+21
* Add const to the end of spd decoder methods to denote unchanged mem varsAndre Marin2017-04-1012-408/+408
* Use PROC_SBE_IS_MASTER ATTR to determine if proc is mastercrgeddes2017-04-071-8/+6
* L3 procedure work for p9_mss_draminit_trainingJacob Harvey2017-04-0710-100/+358
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-04-071-1/+1
* First pass updates of scominfo for Cumulus.Ben Gass2017-04-073-70/+380
* Update filter pll settings as per HW407180Ben Gass2017-04-071-0/+18
* Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabledCHRISTINA L. GRAVES2017-04-073-2/+28
* Updating L3 LCO watermarks for HW406803Luke Murray2017-04-071-0/+17
* literal definitionsAnusha Reddy Rangareddygari2017-04-071-4/+5
* Fix for read modify write.Santosh Balasubramanian2017-04-071-0/+4
* Build p9n 10 and 20 by default.Ben Gass2017-04-0716-1269/+3510
* Removed deconfig for dcd failsStephen Glancy2017-04-071-3/+0
* add TARGET_TYPE_MCMatt K. Light2017-04-062-4/+8
* Add empty zqcal files for HB to mirrorAndre Marin2017-04-062-0/+48
* Adding good LCO settings to initfileLuke Murray2017-04-061-0/+41
* io scom access conversionChris Steffen2017-04-062-26/+37
* P9 I/O Read Erepair Level 2Chris Steffen2017-04-062-12/+48
* I/O Xbus Read / Restore eRepair L1 ProceduresChris Steffen2017-04-063-0/+167
* STOP: move DPLL setup to SGPE initYue Du2017-04-051-0/+22
* STOP: clear PCBMUX disable from STOP Exit instead of SGPE INITYue Du2017-04-051-11/+0
* LFIR masks changesSangeetha T S2017-04-041-12/+12
* Fix compile warnings from trace statementsAravind T Nair2017-04-021-3/+3
* PM Complex Suspend and Safe ModeRahul Batra2017-04-021-2/+3
* PM: Design changes in SGPE Boot copier and boot loader.Prem Shanker Jha2017-04-024-4/+31
* update DPLL and IVRM initsJoe McGill2017-04-021-0/+56
* Register data collection in FFDCSangeetha T S2017-04-029-93/+141
* HW405243/IPL: Assert/drop pcb_mux_disable around quad power offYue Du2017-04-021-5/+23
* Fixed blue waterfall's error messageStephen Glancy2017-04-021-1/+1
* Change base decoder, add ddr4 namespace, and common API btw modulesAndre Marin2017-04-0213-439/+410
* Fixed blue waterfall workaround bugsStephen Glancy2017-04-024-21/+4
* Disable ECC Hash in simAndre Marin2017-04-021-2/+6
* Updates DCD to pass on a/b failureStephen Glancy2017-03-311-6/+8
* 2n settings in mca keyed off attributesShelton Leung2017-03-292-21/+45
* Add DDR3 SPD files for HB to mirror. Remove unused centaur SPD empty files.Andre Marin2017-03-293-72/+0
* Defining generic RingId_t type for transitional eCMD releaseKahn Evans2017-03-291-0/+1
* HW404292: Assert analog fence in cache_chiplet_resetYue Du2017-03-291-0/+2
* support customization of Nimbus DD1 PCI reference clock speedJoe McGill2017-03-292-0/+14
* Add base spd decoder to share among controllersAndre Marin2017-03-2729-409/+1141
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