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* security -- split p9_chiplet_scominit and p9_chiplet_enable_ridi istepsJoe McGill2017-05-2210-103/+462
* WOF: Phase 1 FixesRahul Batra2017-05-191-0/+2
* Level 3 : OCB & OCC proceduresSangeetha T S2017-05-1913-135/+291
* p9_throttle_sync -- initial version for CumulusPeng Fei GOU2017-05-172-67/+206
* Init I/O Attributes to ZeroChris Steffen2017-05-172-0/+11
* Enablement of n3_br_fure ring for Nimbus DD2Sumit Kumar2017-05-153-7/+9
* Fixed mcbist error output with nibble/byte mapMatthew Hickman2017-05-151-0/+13
* Remove tracing from FFDC class c'torsSantosh Puranik2017-05-121-1/+1
* moving thread_mode to scan init, new dd2 dial is scanonlyEmmanuel Sacristan2017-05-121-125/+3
* Pstate: Remove legacy VDM codeChristopher M. Riedl2017-05-122-2/+8
* Fixes required to build P9 STOP API with skibootDan Crowell2017-05-125-63/+66
* P9 Pstate: VREF calibration suportPrasad Bg Ranganath2017-05-122-0/+50
* p9.int.scan.initfile -- init PSIHB to LSI modeJoe McGill2017-05-121-0/+17
* Update INT DD2 initfilesDavid Kauer2017-05-122-36/+115
* Updates for P9 NX DD2 initfilesChris Hanudel2017-05-122-68/+106
* Add DLL workaround and unit testsAndre Marin2017-05-129-82/+780
* NMMU Nimbus dd2 scom/scan updates, updated commentsEmmanuel Sacristan2017-05-122-37/+304
* Implementing Michael Floyds improvements.Michael Koch2017-05-121-5/+37
* Added DQS alignment workaroundStephen Glancy2017-05-129-27/+719
* Move index API to generic/memory folderAndre Marin2017-05-129-16/+36
* Add PHY sequencer refresh settings after draminitAndre Marin2017-05-1211-15/+418
* H-code ddLevel support - Front-end hooks for user and back-end codes.Claus Michael Olsen2017-05-114-11/+113
* Adjusting mcd cl probe rate from 300->1000 cyclesJenny Huynh2017-05-111-1/+1
* Pstate: Resonant Clocking Enablement - CME HcodeChristopher M. Riedl2017-05-111-9/+10
* p9.xbus.pll.scan.initfile -- restore full frequency settings for Nimbus DD2+Joe McGill2017-05-111-0/+18
* dd2 initsShelton Leung2017-05-115-73/+656
* ADU Level 3 code, changed owner to Josh, and added commentsCHRISTINA L. GRAVES2017-05-074-202/+304
* IO Xbus Scominit Reset FixChris Steffen2017-05-071-10/+6
* Fixes RD VREF runtime calculationStephen Glancy2017-05-073-4/+8
* p9_nv_ref_clk_enable -- shift NV refclock field programmingJoe McGill2017-05-062-6/+13
* Reserving HTM QueuesThi Tran2017-05-064-233/+483
* xip_customize: Undoing re-introduced bugs of commit 34210 (VPD ECClaus Michael Olsen2017-05-051-1/+2
* Add empty DQS alignment workaroundsAndre Marin2017-05-052-0/+48
* jgr17042800 Updated Obus scom initfileJohn Rell2017-05-051-0/+14
* derate NVLINK frequency for Nimbus DD1Joe McGill2017-05-051-0/+17
* Performance updates for HW409069Luke Murray2017-05-051-0/+25
* Cumulus update: p9_mss_eff_grouping HWPThi Tran2017-05-052-109/+61
* Cumulus update: p9_mss_setup_bars HWPThi Tran2017-05-052-405/+558
* p9_mss_setup_bars -- customize interleave granularityJoe McGill2017-05-055-0/+87
* performance settings for best dd1 bw and latency, some risk level 100Shelton Leung2017-05-052-44/+319
* p9_fbc_eff_config -- default PBIEQ settings to performance modeJoe McGill2017-05-042-21/+22
* PGPE: WOF Calculation Phase 1Rahul Batra2017-05-041-1/+1
* L3 review - p9_mss_setup_bars HWPThi Tran2017-05-042-41/+75
* WOF: Additional fields needed in OCC Pstate Parameter block for WOFPrasad Bg Ranganath2017-05-046-38/+303
* WOF: VRM timing, WOF and VDM enblement attributes additionsPrasad Bg Ranganath2017-05-038-176/+489
* Correct PState and Stop GPE polling period to 500ms vs 500usBrian Vanderpool2017-05-032-4/+5
* p9_mss_eff_grouping - Fix memory hole start/end addressesThi Tran2017-05-031-30/+21
* p9_sbe_chiplet_reset: Revert NX_1 hang pulse back to 34sJoachim Fenkes2017-05-031-1/+0
* Change RD_CTR workaround val and update attr nameJacob Harvey2017-05-033-13/+13
* L3 initfile updatesAlex Taft2017-05-031-17/+18
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