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* tp/nest reset: add INEX scan type in non-gptr/time/repr scan0 operationJoe Dery2017-03-131-1/+1
* Modifications to reset/init proceduresSangeetha T S2017-03-136-81/+79
* Add 500us delay after RESET_n & turn on clks before RESET_n to meet JEDEC specAndre Marin2017-03-132-9/+23
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-03-106-39/+39
* Add ec_abst ring to p9n.hw_imageThi Tran2017-03-104-3/+30
* ffdc length handlingspashabk-in2017-03-101-9/+31
* Meshctrl setup updateAnusha Reddy Rangareddygari2017-03-101-1/+6
* ADU HWP updates for CI support, performanceCHRISTINA L. GRAVES2017-03-105-80/+98
* Add Secure Access Bit to Bootloader Config DataStephen Cprek2017-03-101-1/+11
* HW405413 : NCU sends data out of orderAlex Taft2017-03-091-0/+17
* Scrubbing needs to stay off for DD2, bug HW405443Juan Medina2017-03-091-1/+2
* PM: GPE timer fix (HW389045 - Update Shadow copy of TSEL)Greg Still2017-03-091-0/+17
* Set NDL IOValids based on configured NV links.Ben Gass2017-03-092-0/+126
* adding non hostboot mode to run_iplJoshua Hannan2017-03-091-1/+1
* p9_tor: cleanup - use p9_ringid_get_chiplet_properties()Martin Peschke2017-03-091-141/+16
* Masking RNG fir bits for HW403701Jenny Huynh2017-03-091-44/+226
* PM: Added SCOM restore region in extracted QPMR binary.Prem Shanker Jha2017-03-091-3/+5
* PM: Fix PGPE GPPB downloadGreg Still2017-03-081-0/+2
* STOP: SGPE(image/bootloader) and OCC Start Addr CHANGE in SRAMYue Du2017-03-082-6/+12
* tuned down odt wr delay valuesShelton Leung2017-03-082-4/+4
* p9_ringId: reorder CHIPLET_TYPE enum entriesMartin Peschke2017-03-081-4/+5
* PM: VPD in #V order and Natural OrderGreg Still2017-03-082-378/+420
* Deconfigure MCA if there is a VPD load errorLouis Stermole2017-03-082-21/+69
* p9_fab_iovalid -- invoke link validation subroutineJoe McGill2017-03-071-1/+9
* PM: Addressed various observations on Hcode Image BuildPrem Shanker Jha2017-03-074-2743/+2827
* Add errors for p9_chiplet_scominitBen Gass2017-03-071-0/+35
* Hcode: Create centralized memory map headersYue Du2017-03-0612-3084/+3565
* nest_attributes.xml -- add 'effective' FBC group/chip ID attributesJoe McGill2017-03-062-1/+46
* STOP: update image build as epsilon settings updated via 36814Yue Du2017-03-061-61/+23
* IO Xbus Post Training Mfg CheckChris Steffen2017-03-065-80/+193
* Enable regular wakeup after a quad is powered offcrgeddes2017-03-061-0/+8
* p9_tor: fix some random bytes in TOR imageMartin Peschke2017-03-061-0/+6
* Added DCD calibration empty filesStephen Glancy2017-03-062-0/+74
* Update Evaluator to eliminate duplicate buffer insertsRichard J. Knight2017-03-031-24/+0
* ana_bndy RS4v2 algorithm support in ring_apply to accommodate properClaus Michael Olsen2017-03-033-218/+223
* Clean up RC0E in mss::eff_dimmJacob Harvey2017-03-034-26/+35
* Adding RMA BAR, Fix to MMIOBARJuan Medina2017-03-031-4/+15
* Add x8s to address translation tableAndre Marin2017-03-032-142/+1169
* Simplify spd factory mapping to share among controllersAndre Marin2017-03-031-7/+7
* Adding in default raw card informationJacob Harvey2017-03-031-12/+23
* Add c_str generic API and update makefilesAndre Marin2017-03-034-4/+4
* Cleaned up spd decoder interface, preparing for common code with CumulusAndre Marin2017-03-031-1/+1
* Add DP16 API and unit testing needed to set PBA mode for LRDIMMsAndre Marin2017-03-031-56/+67
* Move MRS attributes to eff_config to calc LRDIMMsJacob Harvey2017-03-031-1/+7
* Add BCW API for rank presence, buffer training, mrep timing and UTs.Andre Marin2017-03-031-0/+449
* Change R17/R16 bits for 1R DIMM config depending on slot configsBrian Silver2017-03-031-4/+4
* Add common functionality between RCD and data buffer control word APIAndre Marin2017-03-031-0/+347
* Add LRDIMM to translation register infrastructure and unit tests.Andre Marin2017-03-032-622/+1361
* Fix RCW infrastructure for LRDIMM and RDIMMsAndre Marin2017-03-031-17/+61
* Add LRDIMM SPD revision tableAndre Marin2017-03-031-82/+264
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