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* Add ATTR_REL_POS for all units and dimmsDan Crowell2018-08-311-0/+39
* Verify EQ/EX/Core clock/power statesPrasad Bg Ranganath2018-08-303-13/+869
* Revert "Verify Clock/power state on non functional EX/Core/quad chiplets"Jennifer A. Stofer2018-08-302-743/+1
* Verify Clock/power state on non functional EX/Core/quad chipletsPrasad Bg Ranganath2018-08-302-3/+745
* Modify the getFfdc routine to consider the SBE procRichard J. Knight2018-08-293-10/+165
* eRepair: Fix to invalidate vpd records correctlySumit Kumar2018-08-293-2/+49
* Update p9_sbe_i2c_bit_rate_divisor_setting to set I2C Rate Valid bitBill Hoffa2018-08-291-1/+13
* UV Support: Updated HWP to set runtime wakeup mode.Prem Shanker Jha2018-08-293-11/+8
* Add TLBIE WATNick Klazynski2018-08-291-0/+17
* Moves generic xml directories to be in generic/proceduresStephen Glancy2018-08-282-1/+27
* Implement exp_check_for_readyAndre Marin2018-08-283-31/+95
* SMP Abus PPE WorkaroundChris Steffen2018-08-287-8/+148
* prevent NVDL recal_abort to OBUS PHY during SMP usageJoe McGill2018-08-281-12/+28
* Add option to increase VREF step in p9c characterization shmooLouis Stermole2018-08-271-0/+10
* SW442214 - Turn off Cache Inject for FleetwoodRicardo Mata2018-08-241-8/+21
* Workaround for SW440224Nick Klazynski2018-08-241-0/+2
* Restore DRAM repairs function not deploying port0 spareRichard J. Knight2018-08-241-1/+1
* Avoid enabling smf bits in nmmu logic for P9Jenny Huynh2018-08-231-17/+0
* SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)Greg Still2018-08-221-0/+2
* Clear Spare Lane on MC instead of DMIChris Steffen2018-08-221-1/+3
* Centaur_Register_List.csv: Updating it to hostboot levelPrachi Gupta2018-08-221-3/+4
* Secure Boot: Centaur Security: Initial sensitive register listSantosh Balasubramanian2018-08-221-0/+143
* New empty fileSantosh Balasubramanian2018-08-221-0/+0
* Remove Centaur_Register_List.csv due to mirror issuesRichard J. Knight2018-08-221-115/+0
* Enable Core compatability Mode; Add HW443669Nick Klazynski2018-08-211-0/+41
* Fixes p9c's training's swizzle of known bad bitsStephen Glancy2018-08-211-16/+12
* UV Support: HWP inits runtime wakeup mode for each functional core.Prem Shanker Jha2018-08-213-0/+177
* Introducing lpc utils source filespashabk-in2018-08-212-0/+26
* Added I2C fields, EXP_FW_STATUS APIAndre Marin2018-08-213-21/+41
* Infrastructure support for new MC OMI rings for AxoneClaus Michael Olsen2018-08-214-19/+88
* Mask ut=0 and ut=1 mmio bad cmd/length/alignRyan Black2018-08-201-0/+110
* Moves conversions to be in the generic code spaceStephen Glancy2018-08-2031-265/+508
* nest updates for p9c DD1.3 native and p9c DD1.2 compatibility modesJoe McGill2018-08-208-27/+102
* Updates to permit synchronized SS PLL spreading via TODJoe McGill2018-08-205-3/+203
* p9_scominfo update OMI order to logically follow MC->MI->MCC instead of OMICBen Gass2018-08-201-48/+58
* Reduce size of generic_shmoo class in firmwareLouis Stermole2018-08-203-582/+484
* Fixes Centaur training advanced to unmask errors when disabledStephen Glancy2018-08-202-5/+6
* Documentation for attribute xml tagsDan Crowell2018-08-201-0/+163
* SCOM Restore: Increased max eq scom restores entries supported to 255.Prem Shanker Jha2018-08-202-4/+6
* p9_fab_iovalid -- enhance half-link fail determinationJoe McGill2018-08-201-7/+16
* Set SMP Abus Rx AC Coupled at DccalChris Steffen2018-08-202-5/+25
* Adding a fapi_assert to flag error if PPE is not halted.Anusha Reddy Rangareddygari2018-08-202-4/+41
* Applying CTLE Coarse if SMP Abus ConfigChris Steffen2018-08-201-22/+20
* jgr18081500 ctle_coarse update for SW442177John Rell2018-08-201-0/+75
* Adding p9c 1.3 support.Soma BhanuTej2018-08-201-120/+120
* jgr18042600 Changed rx_recal_abort_dl_mask=0 for cumulus HW446964John Rell2018-08-201-2/+5
* Adding p9n 2.3 support and p9n 2.3/p9c 1.2 security updateBen Gass2018-08-201-192/+288
* Remove PROC_FABRIC_LINK_ACTIVE from OBUS_FBC_ENABLED in p9.obus.scom.initfileBen Gass2018-08-201-4/+1
* Add support for p9c 1.2Ben Gass2018-08-201-96/+96
* Re-submit Axone updatesBen Gass2018-08-201-96/+120
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