| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Implement L2 eff_config_thermal, bulk_pwr_throttle | Jacob Harvey | 2016-11-01 | 18 | -323/+760 |
| * | Change bad bit processing to process bad bit attributes | Brian Silver | 2016-10-31 | 8 | -140/+509 |
| * | Add magic port capabilties for DDR PHY | Brian Silver | 2016-10-31 | 4 | -21/+138 |
| * | Fixed CL and timing bugs, unit test augmentations | Stephen Glancy | 2016-10-31 | 15 | -770/+1880 |
| * | p9_npu_scominit -- invoke HWP to enable NV output refclk drivers | Joe McGill | 2016-10-30 | 2 | -7/+27 |
| * | Fix p9_pm_update_ec_eq_state updating MC groups | Greg Still | 2016-10-30 | 2 | -42/+116 |
| * | PM Register Headers: fix deleting PMC registers in occhw and pba | Yue Du | 2016-10-30 | 1 | -1/+1 |
| * | Thread Control Stop precedure update | Raja Das | 2016-10-30 | 1 | -47/+60 |
| * | p9_throttle_sync HWP update | Thi Tran | 2016-10-30 | 1 | -28/+9 |
| * | mca initfile - remove unnecessary dependence on on TRP and TRCD | Shelton Leung | 2016-10-30 | 2 | -149/+119 |
| * | Change ADR output registers for init during reset | Brian Silver | 2016-10-30 | 1 | -2/+2 |
| * | Change parity error FIR clear from after MRS to before | Brian Silver | 2016-10-30 | 1 | -3/+4 |
| * | fix build to include p9_stop_lib | Matt K. Light | 2016-10-30 | 1 | -1/+1 |
| * | cache/core/l2_stopclocks updates | Yue Du | 2016-10-30 | 3 | -47/+142 |
| * | Host to have access to I2C engines while OCC reset | Sangeetha T S | 2016-10-30 | 2 | -9/+7 |
| * | CME/SGPE: yet another updating commit for stop images | Yue Du | 2016-10-28 | 1 | -2/+2 |
| * | Implement p9_mss_throttle_mem | Jacob Harvey | 2016-10-28 | 3 | -17/+72 |
| * | Add mss throttle files L1 | Andre Marin | 2016-10-28 | 2 | -0/+109 |
| * | Started implementation of bulk_pwr_throttles | Jacob Harvey | 2016-10-27 | 12 | -586/+669 |
| * | Create sample ffdc collection procedure | Richard J. Knight | 2016-10-26 | 4 | -35/+113 |
| * | Modifying ATTRs for memory power thermal | Jacob Harvey | 2016-10-25 | 1 | -31/+46 |
| * | Fixed 1R WR DQS update issue | Stephen Glancy | 2016-10-25 | 1 | -1/+27 |
| * | Implement MRW attributes; dram_clks, db_util, 2n_mode | Brian Silver | 2016-10-25 | 1 | -8/+5 |
| * | Fix p9_mss_utils_to_throttle, create throttles API, attribute cleanup | Andre Marin | 2016-10-25 | 1 | -20/+39 |
| * | Fix throttle procedure & MSS attribute clean up | Andre Marin | 2016-10-25 | 1 | -9/+10 |
| * | Add mss throttle files L1 | Andre Marin | 2016-10-25 | 1 | -0/+81 |
| * | p9_nv_ref_clk_enable -- initial release, sets NV output refclk drive enables | Joe McGill | 2016-10-25 | 3 | -0/+172 |
| * | Added xbus msb swap functionality | Chris Steffen | 2016-10-24 | 2 | -1/+68 |
| * | Improve error data for frequency mismatch from #V | Dan Crowell | 2016-10-24 | 2 | -7/+38 |
| * | Modifying ATTRs for memory power thermal | Jacob Harvey | 2016-10-24 | 3 | -19/+93 |
| * | Add mss throttle files L1 | Andre Marin | 2016-10-24 | 2 | -0/+110 |
| * | PM: Resolved chiplet id issue due to changes done in TOR API. | Prem Shanker Jha | 2016-10-23 | 1 | -3/+25 |
| * | Add remaining DP16 duty cycle registers | Brian Silver | 2016-10-21 | 1 | -1/+12 |
| * | Don't raise VDD2VIO fence on warm IPL | Joachim Fenkes | 2016-10-21 | 1 | -1/+1 |
| * | Add mapping data to memory vpd error | Dan Crowell | 2016-10-21 | 2 | -10/+66 |
| * | Cleanup: TOR API cleaning up | Claus Michael Olsen | 2016-10-20 | 7 | -483/+497 |
| * | p9_sbe_scominit update for Async MC | Abhishek Agarwal | 2016-10-20 | 3 | -1/+139 |
| * | Add ATTR_MSS_MRW_POWER_CONTROL_REQUESTED | Jacob Harvey | 2016-10-20 | 2 | -3/+45 |
| * | Change DLL cal init for spare DP8 - don't cal | Brian Silver | 2016-10-19 | 1 | -12/+1 |
| * | Add disabled bit processing for DDR PHY initial calibration | Brian Silver | 2016-10-19 | 10 | -43/+468 |
| * | MCBIST additional test types and features for shmoos | McIlvain | 2016-10-18 | 5 | -22/+885 |
| * | p9_dump_stop_info.C - Level 1 | Greg Still | 2016-10-18 | 3 | -0/+210 |
| * | Implemented mss_power_curve attr decoder | Jacob Harvey | 2016-10-18 | 2 | -0/+554 |
| * | Modifying ATTRs for memory power thermal | Jacob Harvey | 2016-10-18 | 2 | -2/+137 |
| * | Implement MRW attributes; dram_clks, db_util, 2n_mode | Brian Silver | 2016-10-18 | 1 | -1/+1 |
| * | Fix p9_mss_utils_to_throttle, create throttles API, attribute cleanup | Andre Marin | 2016-10-18 | 1 | -0/+71 |
| * | Cleanup: Getting rid of FIXED_RING_BUF_SIZE (RTC156706). | Claus Michael Olsen | 2016-10-18 | 1 | -1/+0 |
| * | ATTR_SBE_SYS_CONFIG is writeable now, to update it via Psu Chipop | Raja Das | 2016-10-18 | 1 | -0/+1 |
| * | p9.fbc.scan.initfile -- create initfile, add workaround for HW376651 | Joe McGill | 2016-10-18 | 1 | -0/+18 |
| * | Change MCBIST DD1 workaround, don't change subtests unless checking rank | Brian Silver | 2016-10-18 | 1 | -9/+17 |
