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path: root/src/import/chips/p9/procedures
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* FBC ABUS TDM inject and recovery HWPsJoe McGill2018-09-229-55/+122
* SMP ABUS -- use pattern A to detect lane failuresJoe McGill2018-09-227-95/+729
* p9.int.scom.initfile -- mask early hang indicator FIR bitsJoe McGill2018-09-191-6/+6
* Moves sync code to generic folderStephen Glancy2018-09-1912-1323/+647
* eRepair: Correctly update xbus vpd records based on clock groupSumit Kumar2018-09-193-346/+52
* Moves and renames swizzle.H to genericStephen Glancy2018-09-193-136/+2
* Adds skeleton code for LRDIMMStephen Glancy2018-09-181-0/+1
* Remove Nimbus dependencies from the SPD decoderAndre Marin2018-09-181-0/+234
* Adds MRW support for x4/x8 DIMM configurationsStephen Glancy2018-09-181-0/+74
* Fixes memdiags broadcast mode address check bugAndre Marin2018-09-181-2/+1
* Add plug rule for dual-drop DIMM configs that produce different xlate settingsLouis Stermole2018-09-181-0/+50
* Adds plug rule for NVDIMM in specific DIMM slotsStephen Glancy2018-09-181-1/+61
* Updates memory plug rulesStephen Glancy2018-09-181-1/+165
* L3 work for mss xmlsJacob Harvey2018-09-181-1/+0
* Remove logErrors in plug_rulesJacob Harvey2018-09-181-46/+16
* Fix memory plug rules and error handlingJacob Harvey2018-09-181-101/+179
* Update mss_eff_config to L3Jacob Harvey2018-09-181-1/+1
* Implement BC attributes and make eff_dimm classJacob Harvey2018-09-181-3/+3
* Add rank config MRW override to plug rulesBrian Silver2018-09-181-26/+115
* Add an attribute to avoid the plug rules in partial good scenariosBrian Silver2018-09-181-0/+36
* Add enforcement of DDR4 DRAM on Nimbus via plug rulesBrian Silver2018-09-181-2/+17
* Add rudimentary memory plug rulesBrian Silver2018-09-181-0/+292
* Add empty files for plug-rules mirrorBrian Silver2018-09-181-0/+24
* Remove to remirrorDan Crowell2018-09-182-1090/+0
* eRepair: Fix to update invalidate lane record correctlySumit Kumar2018-09-181-24/+51
* RAS_XML: updates to sync the XML with actual values from hardwareZane Shelley2018-09-182-10/+28
* Adds skeleton code for LRDIMMStephen Glancy2018-09-1816-6/+474
* Adds endian_swap to fapi2Stephen Glancy2018-09-182-23/+1
* Creates blank files for moving mss_freq to genericStephen Glancy2018-09-181-0/+24
* p9.int.scom.initfile -- increase PC timeoutsJoe McGill2018-09-181-1/+8
* Add EQ chiplet to #W errorsDan Crowell2018-09-182-7/+19
* SW427193 / HW461448: Enable memory controller watJenny Huynh2018-09-144-0/+97
* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-09-1412-1151/+138
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-09-1412-142/+1155
* Skip PM FFDC collection if the HOMER is not validDan Crowell2018-09-141-1/+11
* Fixes an array out of bounds bug in mss_freqStephen Glancy2018-09-122-8/+0
* Axone only-Mux settings for TOD refclk inputAnusha Reddy Rangareddygari2018-09-101-0/+13
* Axone only-IPL Procedures update to support SBE changesAbhishek Agarwal2018-09-103-2/+70
* get FAPI_POS for all valid target types passed in SBE FIFO ffdcRichard J. Knight2018-09-101-1/+3
* 24x7: Populated Abus bits in UAV for cumulus based system.Prem Shanker Jha2018-09-071-4/+55
* Update core quiesce interface in update_ec_eq procedurePrasad Bg Ranganath2018-09-073-38/+196
* eRepair: Fix to check and record unique incoming failed lanesSumit Kumar2018-09-071-7/+0
* Moves CAS latency algorithm to generic folderStephen Glancy2018-09-077-1066/+4
* UV Support: Fixed target issue in setup runtime wakeup mode HWP.Prem Shanker Jha2018-09-041-1/+1
* eRepair: Fix to handle incoming bad lanes threshold condition correctlySumit Kumar2018-09-041-1/+1
* eRepair: Centaur specific code updateSumit Kumar2018-09-043-760/+511
* PM:Some more cleanups in update_ec_eq procedure for core unit xstop casePrasad Bg Ranganath2018-09-046-29/+502
* Verify EQ/EX/Core clock/power statesPrasad Bg Ranganath2018-08-303-13/+869
* Revert "Verify Clock/power state on non functional EX/Core/quad chiplets"Jennifer A. Stofer2018-08-302-743/+1
* Verify Clock/power state on non functional EX/Core/quad chipletsPrasad Bg Ranganath2018-08-302-3/+745
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