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path: root/src/import/chips/p9/procedures
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* amo cache disabled for dd1 for HW401780Shelton Leung2017-02-102-0/+24
* p9_pcie_scominit PEC0 swap bit position fixedRicardo Mata2017-02-103-34/+132
* Added Scom to de-assert EDRAM Charge Pumps in Power down sequenceRaja Das2017-02-101-3/+20
* Add Galois-symbol-DQ mapping tables and functionsLouis Stermole2017-02-101-0/+138
* Adding ECC syndrome register access functionsLouis Stermole2017-02-105-0/+1225
* Stopclocks: fix state checking return code being current_errYue Du2017-02-101-37/+22
* cache/core/l2_stopclocks updatesYue Du2017-02-101-0/+123
* Set MSS blue waterfall workaround to only run after coarse rd/wr cal stepLouis Stermole2017-02-101-2/+7
* PB Purge Scoms if PBIEQ clock domain is being stoppedRaja Das2017-02-102-2/+64
* Istep4: clean up istep4 todo items and mark them with RTCYue Du2017-02-101-1/+1
* Implementation of PIB stopclock with CBSSoma BhanuTej2017-02-101-0/+44
* cache/core/l2_stopclocks updatesYue Du2017-02-104-160/+60
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2017-02-102-0/+547
* Shift HWP content to align with desired EKB layoutJoe McGill2017-02-102-0/+377
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2017-02-102-139/+0
* Add sbeError tag to all SBE related error xml filesRichard J. Knight2017-02-101-0/+8
* HB/IPL: ex_is_abomination workaround for hostbootYue Du2017-02-101-1/+3
* Fix for the EKB build failure caused by hcd constantSangeetha T S2017-02-101-1/+2
* CORE/CACHE: core/cache/l2_stopclocks Level 2Yue Du2017-02-104-10/+328
* CORE/CACHE: add Level1 cache/l2/core stopclocks proceduresYue Du2017-02-103-0/+151
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2017-02-101-0/+131
* p9_pfet_init: remove PFET attributes as they have no real valueGreg Still2017-02-102-134/+11
* Update pm_plat_attributes with defaults and better descriptionsGreg Still2017-02-101-40/+140
* Disabling temp_refresh_modeJacob Harvey2017-02-1010-142/+133
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2017-02-102-0/+139
* CORE/CACHE: core/cache/l2_stopclocks Level 2Yue Du2017-02-091-0/+98
* p9_mem_startclocks -- restore fabric group/node ID in async modeJoe McGill2017-02-091-0/+20
* Add new generic memory folder w/empty files for HB to mirrorAndre Marin2017-02-092-0/+48
* Map from Centaur canonical rank numbering to NimbusBrian Silver2017-02-076-135/+533
* Cleaned up spd decoder interface, preparing for common code with CumulusAndre Marin2017-02-078-1048/+644
* Add RDIMM raw card reference B1 to RCD settings listAndre Marin2017-02-072-1/+27
* Add DP16 API and unit testing needed to set PBA mode for LRDIMMsAndre Marin2017-02-078-94/+224
* p9_mem_startclocks.C updateAnusha Reddy Rangareddygari2017-02-071-28/+57
* p9_mss_setup_bars - Updating Channel ID program value conditionThi Tran2017-02-071-4/+5
* HWP L2 delivery for p9_update_security_ctrlSantosh Balasubramanian2017-02-071-0/+26
* PM: Corrected byte alignment for CME repair ring.Prem Shanker Jha2017-02-071-2/+4
* Modifying npu scominit file to represent inits based on npu workbookJenny Huynh2017-02-071-182/+1066
* Adding HW363780 to NPU scom initfilesJenny Huynh2017-02-072-0/+90
* workarounds for HW399919 HW400898 HW398269 HW398269 HW399765Nick Klazynski2017-02-071-0/+137
* PSTATE parameter block:POUNDV parsing function vs native implementationPrasad Bg Ranganath2017-02-074-71/+23
* p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 onlyJoe McGill2017-02-073-6/+15
* p9_mss_eff_grouping update group of 2Thi Tran2017-02-072-26/+226
* Control NDL training updateAnusha Reddy Rangareddygari2017-02-072-23/+84
* Istep4: clean up istep4 todo items and mark them with RTCYue Du2017-02-072-4/+4
* HWP L2 delivery for p9_update_security_ctrlSantosh Balasubramanian2017-02-022-0/+150
* Revert "PM: Change in self sestore region for lab."Gregory S. Still2017-02-025-185/+111
* Fix for missing symbolKahn Evans2017-02-021-1/+2
* PM: Change in self sestore region for lab.Prem Shanker Jha2017-02-024-16/+90
* PM: Fixed offset for CME Instance rings in CPMR Header.Prem Shanker Jha2017-02-022-2/+6
* Disable special wakeup at the end of p9_pm_initCorey Swenson2017-02-024-38/+45
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