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path: root/src/import/chips/p9/procedures/xml
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* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-09-142-63/+1
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-09-142-1/+63
* Fixes an array out of bounds bug in mss_freqStephen Glancy2018-09-121-4/+0
* Axone only-Mux settings for TOD refclk inputAnusha Reddy Rangareddygari2018-09-101-0/+13
* get FAPI_POS for all valid target types passed in SBE FIFO ffdcRichard J. Knight2018-09-101-1/+3
* Update core quiesce interface in update_ec_eq procedurePrasad Bg Ranganath2018-09-072-0/+89
* Moves CAS latency algorithm to generic folderStephen Glancy2018-09-072-159/+0
* PM:Some more cleanups in update_ec_eq procedure for core unit xstop casePrasad Bg Ranganath2018-09-041-0/+177
* Add TLBIE WATNick Klazynski2018-08-291-0/+17
* prevent NVDL recal_abort to OBUS PHY during SMP usageJoe McGill2018-08-281-12/+28
* Enable Core compatability Mode; Add HW443669Nick Klazynski2018-08-211-0/+41
* Moves conversions to be in the generic code spaceStephen Glancy2018-08-202-0/+40
* nest updates for p9c DD1.3 native and p9c DD1.2 compatibility modesJoe McGill2018-08-201-6/+32
* Updates to permit synchronized SS PLL spreading via TODJoe McGill2018-08-203-0/+56
* Adding a fapi_assert to flag error if PPE is not halted.Anusha Reddy Rangareddygari2018-08-201-0/+36
* validate DL, TL, iovalid state prior to SMP buildJoe McGill2018-08-061-0/+19
* Generalize byte reading from SPD reading, for exp i2c reuseAndre Marin2018-08-062-22/+24
* apply INT ARX clock gate disable to p9n DD2.0 hardwareJoe McGill2018-08-021-1/+1
* Misc. fixes for PM Malf/Stop Recovery with CME injectsAmit Tendolkar2018-08-021-1/+1
* Disable HW439321 workaround in dd1.3Adam Hale2018-08-011-0/+17
* Remove Nimbus dependencies from the SPD decoderAndre Marin2018-07-312-30/+199
* Row repair enabled MRW remove writeableCaleb Palmer2018-07-251-2/+1
* Row Repair enabled attributes and support functionCaleb Palmer2018-07-251-1/+15
* Enable CDD1.3's 4 risklevels (step 1)Nick Klazynski2018-07-251-6/+64
* Remove ATTR_PROC_CHIP_MEM_TO_USEDan Crowell2018-07-251-12/+0
* Move Xbus Erepair FIR ClearingChris Steffen2018-07-211-0/+24
* p9.pci.scan.initfile -- replace 62028 implementation with initfile entryJoe McGill2018-07-191-7/+0
* Handling special wakeup assert/deassert mis-match in PM Reset/Init on MALFAmit Tendolkar2018-07-192-4/+16
* Clockgate disable workaround for HW452921Nick Klazynski2018-07-171-3/+3
* Cleanup: Updated Mvpd access function and removal of unused ringsClaus Michael Olsen2018-07-171-13/+1
* Secure memory allocation and setupJenny Huynh2018-07-134-7/+213
* p9_mss_eff_grouping -- comment, whitespace only updatesJoe McGill2018-07-131-2/+2
* p9_sbe_check_quiesce -- restore call to p9_int_scrub_cachesJoe McGill2018-07-121-3/+3
* set PEC disable store thread based ordering chicken switchesJoe McGill2018-07-121-0/+31
* Adding SMP PHY MFG Stress TestChris Steffen2018-07-121-0/+28
* allow option to enforce mirroring of all system memoryJoe McGill2018-07-072-10/+37
* PM: Added support for enable disable of 24x7 IMA.Prem Shanker Jha2018-07-051-0/+18
* eRepair: More debug traces addedSumit Kumar2018-07-051-4/+12
* Add SPD reader and traits DDR4 defAndre Marin2018-06-301-0/+50
* Alink Hot Repair FixChris Steffen2018-06-291-0/+18
* Default DDR4-2933 to 2666Tsung Yeung2018-06-291-1/+2
* p9_sbe_lpc_init: Add final check for errorsJoachim Fenkes2018-06-271-0/+25
* P9C Abus Reset ProcedureChris Steffen2018-06-261-0/+18
* P9N/P9C util to throttle HWP updates for min util and safemodeMichael Pardeik2018-06-211-3/+30
* Updating p9.core.scan.initfile settings for p9n 2.3Ben Gass2018-06-211-2/+16
* Add RL0/RL1 support for CDD1.2Nick Klazynski2018-06-211-8/+31
* Update some defaults for AVSBUS attributesDan Crowell2018-06-211-20/+8
* Updates the training advanced algorithmStephen Glancy2018-06-211-2/+28
* Adapt p9_sbe_check_master_stop15 for bad path on non-SBE platforms for fleetwoodAmit Tendolkar2018-06-202-6/+107
* PM:Remove deprecated attributesPrasad Bg Ranganath2018-06-141-14/+0
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