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path: root/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
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* Adding p9n 2.3 support and p9n 2.3/p9c 1.2 security updateBen Gass2018-04-211-0/+41
* TM workaround for HW443982Nick Klazynski2018-04-211-4/+11
* Abist proc update for SBE changesAbhishek Agarwal2018-04-121-0/+17
* Turn off PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS for Nimbus (HW409026)Ben Gass2018-04-101-0/+18
* Do not apply HW414958 to AxoneThi Tran2018-03-261-3/+28
* HW438727 Disable clockgate to allow correct ODL error reportingJenny Huynh2018-03-231-0/+25
* Remove CDD1.1 security IMC; Apply indirect branch serialization to HV=0 onlyNick Klazynski2018-03-231-17/+0
* Disable WOF for Cumulus DD1.0Dan Crowell2018-03-131-0/+7
* Enable risklevel2, match v44 of security wikiNick Klazynski2018-03-131-3/+3
* Axone support to TP stopclocksSoma BhanuTej2018-03-131-0/+17
* Axone MC uses same pll/clock setup as in Cumulus.Ben Gass2018-03-131-1/+16
* Add support for p9c 1.2Ben Gass2018-03-131-0/+48
* Add Cumulus DD1.1 initsNick Klazynski2018-03-131-46/+291
* Protect Firmware from exposure to HW423533Lennard Streat2018-03-131-0/+18
* Add TM WAT workaround; NDD2.2 and CDD1.1 onlyNick Klazynski2018-03-131-0/+24
* Disabling WOF and VDM for Nimbus DD2.0Dan Crowell2018-03-131-2/+2
* Re-submit Axone updatesBen Gass2018-03-131-17/+234
* Enable mixed core xlate; Enable xlate protection feature; Disable LSU clockgateNick Klazynski2018-03-131-0/+72
* p9.npu.scom.initfile -- limit DCP0 credits for HW437173Joe McGill2018-03-131-0/+18
* Updating HW414700 to also apply to Cumulus DD10Jenny Huynh2018-03-131-2/+9
* Two LTPTR workarounds, remove LTPTR serialization, Fix TB IMCNick Klazynski2018-03-131-18/+32
* Remove workaround for DD1 SW reset for XIVESachin Gupta2018-03-131-18/+0
* HDCT: Remove core trace arrays, permanent P9 erratumJoachim Fenkes2018-03-131-3/+4
* Implement security IMCs, based on v29 of wikiNick Klazynski2018-03-131-6/+149
* Add new TM IMC, Add TLBIE hangbusterNick Klazynski2018-03-131-0/+24
* Fix three NDD2.1 dials and add new NDD2.2 workaroundsNick Klazynski2018-03-131-14/+189
* Zepplin:Remove dd level check for cumulus under PPB codePrasad Bg Ranganath2018-03-131-7/+0
* PM: Ignore allow_reg_wakeup in cache contained modeBrian Vanderpool2018-03-131-0/+28
* Workaround for Quaint Gate, Angry ReindeerJenny Huynh2018-03-131-4/+29
* jgr171017 Setting changes for Obus boardwire vs cableJohn Rell2018-03-131-0/+24
* Large update for securityNick Klazynski2018-03-131-3/+26
* Disable read data delay for Cumulus DD1.0, enable for DD1.1Joe McGill2018-03-131-0/+17
* Workaround for Warlike Parasite (HW430546)Lennard Streat2018-03-131-0/+18
* MCD disable workaround for HW423589 (option1)Joe McGill2018-03-131-0/+24
* disable ECC bypass for Cumulus DD1.0Joe McGill2018-03-131-0/+17
* Revert "Adding p9a support."Jennifer A. Stofer2018-03-131-147/+17
* Adding p9a support.Ben Gass2018-03-131-17/+147
* Enabling L2 64B store predictionLuke C. Murray2018-03-131-0/+17
* p9.npu.scom.initfile -- fix cq_sm allocation issue at low water markRyan Black2018-03-131-0/+24
* Nimbus DD2.2 core chickenswitchesNick Klazynski2018-03-131-1/+136
* Adding attribute to turn memory early data onLuke C. Murray2018-03-131-0/+17
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2018-03-131-0/+42
* Modify INT FIR configuration settingsDavid Kauer2018-03-131-0/+24
* remove NV iovalid assertion from FW and add scan inits to resolve glsmux xstateJoe McGill2018-03-131-0/+43
* update data token init to use scans on p9c 1.1Daniel Howe2018-03-131-3/+3
* Allow lpc_ed for p9n 2.2 per HW418117 fixDaniel Howe2018-03-131-4/+6
* p9.filter.pll.scan.intifile -- set 0 BGoffset for P9C DD1.1Joe McGill2018-03-131-7/+0
* HW425038 INT ARX timeout workaround - Updated initfiles to 49241Claus Michael Olsen2018-03-131-3/+33
* Added CI throttling support, HW init updates, and fixed a bug with tce arb.Ricardo Mata2018-03-131-0/+25
* HW425038 INT ARX timeout workaroundDavid Kauer2018-03-131-0/+24
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