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path: root/src/import/chips/p9/procedures/hwp
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* Adds mcbist empty filesAlvin Wang2019-03-071-0/+24
* Add empty files required for p9a_mss_freqLouis Stermole2019-03-071-0/+24
* Adds SI setting for 4R and dual-drop LRDIMM configsStephen Glancy2019-03-012-50/+152
* Add chip base address to the OMI MMIO offset in p9a_mmio_utilBen Gass2019-03-012-4/+24
* Enforces NVDIMM PairingTsung Yeung2019-03-012-1/+82
* Secure memory allocation and setupJenny Huynh2019-02-281-3/+42
* allow option to enforce mirroring of all system memoryJoe McGill2019-02-281-2/+3
* p9_query_mssinfo -- fill mirror_policy regardless of platform mirror supportJoe McGill2019-02-281-8/+9
* p9_query_mssinfo -- adjust total memory reportingJoe McGill2019-02-281-1/+10
* Change ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING nameThi Tran2019-02-281-7/+7
* p9_query_mssinfo for single chip mss information query.xiaozq2019-02-281-0/+470
* HWP:Cache stop clocks complete fixPrasad Bg Ranganath2019-02-271-0/+9
* PM HWP: Fix bug in stop clock procedure that effects mpiplPrasad Bg Ranganath2019-02-273-25/+39
* Fixes LRDIMM training issueLi Meng2019-02-261-14/+47
* Reinstates exp_draminit_mc with change_addr_mux_sel fixAlvin Wang2019-02-245-292/+109
* Add empty pos, c_str files to split dimm specializationAndre Marin2019-02-232-0/+48
* Add new algorithm for MREP and error logshlimeng2019-02-223-236/+253
* Axone pibmem repair logicRaja Das2019-02-222-84/+299
* Update p9a_10 engd - spy name changesSoma BhanuTej2019-02-222-3/+3
* PM: fix cable pull issue in clearing clock sync upon PM Complex ResetGreg Still2019-02-221-11/+11
* P9 Obus MNFG Errors Attribute FixChris Steffen2019-02-221-3/+3
* PM HWP: Fixed error path bug pertaining to query STOP state.Prem Shanker Jha2019-02-221-10/+12
* Generalize set fields in pre_data_initAndre Marin2019-02-211-401/+1
* P9 Xbus/DMI CM WorkaroundChris Steffen2019-02-196-31/+134
* Create FAPI mapping function for DDIM SPD dataRoland Veloz2019-02-193-0/+881
* Update to allow DDR4-SORDIMM modules to be used [3].Evan Lojewski2019-02-131-1/+4
* Added Alink changes in attributes and initfilesPretty Mariam Jacob2019-02-133-736/+612
* Memory Controller Axone initfiles - initialAdam Hale2019-02-1317-24/+1169
* Updates MCA write and read timingsStephen Glancy2019-02-137-13/+300
* SMF: Populates unsecure HOMER with SC2 instruction.Prem Shanker Jha2019-02-132-2/+72
* Disable maint address mode before rcd_load during NVDIMM post-restoreTsung Yeung2019-02-132-11/+67
* Adds workaround for LRDIMM to clear FIRsLi Meng2019-02-131-0/+6
* Fixes LRDIMM NTTM mode read timing for HW bugStephen Glancy2019-02-131-1/+7
* Adjust STR enter sequence to enable immediate entryTsung Yeung2019-02-133-21/+69
* Adds some BCW safe delay for LRDIMMLi Meng2019-02-121-3/+5
* Update p9a.omi_init.scom.initfileBen Gass2019-02-121-2/+0
* Move lpc_rw to a source filespashabk-in2019-02-121-1/+0
* p9_sbe_lpc_init: Skip final error check for Fleetwood GA1Joachim Fenkes2019-02-121-0/+2
* Revert "lpc_init: Correct LPC host controller timeout value"Jennifer A. Stofer2019-02-121-1/+1
* lpc_init: Correct LPC host controller timeout valueJoachim Fenkes2019-02-121-1/+1
* Introducing lpc utils source filespashabk-in2019-02-121-0/+1
* p9_sbe_lpc_init: Improve resetJoachim Fenkes2019-02-121-12/+16
* p9_sbe_lpc_init: Add final check for errorsJoachim Fenkes2019-02-122-0/+13
* p9_sbe_lpc_init: Fix timeout setupJoachim Fenkes2019-02-122-37/+27
* Update hardware procedure metadataAnusha Reddy Rangareddygari2019-02-122-2/+2
* p9_sbe_lpc_init: Fix LPC bus LRESET for DD2Joachim Fenkes2019-02-122-64/+111
* Do the real LPC reset for DD2CHRISTINA L. GRAVES2019-02-122-0/+32
* Adding in LPC and OPB timeout valuesCHRISTINA L. GRAVES2019-02-121-1/+15
* p9_sbe_lpc_init fix with GPIO resetCHRISTINA L. GRAVES2019-02-121-0/+32
* Fixing order of setting clock muxes & functional reset & removing sim only scomsCHRISTINA L. GRAVES2019-02-121-40/+5
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