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path: root/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
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* create attribute to reflect DPLL input frequencyJoe McGill2019-06-051-5/+5
* PM: fix cable pull issue in clearing clock sync upon PM Complex ResetGreg Still2019-02-221-11/+11
* PM: clear Hcode error injection bit upon PM complex resetGreg Still2018-05-311-0/+16
* PM_RESCLK: Clear override bits of CACCR in reset flowPrasad Bg Ranganath2018-05-231-8/+24
* PM reset: Fix disable resclk procedurePrasad Bg Ranganath2018-05-191-16/+27
* Fix bug in cache query state procedurePrasad Bg Ranganath2017-11-171-10/+22
* RESLCK:p9_pm_corequad_init:port CME resonant clock disablement to FAPIPrasad Bg Ranganath2017-10-081-2/+277
* PM: p9_pm_corequad_init Level 3Greg Still2017-10-081-97/+174
* Bug fix in PM firinit procedures(CME,OCC,PBA)Prasad Bg Ranganath2017-09-051-18/+0
* STOP: move CME scominits from corequad_init to SGPEYue Du2017-06-211-108/+56
* Reapply "Use query_cache_access_state to verify EQ scomable in.."crgeddes2017-05-251-0/+21
* Revert "Use query_cache_access_state to verify EQ scomable in corequad_init"crgeddes2017-05-241-21/+0
* Use query_cache_access_state to verify EQ scomable in corequad_initcrgeddes2017-05-221-0/+21
* Fix clearing CME_FLAGS to use EX target instead of EQ targetBrian Vanderpool2017-02-021-6/+9
* Fix PM procedure problems found during hardware bringupCorey Swenson2017-01-191-4/+2
* Collect register FFDC for CMEsSangeetha T S2016-11-041-1/+2
* p9_pm_init: Level 2: Implement functionalitySangeetha T S2016-08-051-4/+4
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
* p9_pm_corequad_init: Level 2 - Fapi 1.0 to Fapi 2.0 transliterationSangeetha T S2016-06-091-5/+421
* p9_pm_corequad_init : Level 1 - Interface designSangeetha T S2016-06-091-0/+91
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