| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: Iaabd787166422b68179901b7785ab3e8a54d35b8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65875
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65885
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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HW-Image-Coreq: yes
HW-Image-Prereq: Ia9ae0d284398af375f1562efff152a6a12a6eb9a
Change-Id: I1f7ca865640dfc0a08aef783fd3595d2f249a672
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58843
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59321
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit increases max eq scom restore entries supported from 63
to 255. It updates a field in QPMR header which is read by STOP API
and SGPE Hcode. This enables a flexible way to change SCOM
restore entries.
Key_Cronus_Test=PM_REGRESS
HW-Image-Prereq: Ie13a5110384e4161615167b238aecd4e2e0b9902
Change-Id: I036691f2fa152b1f0597e133b37b1795837d6e45
CQ: SW435708
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62222
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62242
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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p9_mss_eff_grouping.C:
- determines whether secure mem is requested, reserves smf space
- always reserve smf at end of range because of end-of-range bit
- set addr15 when reporting smf base address
- mask off group_id(0) via chip address extension if smf is enabled
- updated to set value of attr_smf_enabled
- enhanced error reporting with smf config/supported values
- made values reported to attr_mss_mcs_group_32 more clear
p9_mss_setup_bars.C:
- set MCFGPA/MCFGPMA registers with SMF data
- fixed scom registers for MCFGPA/MCFGPMA hole setup
- added note to leave MCFIR_invalid_smf masked for HW451708/HW451711
- added assert to check for HOLE1 and SMF enable overlaps
p9_query_mssinfo.C:
- updated to print out SMF reservations
- print out HTM/OCC/SMF reservations regardless of mirroring enable
p9_fbc_utils.C:
- prevent group_id(0)=1 from affecting mappable memory ranges
p9_sbe_fabricinit.C:
- mask off group_id(0) via chip address extension if smf is enabled
p9_setup_sbe_config.C, p9_sbe_attr_setup.C:
- use scratch_reg6 bit(16) to pass smf_config value
initfiles:
- removed setup to use other addr bits as secure bit; core only uses addr15
- added setup for ncu addr15 value in hcode
- always set addr15 config bit in bridge unit if smf is supported
- set addr15 bit across all mcs if smf is enabled
- added in settings to enable smf in nmmu unit
- hardcode group_id(0) bit in chipext mask for bridge unit if smf is supported
attributes:
- ATTR_SMF_ENABLE is a system level attribute
- changed SMF_ENABLE->SMF_CONFIG; smf_enabled will be (config && supported)
CQ:HW451708
CQ:HW451711
Change-Id: I6cf85600354baa322e959c922f596ecc5c68a458
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57322
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57348
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit incorporates an ability to enable or disable 24x7
IMA. It reads an attribute and populates a field of QPMR
header. 24x7 firmware is expected to read this field
and enable or disable 24x7 IMA by itself.
Key_Cronus_Test=NO_TEST
Change-Id: I1f1fc738a58f11346f7972eb3c547aac0e2f805f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59443
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59451
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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This is first of the series of commits intended for incorporating
new mechanisms for SCOM restore. STOP API looks for a specific
version in QPMR header of HOMER. If version is greater than 2, it allows
- 255 SCOM Restore entries per quad
- doesn't divide quad restore region in to L2, L3 and EQ sub-region
If version is less than or equal to 2, API provideis legacy functionality.
Key_Cronus_Test=PM_REGRESS
RTC: 188827
Change-Id: Iac6ee94619302f745fee0c77acc168eaba04c3da
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56385
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56390
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit addresses TODOs which were found to be functional.
Code has been updated for those which needed an investigation.
TODOs which intend design improvement has been deferred for next
release.
Change-Id: I68eb6c388cc9ff6bb72b79d9de718baa2812beab
RTC: 184604
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59317
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59347
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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In this update, we're adding support to p9_xip_tool to be able
to dissect and extract stand-alone DDCO ring files, i.e. files
that are DD packaged through using the dd_container API and
which is the DD packaging that XIP "understands".
Right now, dissect and extract (of a specific DD level) can
only be achieved if the DDCO binary is attached to the XIP image
as one of the rings sections, .rings, .overlays or .overrides.
Key_Cronus_Test=XIP_REGRESS
Change-Id: I8be00742f05b4df61652a1de6d0230bb5d203f97
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54704
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56110
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Introducing RV_RL3/4/5 ring variant (RV) support for EC/EQ chiplets.
- Dropping RV support for all chiplet's instance rings which saves 456
Quad bytes and 58 Nest bytes in Seeprom's TOR slots (compared to
master).
- Each additional risk level adds 144 bytes in Seeprom TOR slots.
- Various changes to data names associated with ring variants to
clarify that the notion of ring variants is now specific only to
Common rings while Instance rings only have the BASE variant.
- Also, removed backwards compatibility to TOR v5, i.e. from before
we introduced RL2 in february. Assumption is that all images/drivers
used in fips910/920 and OP920 are TOR v6.
- This commit produces a TOR v6 image to ensure EKB FSP CI success.
Key_Cronus_Test=XIP_REGRESS
Change-Id: Icfcb1e68fd74a10ffc48ee7a5da528a8042ef3b1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56973
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56983
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: I9313dbe90771a549e14c8e90f2c2ca410616293a
CQ: SW421682
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55059
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55069
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit changes the images' .rings section by adding the TOR
RL2 variant slot to the runtime Quad chiplets, EQ and EC.
Specifically, we have changed the definition of the ATTR_RISK_LEVEL
attribute to now have three risk levels, RL0 (prev FALSE), RL1
(prev TRUE) and RL2 (new). To accomodate RL2, a new "override"
txt file has been created, ./attribute_ovd/runtime_risk2.txt and
changes to many other files using the ATTR_RISK_LEVEL attrib have
been updated as well.
Lastly, and to allow for the inclusion of RL2 rings in the HW
image, the TOR_VERSION has been updated to version 6 which will
allow for RL2 support in the ring ID metadata files.
p9_setup_sbe_config is updated to write the RISK_LEVEL value into
scratch 3 bits 28:31, and deprecate the existing mailbox.
RISK_LEVEL processing has been removed from p9_sbe_attr_setup. It's
only function is to seed mailboxes which are empty via the
attribute state present in the SEEPROM. Since RISK_LEVEL is zero
at image build time, and explicitly cleared as a result of every
customization, there's logically no need to process the RISK_LEVEL
here.
PPE changes to accomodate the new RISK_LEVEL mailbox
location need to be implemented in the PLAT code: src/hwpf/target.C
Key_Cronus_Test=XIP_REGRESS
HW-ImageBuild-Preqeq=52659
- 52659 must be fully merged in Cronus and HB before this commit
(53292) can be merged. This is to avoid a Coreq situation.
CQ: SW416424
cmvc-prereq: 1046058
cmvc-prereq: 1043606
cmvc-prereq: 1045920
Change-Id: Ia0471219916602cc0041a2c55a1070013f66a7d9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53292
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53321
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: Ied205304bd0c395b66963bffef1b58722ba04bea
CQ:SW416422
CQ:SW416899
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53517
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53523
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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The purpose of this commit is to avoid a coreq situation by
ensuring this commit is fully propagated through our repos and
test drivers before introducing the change to the new HW image
with two RLs.
The commit enables simultaneous support for producing a HW image
and retrieving rings from an image that has either one or two risk
level (RL) rings in the .rings section. The commit however does
NOT actually, yet, make any changes to the image which is the
aim of the (step 2) commit 53292. Nor does this commit generate
any raw ring files or process any RL2 level rings yet. Again this
will happen in 53292.
The commit also includes,
- various related cleanups in data naming and ring file processing,
- some data and invironment specific parts in ring_apply.C have
been moved to common_ringId.C.
Key_Cronus_Test=XIP_REGRESS
HW-Image-Prereq=53292
- This commit (52659) must be fully merged before merging 53292.
Change-Id: I402d53c4a3ca6a084c958321069cc6f60e04ad24
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53019
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Step 1 - Ensuring backwards compatibility in TOR and XIP APIs to
avoid co-req issue.
- Updated TOR and XIP APIs, xip_tool and ipl_build to handle both
types of DD coordination.
Key_Cronus_Test=XIP_REGRESS
HW-Image-Prereq=51511
- 51511 changes the .rings section DD level packaging. This commit
(42751) prepares the TOR API and associated codes to handle the
new .rings layout while also making the TOR API backwards
compatible to the existing .rings section.
Change-Id: I7d254340808ca9270fc1c96414102794fcffeabe
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42751
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43259
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: I823b350ffe1e07108fbadd4b0456c7188839932f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46480
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48108
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Found while testing load_pm_complex as that test environment
only has a 32KB stack instead of a 64KB stack.
PstateSuperStructure took up 8KB of memory on the stack and
caused an overrun to happen in the smaller 32KB stack.
Change-Id: I334df80be4a1b2f2b5ef28152179bf3f8122462a
RTC:168054
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50211
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50267
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Performance wants a way to turn memory early data on & off
using just scoms. Adding one attribute to control all the needed
scoms and defaulting everything so that early data is off.
For the L3 disable cp_me by default using scom
Changing the scom cp_me dial to disable cp_me for all systems
after Nimbus DD2.0. This is expected to be the correct setup
for most systems.
We didn't disable the cp_me at the scan, because the scom can
only disable cp_me if ON or allow the scan setting if set OFF. Some
systems might want cp_me enabled by only changing a scom. So the default
is to set cp_me on at the scan and off a the scom. This way only the
scom has to be turned off to enable cp_me.
Also update three scoms in the memory controler that are needed for
early data.
Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b
CQ: HW426419
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49332
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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chip_ec_attributes.xml
nest_attributes.xml
p9_sbe_attributes.xml
add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines
set of chips which physically support the feature
add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips
which need extended address workaround for MCD issue (applied only
to Nimbus EC 21)
add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of
memory groups formed. Written by p9_mss_eff_grouping. For
HW423589_OPTION2, this will default to 512GB
add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold
extended address configuration. Written by p9_sbe_fabricinit (SBE)
and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will
default to 0b0000_111, consuming all chip ID bits for extended
addressing.
p9_fbc_utils.C
p9_fbc_utils.H
extend p9_fbc_utils_get_chip_base_address to support address
extension, now outputs set of ranges in each msel based on
ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID
maintain original function for PPE platform which requires
knowledge of non-aliased base addresses only, for code size
p9_mss_eff_grouping.C
p9_mss_eff_grouping_errors.xml
set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform
restrict size of groups formed for HW423589_OPTION2
p9_sbe_fabricinit.C
set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform
configure FBC/NMMU extended addressing registers
p9_setup_bars.C
p9_setup_bars_defs.H
p9_setup_bars_errors.xml
add general purpose support for extended address mode
for HW423589_OPTION2, configure static MCD setup
p9_hcode_image_defines.H
p9_hcode_image_build.C
customize SGPE image with address extension configuration to apply
p9.cxa.scom.initfile
p9.int.scom.initfile
p9.l2.scom.initfile
p9.l3.scom.initfile
p9.ncu.scom.initfile
p9.nx.scom.initfile
p9.trace.scan.initfile
p9.vas.scom.initfile
p9_hcd_cache_scominit.C
p9_hcd_cache_scominit.c
p9_pcie_config.C
set unit address extension configuration on supported chips
p9_rng_init_phase2.C
p9_sbe_scominit.C
p9c_set_inband_addr.C
p9_sbe_load_bootloader.C
p9_sbe_mcs_setup.C
adapt to alterations in p9_fbc_utils_get_chip_base_address
Change-Id: I614d566c073f1169f04f647057e6e85889f1c237
CQ: HW423589
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48893
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Key_Cronus_Test=XIP_REGRESS
- Updates to TOR API codes to allow user codes to call TOR API
function on a Centaur image. Note that the API no longer needs
the caller to supply and XIP section ID.
- Updates to TOR API codes to take advantage of the improved
data and meta-data representation in the ring Id codes and
the more self-contained ring image which now has the TOR magic
header.
- Updates to xip_tool to allow dissection of Centaur image.
- Additional updates to TOR API codes and ring Id codes to continue
improving overall clarity of data, data structures and flow
through TOR API, incl name changes to related data variables
and structures.
Change-Id: I42891b9662cc0c443d2b16ce866ac945dc2c58dc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38018
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38563
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- Introduces Centaur ring ID header files and ring_apply support to generate
a separate Centaur ring image file.
- Introduces common ring ID header file consumed by both P9 and Centaur and
all user codes, e.g. putRing, ipl_build, xip_tool, etc.
- Introduces a namespace approach for complete separation of P9 and Centaur
ring data and to facilitate execution time selection of either P9 and
Centaur ring data.
- Added Centaur image .rings generation function to p9_ring_apply.
- This commit does NOT support Centaur in the TOR API nor in xip_tool. See
commit 38018 for that support.
- Modified hw_image.mk file to support Centaur XIP image generation.
- Updated ring_apply to also support .overrides ring gen for Centaur.
Change-Id: I12a27b194dc14d906fea7bc273eb9f766f0fc5bf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35639
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36011
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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HW-Image-Coreq=Yes
SBE-Image-Coreq=No (SBE image is back compatible)
This commit adds an 12-byte header to all TOR ring sections:
- for improved self-containment of TOR ring sections incl
stand-alone ring sections like .overrides which, currently,
has no meaningful size info associated with it in the PNOR,
- to support a more data-driven implementation of TOR API,
- to eliminate the current usage of XIP_MAGIC ids to inform the
TOR APIs which ring section they are dealing with, and
- to improve debugging binary ring sections.
The TOR header expands on the current TorNumDdLevels field in the
HW ring section and is added to all other ring sections as well,
e.g. for the SBE and OVRD ring sections. Most importantly, the
TOR header adds the TOR magic number which is unique for each
possible TOR ring section. Also, of quite practical importance,
a size field has been added so that the size of a true standalone
section like .overrides can be extracted (since its size in PNOR
is not indicative of its size).
Further, to support the use of ddLevel and chipType in the TOR
header fields, these two data points need to be always supplied
whenever calling ring_apply. Thus, updates have been made to the
ring_apply.mk file as well as the override .pl script. While
making these changes, we also decided to change the --type arg
to the --bOverrides arg to make the arguments being passed less
confusing in view of the Centaur commit that's coming and its
demands to make codes less data dependent, incl make and script
files which should simply inform the functional intent of the
"user". The user shouldn't presume it knows about which specific
type of ring section needs to be produced.
Further, the DD level block struct has been increased from 8B
to 12B to avoid the unnecessarily complex merging of the
ddLevel and offset into the same 4B field. It's included in
this commit since this is also going to break the lab and
because the required code changes are in the same places
where the code changes needed for the TOR header are.
Further, xip_tool has been updated to support the new TOR
header so that it can be called by supplying a standalone
ring section, such as overrides.bin. Various changes have
been made in xip_tool's dissect section to support overrides
as well.
This code uses many of the code changes in 33778 except
changes to p9_tor.C|H are at a bare minimum focusing on the
functional changes and keeping any cleanups to a minimum changing
only some variable names associated with the functional changes
for improved readability of the code.
CMVC-Prereq: 1034144
CMVC-Prereq: 1035575
Change-Id: I29ba8905ac55dad5c10878a94fb94468e5580ea0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35372
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37994
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I4e0b11f869d306ec5825615b40204b7a76c25cc3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46949
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46956
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I6c5e4bea58c188d736b2b1218577da7deee0f88d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46337
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46545
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ic57a5c5e604c45dcfdc720fd1205c7b6790c77e2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46157
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46161
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- needed for accurate timestamps in PK Traces
- applies to CME, SGPE and PGPE
Change-Id: I30e27cddead8ba4f2edb1919edbf935e40774e2e
RTC: 179852
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46208
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46213
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit updates the logic for PGPE SRAM image size check.
PGPE Hcode and Global P-State Parameter Block together
should not exceed 44KB. Following is the distribution
for PGPE region of OCC SRAM
- PGPE Hcode + GPSPB : 44KB
- PGPE Aux Task : 2KB
- PGPE Boot Loader : 1KB
- PPMR Header : 1KB
Change-Id: I47b033497b6815909c6d183823d09806ef77f375
RTC: 178482
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44582
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44583
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Was always returning SUCCESS which caused p9_hcode_image_build to not
properly terminate (false error logs)
- Added EC feature attribute to skip #V validity checking and thus disabling
pstates for Nimbus < 20 and Cumulus < 11
- Initalized wof io_size to 0.
- Rebased
- Added override attribute ATTR_SYSTEM_POUNDV_VALIDITY_HALT_DISABLE to disable
killing the IPL upon #V validity check failure. Disables Pstates and
continues. This allow the use of parts that don't have good #V for other,
non-Pstate oriented purposes. Marked with new <overrideOnly/> tag.
Change-Id: Ia238af9758ae1fe35d39fa536d73ec41e85f9498
CQ: SW400102
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45185
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45190
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I70cc9bba5e358a85ee420b329365817c688084f0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45505
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45510
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Added SGPE header bit defintion
- Hcode image build update to read attr and set header bit
- Moved bit mask to using BIT macro for better readability
Change-Id: Ie8f245bf3abd0f5c4dce994f81ea1b002feade00
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45124
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45179
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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with GPTR overlays for DD2, only the BASE TOR variant will be populated,
and we need to make sure we are picking up this content regardless of risk
level
same adjustment is made here for TIME rings which are common (i.e., not
instance specific)
Change-Id: I903703c1c92ed6961607449424ab5ebee6c2c642
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44120
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44125
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I24ce2816a6e5583824f94db4f200cba9e0a2ec74
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43407
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43410
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit addds support for auxiliary controls invocation time in
PGPE Header.
Change-Id: I035324d1f1d8daeb1bcaee56eb06bc91156b6422
RTC: 177182
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44075
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44077
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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HW-Image-Coreq: yes
Change-Id: Ie50b4fe582d16ec0e145a5222122ed4d99a07812
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43299
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43335
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit adds support for HOMER rebuild phase. In this phase,
SPR restore entries, Cache and Core SCOM restore entries are
preserved whereas everything else is rebuilt.
Change-Id: I55a006bf573fab1cc6f57763122c43b6b258166a
CQ: SW378013
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42586
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42716
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- STOP API is used to create SCOM Restore entries. Commit
intends to improve the way failure handling of API.
Change-Id: I5c003455ab21c3b435fdd1e711e2a4a36d7efb28
RTC: 173640
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40610
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40612
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Complete the move to platform SYSTEM_*_DISABLED and HWP *_ENABLED attributes
- Added VDM DPLL response attribute to CME header mapping
- Updated review comments
Change-Id: If8f8e42fd94825623315e8a7c28105cca8c8c8b2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42918
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42920
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>
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Updated to poll Nimbus DD level and whether there's support
for overlays in the XIP interface.
Further, updated to add three extra args in xip_customize API, two
of which are to support a third ring work buffer for the overlays
handling. This has necessitated making changes to hcode_image_build
(HIB) API as well.
Note that the calling codes of xip_customize and HIB need to be
updated to supply the additional args in their APIs.
Note that this code stage 1 will work for Nimbus DD2 with Gptr
rings in Mvpd, and no Gptr rings in the HW image. It will, however,
not work if there's content in .overlays or if there's Gptr rings
already in the .rings section. Thus, the stage 1 code here will
work with a DD2 image (i.e., that does NOT have Gptr rings in
.rings in HW image) as long as noone has put any real Gptr
initfiles in for processing (which would result in ring content
in .overlays). We must ensure that the stage 2 code of xip_customize
gets merged on the HB side to enable processing of .overlays content
before we actually add any Gptr initfiles for the .overlays section
into EKB.
Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40898
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>
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- Incorporates code changes in scan ring handling for
level 3 readiness of Hcode Image Build.
- Updates in documentation
Change-Id: Icb6a49e05d61a1a2e9e42eb43d39aee8f9e165c9
RTC: 173640
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40545
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40607
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>
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- Incorporates code changes necessary for level 3
readiness of hcode region of HOMER.
Change-Id: I9487e61b1ee4e602975884b5dd422d74337d1b9d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40543
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40551
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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Commit restores the magic words of CPMR, QPMR and PPMR region to
CPMR_1.0, QPMR_1.0 and PPMR_1.0 respectively. It dissociates it
with EC level.
Change-Id: I4a5a40f0d766eb80eaba09fb216b93ae54d0219e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42366
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42368
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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Change-Id: Ie6ba97a29ef109ff3b50ea8ace34701830d876ba
RTC: 174995
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41745
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41952
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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- Moved to "system disabled" paradigm (eg functions are ON but default)
- Moved p9_hcode_image_build to using HWP attributes from
p9_pstate_parameter_block
- Added Pstate Auto Start to p9_pm_pstate_gpe_init to support advanced functions
in Cronus
- Add p9_pstate_parameter_block_errors
- Added error points for #V validity. One creates an information error log and
disables WOF. Others disable Pstates.
- Add error points for resonant clocking errors in p9_pstate_parameter_block
- Refactoring
- Subfunction API change for p9_setup_evid
- Added wof header verification and tested the code
- Corrected Jump value verification
- Removed the check for 0 values of N_S and N_L
- Address Gerrit comments on validation
- Added verification for VFRT header and fixed vfrt header members
- Rebase with VFRT fix (after merge)
- Added some checks in iac vdn calculation part
- IDDQ output formating updates
- Fixed VDM and WOF disable checks
Change-Id: I3e62e04c7873bb6bb7c8d96e1e91d72fb044d81e
RTC: 173672
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40954
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41096
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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L3_REF_TIMER_DIVIDE_MINOR needs to be left at default value of
Divide by 10 for DD1.X, DD2.0 due to bug
Change-Id: I9bfbf243ecf854c2375e852f60d0bcb47812fe87
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41893
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41900
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Hcode image build temporarily adds dd level specific magic word
in HOMER. This broke STOP API and HOMER parser which check for
a DD1 specific magic word to validate CPMR region of HOMER. Commit
makes those check independent of DD level variation.
Change-Id: I2c59c5367c462506c05c1703865b9a4a7ec198c3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41736
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41825
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The following should apply to all chips/systems.
1) Set edram refresh divider to optimal value based on
pb frequency
2) performance fix for castout pacing. Base value was too
high.
Change-Id: I7f280f9826ba7483a31b64aca5caf36affaea843
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41248
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41650
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit is part of series of commits planned for making
hcode image build level 3 ready. Commit intends to
improve debuggability of HWP in case of bad input
arguments.
Change-Id: Ib38636f32fdf0d89f39fff0324302cea86c1e48c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40118
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40122
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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HW-Image-Prereq: Id684ecb68d987f6ecd3f2e0476ab9aa2adce338f
Change-Id: Ia1c450445b69052ca6f83e026075e48b82d4bdb1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40827
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40829
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I5d1fd3c50b37ebd97fd38f9a8cc6318eae71ba08
RTC: 173612
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40764
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40791
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Hcode queries HW Image and gets DD specific executable.
- Appends separate magic words in HOMER header based on DD level.
Change-Id: I2878c7809d8eba69255c74baa68a5baebeb983df
RTC: 168880
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39871
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39872
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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> Fixed attribute check for fbc pump mode to set chip==node bit
> Fixed skip_g bit set in ncu scominit
Change-Id: I1ed0182975b67680d4632a87f7cc6bcf8389c4a3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40739
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40741
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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