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path: root/src/import/chips/p9/procedures/hwp/memory
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* Restore FIR and reorder queue settings after mss sim initJenny Huynh2017-05-241-1/+10
* p9_cen_ref_clk_enable -- p9 initial versionPeng Fei GOU2017-05-221-21/+0
* Fix seg fault on DQS alignment workaround faultJacob Harvey2017-05-221-2/+1
* Removes traits to mirror DD2 hardwareStephen Glancy2017-05-223-11/+0
* Adds DCD calibration control attributesStephen Glancy2017-05-223-0/+60
* Add DLL workaround and unit testsAndre Marin2017-05-128-28/+707
* Added DQS alignment workaroundStephen Glancy2017-05-126-26/+602
* Move index API to generic/memory folderAndre Marin2017-05-129-92/+8
* Add PHY sequencer refresh settings after draminitAndre Marin2017-05-129-15/+394
* Fixes RD VREF runtime calculationStephen Glancy2017-05-073-4/+8
* Add empty DQS alignment workaroundsAndre Marin2017-05-052-0/+48
* p9_mss_setup_bars -- customize interleave granularityJoe McGill2017-05-051-0/+24
* Change RD_CTR workaround val and update attr nameJacob Harvey2017-05-032-5/+5
* Add empty dll workaround files for HB CI to mirrorAndre Marin2017-04-272-0/+48
* Fix eff_config_thermal's powerlimit check SW386095Jacob Harvey2017-04-277-50/+72
* Added read ctr bad delay workaroundStephen Glancy2017-04-276-6/+450
* Increasing CCS polling limit for HB timeoutJacob Harvey2017-04-271-3/+3
* Move memory_size API to generic folder to share among controllersAndre Marin2017-04-233-65/+7
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-04-203-13/+13
* Fix up setup_cal and vref attrsJacob Harvey2017-04-178-33/+115
* Fix MCBIST lab tool to print compare mode fail logs for all ports in bcast modeLouis Stermole2017-04-142-0/+40
* Added RCD Protect time and MNFG Flag check to unmask functionMatthew Hickman2017-04-132-26/+230
* L3 procedure work for p9_mss_draminit_trainingJacob Harvey2017-04-077-93/+230
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-04-071-1/+1
* Add empty zqcal files for HB to mirrorAndre Marin2017-04-062-0/+48
* Fixed blue waterfall's error messageStephen Glancy2017-04-021-1/+1
* Change base decoder, add ddr4 namespace, and common API btw modulesAndre Marin2017-04-022-62/+46
* Fixed blue waterfall workaround bugsStephen Glancy2017-04-022-6/+4
* Disable ECC Hash in simAndre Marin2017-04-021-2/+6
* Updates DCD to pass on a/b failureStephen Glancy2017-03-311-6/+8
* Add base spd decoder to share among controllersAndre Marin2017-03-2726-10659/+37
* Modify sim delay after reset_n due to VBU performance hitAndre Marin2017-03-271-2/+6
* Fix defect SW384182 for p9_mss_eff_config_thermalJacob Harvey2017-03-242-4/+6
* Attribute support of customization of Nimbus DD1 PCI reference clock speed.Thi Tran2017-03-241-0/+22
* Added background scrub and unmasking firs to mss_scrubMatthew Hickman2017-03-231-0/+14
* Fixed unmasking bug on Ecc Bit 52/55 after draminit mcMatthew Hickman2017-03-231-2/+2
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-03-231-3/+3
* Fixing tfaw and trrd calculationsJacob Harvey2017-03-235-367/+239
* Move find API to share among memory controllersAndre Marin2017-03-2250-528/+51
* Fixes underflow error in DCD calStephen Glancy2017-03-222-16/+19
* Move scom API to share among controllersAndre Marin2017-03-1842-439/+52
* Fix build error: nonnull argument compared to NULLStewart Smith2017-03-171-6/+0
* Fix add rtt_wr eff_dimm unit tests and header file fixAndre Marin2017-03-162-10/+13
* Updates code to run PHY DCD calibrationStephen Glancy2017-03-165-177/+535
* Update mss_eff_config to L3Jacob Harvey2017-03-1610-108/+356
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-03-162-16/+16
* Disable RTT_WR during WR_LEVEL cal step, and set equivalent terminationsLouis Stermole2017-03-158-67/+984
* Add pos API to be shared among controllers, move generic files to utilsAndre Marin2017-03-1545-308/+97
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-03-142-9/+9
* Fixing eff_config_thermal wrapper, added error xmlJacob Harvey2017-03-141-0/+10
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