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* Implementing draminit_training_advJacob Harvey2017-08-291-0/+20
| | | | | | | | | | | | | | | | | | | Set default pattern to john's new one and backup to supernova 2.0 Change-Id: I406bb5c5652cff9fe4690e5bd9b03cc431d75f61 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44709 Dev-Ready: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44780 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-191-19/+17
| | | | | | | | | | | | | | | | Change-Id: I70ad1f23dabc4b9f169821b30a903a200f52fbc4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42437 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42452 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
* Added register reset functionality for DD2Stephen Glancy2017-06-071-18/+85
| | | | | | | | | | | | | | | | | DD2 updates register reset functionality to require writes to clear registers. This updates to do writes for both DD1 and DD2. This commit also fixes a UT fail caused by wat_debug_attention w/a not on DD2. Change-Id: Ib30e72e8773d16513ddf1c958fa76612a662cbb6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40763 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40863 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Removes traits to mirror DD2 hardwareStephen Glancy2017-05-221-6/+0
| | | | | | | | | | | | | | | | | | | DD2 hardware removed bits that are not used in DDR4 in the PHY. This commit removes unused traits that were removed in DD2 HW> Change-Id: Ia6e76207a8dd6d4f276e82100c43759c9493c911 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40503 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40507 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixes RD VREF runtime calculationStephen Glancy2017-05-071-1/+3
| | | | | | | | | | | | | | | Change-Id: Ie24cb609dfea8ed53406b7c231129ccb40b8ddc1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39773 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39808 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix up setup_cal and vref attrsJacob Harvey2017-04-171-1/+1
| | | | | | | | | | | | | | | | | | | Fix bug when setting RD_VREF but not RD_CNTR Change name of MSS_VREF_CAL_STEP_ENABLE to MSS_RDVREF_CAL_STEP_ENABLE Set RD_VREF_CALENABLE_REG in setup_cal Change-Id: Ie4117a53c2ae2e53e7b753cc2b0b127cab0d4caf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38484 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38488 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-04-071-1/+1
| | | | | | | | | | | | | | | Change-Id: Ice151f9f732c04160247ac153b656cdf8629f5d7 Original-Change-Id: Iafcaddbca510c29fb4a0289490b90b539dde2b13 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37610 Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38762 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed register values for RD VREFStephen Glancy2017-02-111-4/+4
| | | | | | | | | | | | | | | | Change-Id: I28167e1a2a627c3b955ef2cf91cdec32f5d0c22e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35911 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: RYAN P. KING <rpking@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35917 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable read VREF calibrationBrian Silver2016-11-091-17/+41
| | | | | | | | | | | | | | | | | | | | Slow the vref cal to as slow as possible Update unit tests, add changes to master for f/w Depends-On: Iab8e21a934368fcf201f0e7b91aa8b859b3b0e47 Change-Id: I1da1e0de254f2b2671c9c7d555620ef3cd3cb6a4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31556 Dev-Ready: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31560 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Change PHY to use GPO, RLO, WLO from VPDBrian Silver2016-09-081-3/+1
| | | | | | | | | | | | | | | | | | | Remove extra slew calibration files Update VBU VPD CMVC-Prereq: 1005024 Change-Id: I5681135761a19bf9223a1e63ed5a2d47d0944dc8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29227 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29228 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes related to PHY register reviewBrian Silver2016-09-031-5/+3
| | | | | | | | | | | | | | | | | Remove slew_cal.C as it's not needed in Nimbus Verify sysclk pr is proper when not in sim Add timing values which are needed for PHY SEQ config Aggregate other memory timing parameters into timing.H Change-Id: I4c5374df8693f6a6be7ba0a1d741eaf3929b6f92 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29045 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29185 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Fix eff_config, remove custom_dimmJacob Harvey2016-08-301-14/+3
| | | | | | | | | | | | | Change-Id: Icc9bf700cbdf41467c4b0733f878d98b5dd76fed Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27930 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28184 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
| | | | | | | | Change-Id: I25a782f6f8af801beb35f541f6076c482b78bf8e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27920 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add eff_config functionality needed for RIT, fix cas_latency bug & attr filesAndre Marin2016-05-191-1/+1
| | | | | | | | | | | | | Change-Id: I508ea4b156ff26ff7c652e28510a535b90030434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23796 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23799 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change PHY PC, RC and DP16 register blocks to functional APIBrian Silver2016-05-041-338/+346
| | | | | | | | | | | | | Change-Id: I37fe3b5204defdced954976aabffdfdc1dde91e1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23015 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23016 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change include paths in memory/lib, testsBrian Silver2016-04-211-1/+1
| | | | | | | | | | | | | | | Change-Id: I34081c5f245798c830f9e6c51b560cab303d65d5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23045 Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23046 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change read control API to match desired design, add design docBrian Silver2016-04-011-2/+29
| | | | | | | | | | | | Change-Id: I008392a4b24461906735546b9af37a89c5600600 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24657 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22771 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change RC_CONFIG2 for sim settings (BL8)Brian Silver2016-04-011-22/+23
| | | | | | | | | | | | Change-Id: Iab23944adfdafa61697be391c73963fac816a473 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24515 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22769 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed doxygen errors and typosJacob Harvey2016-04-011-35/+35
| | | | | | | | | | | | | Change-Id: I86313e4af81003744f0ab6c507d019a39c4a4992 Original-Change-Id: I94120c654c32b5c3513740ce8aae4b4cc632fc41 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24281 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22767 Tested-by: FSP CI Jenkins Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add PHY RC class, update setup cal for 2D wc/rcBrian Silver2016-04-011-0/+458
Change-Id: Ib88a26b34176d461622259409aaef9d0ca86244d Original-Change-Id: I18cfd506cdde8730f88e892af7cd97d93fb74434 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23561 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22762 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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