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path: root/src/import/chips/p9/procedures/hwp/memory/lib/phy/phy_cntrl.H
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* HB Improvements: Fix compiler warnings on modern compilersLuis Fernandez2019-03-261-2/+2
* Adds per-Buffer addressability API for LRDIMMStephen Glancy2018-10-031-1/+18
* Modify enum to get around compile issuesaravnair-in2017-09-081-3/+3
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-191-2/+2
* Added register reset functionality for DD2Stephen Glancy2017-06-071-15/+30
* Add DLL workaround and unit testsAndre Marin2017-05-121-10/+54
* Add PHY sequencer refresh settings after draminitAndre Marin2017-05-121-0/+124
* Move scom API to share among controllersAndre Marin2017-03-181-2/+2
* Update mss_decode_shadow_regs to use library MRS decodersLouis Stermole2016-11-041-0/+3
* Changes for PHY zctl, bb lock, force_mclk_lowBrian Silver2016-10-121-1/+1
* Header file updates based on 9067 figtreeBen Gass2016-09-241-4/+4
* Change PHY to use GPO, RLO, WLO from VPDBrian Silver2016-09-081-0/+159
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
* Add ZCNTL enable in phy resetBrian Silver2016-07-131-0/+58
* Add DLL CalibrationBrian Silver2016-07-131-4/+73
* Change init cal error checking as apb fir register changedBrian Silver2016-05-121-0/+4
* Change PHY PC, RC and DP16 register blocks to functional APIBrian Silver2016-05-041-102/+102
* Change include paths in memory/lib, testsBrian Silver2016-04-211-1/+1
* Add phy control error checking, clean up dp16, apbBrian Silver2016-04-011-0/+203
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