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path: root/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C
Commit message (Expand)AuthorAgeFilesLines
* Porting repair_state class and related functionsNico Fajardo2020-01-291-1/+15
* Adds explorer CCS specializationStephen Glancy2019-06-031-2/+2
* NVDIMM wr_vref workaround fix and add refreshes to ccs program (nvdimm only)Tsung Yeung2019-05-171-1/+1
* Fixed the ccs port merge conflicts and added lab codeMatthew Hickman2019-05-131-4/+4
* Enable median rank wr_vref value on NVDIMMTsung Yeung2019-04-051-0/+24
* Fixes LRDIMM rank configuration for dual-dropStephen Glancy2019-03-131-0/+2
* Add new algorithm for MREP and error logshlimeng2019-02-221-3/+3
* Adds MRD coarseStephen Glancy2018-12-141-0/+8
* Adds LRDIMM MWD fine training stepLi Meng2018-12-141-0/+8
* Adds LRDIMM MWD coarse training stepLi Meng2018-12-131-0/+12
* Adds LRDIMM MRD - DRAM to buffer RD calibrationStephen Glancy2018-12-051-3/+8
* Adds LRDIMM DWL training stepStephen Glancy2018-11-291-0/+15
* Updates training steps factory to be LRDIMM capableStephen Glancy2018-10-151-14/+67
* Adds skeleton code for LRDIMMStephen Glancy2018-09-181-0/+3
* Moves conversions to be in the generic code spaceStephen Glancy2018-08-201-2/+3
* Updates the training advanced algorithmStephen Glancy2018-06-211-106/+178
* Updates training advanced workarounds to run after a failureStephen Glancy2018-06-211-22/+53
* Moves count_dimm to be in the memory generic folderStephen Glancy2018-04-051-1/+1
* Updates training advanced and adds custom WR CTRStephen Glancy2018-01-131-4/+223
* Fixes WR LVL terminationsStephen Glancy2018-01-131-1/+16
* Updates WR VREF for characterization resultsStephen Glancy2018-01-131-5/+232
* Worksaround AWAN simulation failureStephen Glancy2017-11-271-2/+9
* Updates dramint training structureStephen Glancy2017-11-101-0/+722
* Adds empty training files for HB to mirrorStephen Glancy2017-10-251-0/+24
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