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path: root/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C
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* Fixed the ccs port merge conflicts and added lab codeMatthew Hickman2019-05-131-7/+11
* Fixes LRDIMM command to command timingStephen Glancy2019-04-301-2/+2
* Disables RD VREF for LRDIMMStephen Glancy2019-04-241-2/+4
* Fixes for LRDIMM dual drop DB trainingLi Meng2019-04-121-1/+7
* Fix duplicate symbol errors from DEFAULT_MC_TYPELouis Stermole2019-04-051-0/+1
* Fix c_str and pos DIMM specializationAndre A. Marin2019-04-021-0/+1
* Fixes LRDIMM rank configuration for dual-dropStephen Glancy2019-03-131-7/+8
* Fixes LRDIMM training issueLi Meng2019-02-261-14/+47
* Add new algorithm for MREP and error logshlimeng2019-02-221-138/+186
* Adds workaround for LRDIMM to clear FIRsLi Meng2019-02-131-0/+6
* Fixes LRDIMM NTTM mode read timing for HW bugStephen Glancy2019-02-131-1/+7
* Adds MRD coarseStephen Glancy2018-12-141-1/+1
* Adds LRDIMM MWD coarse training stepLi Meng2018-12-131-40/+1
* Adds LRDIMM MRD - DRAM to buffer RD calibrationStephen Glancy2018-12-051-39/+1
* Adds LRDIMM helper functionsStephen Glancy2018-11-301-0/+4
* Adds LRDIMM DWL training stepStephen Glancy2018-11-291-40/+3
* Updates LRDIMM code to utilize board swizzlingStephen Glancy2018-11-091-29/+135
* Adds MREP training for LRDIMMStephen Glancy2018-10-291-12/+400
* Fixes b-side bug in MPR write functionStephen Glancy2018-10-291-39/+22
* Adds code to run MPR writes on all ranks in a rank pairStephen Glancy2018-10-291-0/+127
* Updates training steps factory to be LRDIMM capableStephen Glancy2018-10-151-1/+30
* Adds skeleton code for LRDIMMStephen Glancy2018-09-181-0/+207
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