| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add DP16 API and unit testing needed to set PBA mode for LRDIMMs | Andre Marin | 2017-02-07 | 1 | -15/+82 |
| * | Added periodic cal fix - fixes bad delays | Stephen Glancy | 2017-01-30 | 1 | -0/+4 |
| * | Add FORCE_FIFO_CAPTURE API and UTs. scominit cleanup. | Andre Marin | 2017-01-30 | 1 | -1/+34 |
| * | Adds WR VREF error logging | Stephen Glancy | 2016-12-07 | 1 | -0/+76 |
| * | Add EC feature levels to MSS workarounds | Brian Silver | 2016-11-11 | 1 | -4/+4 |
| * | Enable read VREF calibration | Brian Silver | 2016-11-09 | 1 | -15/+85 |
| * | Add DP16 workarounds for Nimbus DD1.0 | Brian Silver | 2016-11-08 | 1 | -1/+8 |
| * | Change bad bit processing to process bad bit attributes | Brian Silver | 2016-10-31 | 1 | -67/+263 |
| * | Add magic port capabilties for DDR PHY | Brian Silver | 2016-10-31 | 1 | -1/+2 |
| * | Change DLL cal init for spare DP8 - don't cal | Brian Silver | 2016-10-19 | 1 | -12/+1 |
| * | Add disabled bit processing for DDR PHY initial calibration | Brian Silver | 2016-10-19 | 1 | -0/+334 |
| * | Add RCD parity, clear parity FIR before training | Brian Silver | 2016-10-17 | 1 | -3/+18 |
| * | Changes to limit DLL cal on spare DP8, stop CSS before starting | Brian Silver | 2016-10-16 | 1 | -1/+11 |
| * | Change CTLE processing to not be off-by-one | Brian Silver | 2016-10-13 | 1 | -41/+57 |
| * | Add support for ATTR_MSS_VPD_MT_WINDAGE_RD_CTR | Brian Silver | 2016-10-07 | 1 | -0/+76 |
| * | Added WR VREF register API and reset procedures | Stephen Glancy | 2016-09-26 | 1 | -0/+392 |
| * | Changes related to PHY register review, Round 3 | Louis Stermole | 2016-09-20 | 1 | -2/+4 |
| * | Fixed PHY impedance bugs and commments | Stephen Glancy | 2016-09-15 | 1 | -4/+4 |
| * | Change PHY to use GPO, RLO, WLO from VPD | Brian Silver | 2016-09-08 | 1 | -0/+11 |
| * | Change VPD for power on and VBU | Grover Monster | 2016-09-02 | 1 | -2/+2 |
| * | Fix eff_config, remove custom_dimm | Jacob Harvey | 2016-08-30 | 1 | -6/+6 |
| * | Added support for PHY drive strength attributes | Stephen Glancy | 2016-08-23 | 1 | -0/+287 |
| * | Adding initialization of PHY RD_VREF according to ATTR_MSS_VPD_MT_VREF_MC_RD | Louis Stermole | 2016-08-22 | 1 | -0/+112 |
| * | Add reset_dll API | Brian Silver | 2016-08-12 | 1 | -0/+131 |
| * | Add init CTLE from VPD | Brian Silver | 2016-08-09 | 1 | -12/+174 |
| * | Add support for phy ac boost | Brian Silver | 2016-08-06 | 1 | -0/+125 |
| * | Update prologs of mirrored files to apache license | Stephen Cprek | 2016-08-05 | 1 | -8/+14 |
| * | Add flush, init io to phy reset | Brian Silver | 2016-07-21 | 1 | -1/+11 |
| * | Add DLL Calibration | Brian Silver | 2016-07-13 | 1 | -2/+15 |
| * | Change mss build to account for double free in wrappers | Brian Silver | 2016-06-17 | 1 | -6/+6 |
| * | Change PHY PC, RC and DP16 register blocks to functional API | Brian Silver | 2016-05-04 | 1 | -34/+29 |
| * | Add dp16 io tx dll/vreg config | Brian Silver | 2016-04-01 | 1 | -5/+80 |
| * | Add phy control error checking, clean up dp16, apb | Brian Silver | 2016-04-01 | 1 | -11/+9 |
| * | Fixed doxygen errors and typos | Jacob Harvey | 2016-04-01 | 1 | -10/+9 |
| * | Added mss::get/putScom | Brian Silver | 2016-04-01 | 1 | -8/+9 |
| * | Initial commit of memory subsystem | Brian Silver | 2016-04-01 | 1 | -0/+330 |
