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path: root/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
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* Change PHY PC, RC and DP16 register blocks to functional APIBrian Silver2016-05-041-23/+16
* Change PHY APB register block to functional APIBrian Silver2016-05-041-41/+13
* Add relative position functionsBrian Silver2016-04-221-13/+13
* Fix error in training by removing inline specifiersBrian Silver2016-04-011-6/+6
* Add dp16 io tx dll/vreg configBrian Silver2016-04-011-83/+5
* Add phy control error checking, clean up dp16, apbBrian Silver2016-04-011-24/+210
* Change procedure include pathsBrian Silver2016-04-011-5/+5
* Add support for checking PC errors on initial calBrian Silver2016-04-011-1/+30
* Change WC to follow the new register block patternBrian Silver2016-04-011-0/+3
* Change read control API to match desired design, add design docBrian Silver2016-04-011-9/+3
* Change WRCLK_PR so that we don't trash the sim initsBrian Silver2016-04-011-2/+4
* Fixed doxygen errors and typosJacob Harvey2016-04-011-37/+37
* Add dump_regs for PHY registersBrian Silver2016-04-011-0/+1336
* Add PHY RC class, update setup cal for 2D wc/rcBrian Silver2016-04-011-1/+138
* Changes related to model 31, attr changes for sim latenciesBrian Silver2016-04-011-2/+8
* Added mss::get/putScomBrian Silver2016-04-011-19/+19
* Initial commit of memory subsystemBrian Silver2016-04-011-0/+881
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