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path: root/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
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* Add Write CRC attributes to xml and eff_dimmAndre Marin2017-09-251-0/+256
* Expanding MCU tag fifo settings to be freq dependent.Lennard Streat2017-09-131-0/+24
* ZZ VPD Pass 4 Board UpdateChris Yan2017-09-071-362/+444
* Implementing draminit_training_advJacob Harvey2017-08-291-33/+141
* Adds DDR4 hybrid NV-RDIMM supportStephen Glancy2017-08-291-3/+3
* Add in L1 draminit_training_adv filesJacob Harvey2017-08-221-0/+90
* Modify BAD_DQ_BITMAP to DIMM target for FW to reuse w/CentaurAndre Marin2017-08-211-73/+6
* Improve description of ATTR_EFF_RANK_GROUP_OVERRIDELouis Stermole2017-08-181-12/+39
* Modified gen_accessors script for greater supportAndre Marin2017-08-181-1224/+0
* Make freq_x_mhz attribute writeablecrgeddes2017-08-141-2/+2
* Enable skipping sbefifo reset during p9_start_cbsMatt K. Light2017-08-141-0/+21
* mc_pll_bucket attributeAnusha Reddy Rangareddygari2017-07-111-0/+20
* dcc skew adjust procedure updateAnusha Reddy Rangareddygari2017-07-111-0/+42
* Add in RCD attributes for DD2 debugJacob Harvey2017-07-111-0/+252
* add support for OBUS PLL bucketsJoe McGill2017-06-221-4/+4
* Fix tREFI calculation to use MRW REFRESH REQUEST RATE as opposed to TEMP RANGEAndre Marin2017-06-141-1/+1
* Update behavioral description of ATTR_SECURITY_MODE attributeNick Bofferding2017-05-311-3/+8
* Remove ZQCAL redundant CCS inst, move to draminit_trainingAndre Marin2017-05-251-28/+43
* p9_cen_ref_clk_enable -- p9 initial versionPeng Fei GOU2017-05-221-21/+0
* Add PHY sequencer refresh settings after draminitAndre Marin2017-05-121-0/+79
* p9_mss_setup_bars -- customize interleave granularityJoe McGill2017-05-051-0/+24
* Fix up setup_cal and vref attrsJacob Harvey2017-04-171-0/+82
* Attribute support of customization of Nimbus DD1 PCI reference clock speed.Thi Tran2017-03-241-0/+22
* Disable RTT_WR during WR_LEVEL cal step, and set equivalent terminationsLouis Stermole2017-03-151-0/+90
* Existing code changes for ddr_phy_reset HB mirrorLuke Mulkey2017-03-011-0/+41
* Add attribute ATTR_EFF_RANK_GROUP_OVERRIDELouis Stermole2017-02-271-0/+96
* Removing ATTR_PROC_FABRIC_ADDR_BAR_MODEThi Tran2017-02-231-21/+0
* Fixing raw card setting for DIMMsJacob Harvey2017-02-211-81/+81
* Updates MCBIST for dual-drop systemsStephen Glancy2017-02-101-0/+22
* Disabling temp_refresh_modeJacob Harvey2017-02-101-82/+20
* Implement BC attributes and make eff_dimm classJacob Harvey2017-01-251-0/+20
* FBC updates for HW383616, HW384245Joe McGill2017-01-241-3/+3
* Updating VPD XML descriptionsJacob Harvey2017-01-201-24/+39
* Add MSS customization support from CRP0 Lx MVPDJoe McGill2017-01-041-7/+147
* Move MRS attributes to eff_config to calc LRDIMMsJacob Harvey2017-01-031-1/+280
* Improve detection and description for MEMVPD_POS issuesDan Crowell2016-12-201-4/+5
* Add rank config MRW override to plug rulesBrian Silver2016-12-081-0/+90
* Fixing bulk_pwr_throttles calculationsJacob Harvey2016-12-051-6/+28
* Add LRDIMM to translation register infrastructure and unit tests.Andre Marin2016-11-141-99/+27
* Add EC feature levels to MSS workaroundsBrian Silver2016-11-111-0/+1
* Enable read VREF calibrationBrian Silver2016-11-091-12/+15
* sector buffer,pulse mode attributesAnusha Reddy Rangareddygari2016-11-081-0/+60
* Add DP16 workarounds for Nimbus DD1.0Brian Silver2016-11-081-0/+122
* Power Thermal initJacob Harvey2016-11-031-2/+2
* Implement L2 eff_config_thermal, bulk_pwr_throttleJacob Harvey2016-11-011-40/+124
* Change bad bit processing to process bad bit attributesBrian Silver2016-10-311-0/+99
* Fixed CL and timing bugs, unit test augmentationsStephen Glancy2016-10-311-27/+124
* Started implementation of bulk_pwr_throttlesJacob Harvey2016-10-271-440/+24
* Add ATTR_MSS_MRW_POWER_CONTROL_REQUESTEDJacob Harvey2016-10-201-2/+25
* Add disabled bit processing for DDR PHY initial calibrationBrian Silver2016-10-191-0/+22
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