| Commit message (Expand) | Author | Age | Files | Lines |
* | Revert "Adds self time refresh entry and exit helper functions" | Daniel M. Crowell | 2018-03-16 | 1 | -50/+0 |
* | Adds self time refresh entry and exit helper functions | Tsung Yeung | 2018-02-24 | 1 | -0/+50 |
* | Fixes tDLLK timing for 2666 | Stephen Glancy | 2018-02-24 | 1 | -3/+32 |
* | Fix tWLDQSEN and IPW_WR_WR timing parameters for MSS training | Louis Stermole | 2017-11-21 | 1 | -11/+42 |
* | Update HPW Level for MSS API library | Andre Marin | 2017-11-01 | 1 | -1/+1 |
* | Fix order of sequence for register control words, and CKE levels | Andre Marin | 2017-09-05 | 1 | -0/+10 |
* | Fixes RCW timing in draminit | Stephen Glancy | 2017-06-20 | 1 | -1/+22 |
* | Fix tREFI calculation to use MRW REFRESH REQUEST RATE as opposed to TEMP RANGE | Andre Marin | 2017-06-14 | 1 | -6/+6 |
* | L3 RAS for draminit_training, eff_config, lib | Jacob Harvey | 2017-06-11 | 1 | -10/+10 |
* | Fixing tfaw and trrd calculations | Jacob Harvey | 2017-03-23 | 1 | -297/+4 |
* | Move find API to share among memory controllers | Andre Marin | 2017-03-22 | 1 | -1/+1 |
* | Update mss_eff_config to L3 | Jacob Harvey | 2017-03-16 | 1 | -41/+171 |
* | Add read cmd, precharge all cmd, and read cmd CCS instruction and unit tests | Andre Marin | 2017-01-03 | 1 | -0/+10 |
* | Add DDR4 data buffer control words (BCWs) infrastructure & UT's. | Andre Marin | 2016-12-06 | 1 | -0/+10 |
* | Add to the scom blastah unit tests | Brian Silver | 2016-12-05 | 1 | -0/+3 |
* | Added WR VREF latch command | Stephen Glancy | 2016-11-04 | 1 | -0/+28 |
* | Fixed CL and timing bugs, unit test augmentations | Stephen Glancy | 2016-10-31 | 1 | -59/+893 |
* | Change WR_CNTR_FW values | Brian Silver | 2016-09-25 | 1 | -0/+40 |
* | Add SEQ timing parameters, DP16 RD Diag config 5 inits | Brian Silver | 2016-09-14 | 1 | -0/+36 |
* | Change SEQ timings, SEQ ODT, WC config and DQS polarity | Brian Silver | 2016-09-12 | 1 | -1/+2 |
* | Change PHY to use GPO, RLO, WLO from VPD | Brian Silver | 2016-09-08 | 1 | -11/+33 |
* | Changes related to PHY register review | Brian Silver | 2016-09-03 | 1 | -0/+201 |
* | Fix eff_config, remove custom_dimm | Jacob Harvey | 2016-08-30 | 1 | -12/+26 |
* | Remove eff_config hardcoded values, mirroring, trfc_dlr, & modify ut's | Andre Marin | 2016-08-25 | 1 | -0/+11 |
* | Fix tREFI bug for eff_config, add and fix existing unit tests | Andre Marin | 2016-08-06 | 1 | -41/+38 |
* | Update prologs of mirrored files to apache license | Stephen Cprek | 2016-08-05 | 1 | -8/+14 |
* | Add eff_config functionality needed for RIT, fix cas_latency bug & attr files | Andre Marin | 2016-05-19 | 1 | -5/+3 |
* | Fix throttle procedure & MSS attribute clean up | Andre Marin | 2016-05-12 | 1 | -18/+37 |
* | Modify freq & dep. files. Add cas latency & unit tests | Andre Marin | 2016-04-22 | 1 | -177/+6 |
* | Change include paths in memory/lib, tests | Brian Silver | 2016-04-21 | 1 | -3/+5 |
* | Modify spd_decoder, eff_config, unit tests. Modify dependent files | Andre Marin | 2016-04-01 | 1 | -0/+293 |