| Commit message (Expand) | Author | Age | Files | Lines |
* | Updates error paths for PRD FIR checking | Stephen Glancy | 2017-10-02 | 3 | -12/+10 |
* | Add Write CRC attributes to xml and eff_dimm | Andre Marin | 2017-09-25 | 2 | -0/+108 |
* | Modify VPD decoder to take into account deconfigured ports | Andre Marin | 2017-09-25 | 1 | -42/+56 |
* | Updates RCD power settings | Stephen Glancy | 2017-09-18 | 1 | -2/+69 |
* | Skip ports without DIMMs for VPD collection | Jacob Harvey | 2017-09-18 | 1 | -0/+5 |
* | Fix order of sequence for register control words, and CKE levels | Andre Marin | 2017-09-05 | 3 | -18/+51 |
* | Implementing draminit_training_adv | Jacob Harvey | 2017-08-29 | 2 | -4/+89 |
* | Adds DDR4 hybrid NV-RDIMM support | Stephen Glancy | 2017-08-29 | 2 | -28/+1 |
* | Fix draminit_training error logging and unit test | Jacob Harvey | 2017-08-19 | 1 | -2/+36 |
* | L3 work for mss xmls | Jacob Harvey | 2017-08-18 | 3 | -7/+8 |
* | Change tREFI calc to be 99% of calculated result to stay within lab margin | Andre Marin | 2017-08-07 | 1 | -4/+5 |
* | L3 draminit and mss_lib | Jacob Harvey | 2017-07-26 | 28 | -278/+393 |
* | L3 support for ddr_phy_reset, termination_control | Jacob Harvey | 2017-07-24 | 6 | -7/+7 |
* | L3 support for ddr_phy_reset, termination_control | Jacob Harvey | 2017-07-19 | 13 | -33/+21 |
* | Add in RCD attributes for DD2 debug | Jacob Harvey | 2017-07-11 | 2 | -5/+123 |
* | Turn off A17 if not needed | Jacob Harvey | 2017-06-25 | 3 | -8/+117 |
* | Fixes DD2 training bug | Stephen Glancy | 2017-06-23 | 1 | -28/+36 |
* | Fix CSID: 2 slave ranks, termination in RCBCX | Jacob Harvey | 2017-06-22 | 2 | -37/+131 |
* | Fixes RCW timing in draminit | Stephen Glancy | 2017-06-20 | 1 | -5/+7 |
* | Modify DRAM_LPASR to be set based on MRW REFRESH_RATE_REQUEST attr | Andre Marin | 2017-06-15 | 1 | -3/+22 |
* | Fix tREFI calculation to use MRW REFRESH REQUEST RATE as opposed to TEMP RANGE | Andre Marin | 2017-06-14 | 2 | -5/+17 |
* | Double POR timings (tMOD, tMRD, and tZQ) for more margin per lab | Andre Marin | 2017-06-14 | 2 | -9/+17 |
* | L3 RAS for draminit_training, eff_config, lib | Jacob Harvey | 2017-06-11 | 2 | -38/+27 |
* | Fixed CSID value for DD2 | Stephen Glancy | 2017-06-07 | 1 | -1/+5 |
* | Remove ZQCAL redundant CCS inst, move to draminit_training | Andre Marin | 2017-05-25 | 5 | -63/+213 |
* | Add PHY sequencer refresh settings after draminit | Andre Marin | 2017-05-12 | 2 | -14/+34 |
* | Added read ctr bad delay workaround | Stephen Glancy | 2017-04-27 | 1 | -0/+1 |
* | Fix up setup_cal and vref attrs | Jacob Harvey | 2017-04-17 | 2 | -5/+5 |
* | L3 procedure work for p9_mss_draminit_training | Jacob Harvey | 2017-04-07 | 2 | -64/+184 |
* | Add empty zqcal files for HB to mirror | Andre Marin | 2017-04-06 | 2 | -0/+48 |
* | Add base spd decoder to share among controllers | Andre Marin | 2017-03-27 | 2 | -15/+18 |
* | Fixing tfaw and trrd calculations | Jacob Harvey | 2017-03-23 | 1 | -67/+176 |
* | Move find API to share among memory controllers | Andre Marin | 2017-03-22 | 1 | -1/+1 |
* | Move scom API to share among controllers | Andre Marin | 2017-03-18 | 1 | -1/+1 |
* | Fix add rtt_wr eff_dimm unit tests and header file fix | Andre Marin | 2017-03-16 | 1 | -9/+12 |
* | Update mss_eff_config to L3 | Jacob Harvey | 2017-03-16 | 1 | -41/+133 |
* | Disable RTT_WR during WR_LEVEL cal step, and set equivalent terminations | Louis Stermole | 2017-03-15 | 2 | -2/+392 |
* | Add pos API to be shared among controllers, move generic files to utils | Andre Marin | 2017-03-15 | 12 | -12/+12 |
* | Deconfigure MCA if there is a VPD load error | Louis Stermole | 2017-03-08 | 1 | -21/+39 |
* | Clean up RC0E in mss::eff_dimm | Jacob Harvey | 2017-03-03 | 1 | -14/+35 |
* | Add c_str generic API and update makefiles | Andre Marin | 2017-03-03 | 2 | -2/+2 |
* | Add DP16 API and unit testing needed to set PBA mode for LRDIMMs | Andre Marin | 2017-03-03 | 1 | -56/+67 |
* | Add BCW API for rank presence, buffer training, mrep timing and UTs. | Andre Marin | 2017-03-03 | 1 | -0/+449 |
* | Add common functionality between RCD and data buffer control word API | Andre Marin | 2017-03-03 | 1 | -0/+347 |
* | Another dummy commit to fix a mirror problem | Dan Crowell | 2017-03-03 | 2 | -811/+0 |
* | Disable PPR and sPPR mode in draminit to comply w/JEDEC POR | Andre Marin | 2017-03-01 | 3 | -12/+16 |
* | Updates to run HW VREF cal by default | Stephen Glancy | 2017-03-01 | 2 | -0/+59 |
* | Simplify spd factory mapping to share among controllers | Andre Marin | 2017-03-01 | 2 | -121/+70 |
* | Add attribute ATTR_EFF_RANK_GROUP_OVERRIDE | Louis Stermole | 2017-02-27 | 1 | -14/+63 |
* | Adding in default raw card information | Jacob Harvey | 2017-02-27 | 1 | -3/+4 |