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path: root/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C
Commit message (Expand)AuthorAgeFilesLines
* L3 draminit and mss_libJacob Harvey2017-07-261-20/+23
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-241-1/+1
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-191-1/+1
* Move MRS attributes to eff_config to calc LRDIMMsJacob Harvey2017-01-031-19/+20
* Update mss_decode_shadow_regs to use library MRS decodersLouis Stermole2016-11-041-15/+50
* Change DRAM output impedance value to be from MSS_VPD_MT_DRAM_DRV_IMP_DQ_DQSLouis Stermole2016-08-251-8/+9
* Adding defaults for DRAM dll_reset and dll_enableLouis Stermole2016-08-221-1/+1
* Changes related to RTT VPD settingsBrian Silver2016-08-121-3/+3
* Add mrs_one_shot to the MSS Lab codeBrian Silver2016-08-121-0/+8
* Create MRS data structuresBrian Silver2016-08-071-0/+182
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
* Add empty MRS files for f/w mirroringBrian Silver2016-07-221-0/+18
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