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path: root/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_ddr4_funcs.C
Commit message (Expand)AuthorAgeFilesLines
* Add row repair access functions and attr switches for p9cLouis Stermole2018-10-051-0/+1
* Add soft PPR (row repair) function for p9cLouis Stermole2018-10-031-0/+123
* Setup terminations on non-calibrating ranks during WR_LVL on DDR3Louis Stermole2018-08-061-178/+29
* Fixes Centaur RCD load sequenceStephen Glancy2018-07-171-107/+292
* Fixes Centaur chip selects during RCD loadStephen Glancy2018-07-171-51/+35
* WR_LVL Termination Fix (Qoff) for p9c, DDR4 onlyLouis Stermole2018-05-161-86/+439
* tWR_MPR fix for DDR4 RDIMM initializationJeremy Neaton2018-04-161-6/+14
* Chip ID fixes for 64GB enablementLuke Mulkey2017-09-141-31/+26
* VBU feedback fixesLuke Mulkey2017-07-261-4/+17
* p9c_mss_draminitLuke Mulkey2017-07-261-0/+4394
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