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* HRMOR fixes for hb-dump.Patrick Williams2013-01-091-18/+27
| | | | | | | | | Change-Id: Iedaa42e227172ea7fdfe175b4343c4a269a44b73 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2905 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enable slave coresDean Sanner2013-01-071-1/+2
| | | | | | | | | Enable slave core execution on master proc and slave proc Change-Id: I990ecb3d82b1b06fd64e085071ae1880818ca1d8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2858 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove Exit Cache contained sim hack, Update backing buildDean Sanner2013-01-031-3/+4
| | | | | | | | | | Change-Id: Ice7df0084dbc053f07947416ef01a969c46b142e RTC: 60780 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2797 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update bbuild to b1216c_1251.801Dean Sanner2012-12-182-1/+5
| | | | | | | | Change-Id: Ibcc0be1c8fa24fb4f188e338a52992da4262328c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2743 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Load Hostboot Base from PNORDean Sanner2012-12-122-2/+11
| | | | | | | | | | | | | Add the SBE and secureboot header to the hostboot base image and enable simics to actually pull the image from PNOR instead of directly stuffing cache from file. Also enables Hostboot to execute from HRMOR of 128MB and updates cit script to handle HRMOR Change-Id: Ie414a5f8e43dadf03538d7435f742b2d79db431b Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2473 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
* PNOR DD Micron NOR supportAdam Muhle2012-12-071-0/+4
| | | | | | | | | | | | The current Micron parts require some special operations after a read or write operation, otherwise future operations won't work. Change-Id: I2d733da57cd0b05fa5a8ba962f87d7fabb3d5267 RTC: 53201 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2491 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update VBU PNOR layout to include Winkle and Error Log partitionsAdam Muhle2012-11-033-10/+48
| | | | | | | | | | | | | | | | -Reduced the size of VPD partitions to squeeze in Winkle and Error log paritions. -Winkle and Error log partitions are smaller than production size to fit within fake-PNOR, but big enough to be functional -Deliviring more tools as part of VPO release to enable automation of figuring out VPD offsets, generating VPD, etc. Change-Id: I901cc895fbdb04837bd662329dc0c02d26e4b63f RTC: 49033 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2181 Tested-by: Jenkins Server Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Default PNOR layout to include all partitionsAdam Muhle2012-10-242-2/+9
| | | | | | | | | | | | | | | | | -Updated the default PNOR layout to include all partitions -PNOR Layout now matches PNOR Spec layout, but only single side -Updated PNORRP to support all partitions -Updated PNORDD to more efficiently track erases -Added 4-byte addressing workaround to combined.simics to workaround SW170513 for FSP PNOR access. -Disabled test image in VBU to save space since it is not used anyway Change-Id: Ifadd21829b78868a1f2d8b762420a24f256f7a7e RTC: 49033 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2091 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Changes so HWSV Loads HB patches on Tuleta in HB Dev EnvironmentAdam Muhle2012-10-191-0/+21
| | | | | | | | | | | | | | | | | | | Hardware Server is in the process of enabling function that will update PNOR with the hostboot base and extended images found on the FSP during the IPL. This change triggers a copy command to be run on the FSP which overwrites the default images with patch images when in the Hostboot Developer Environment. Note: This change is backwards compatible, so it does not need to be co-reqed with an FSP driver. Change-Id: I5f3dbc49ba66141c63522191721d3e09cd37e6d9 RTC:51082 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2076 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix plugging order for Tuleta in VPD preload scriptAdam Muhle2012-10-171-3/+17
| | | | | | | | | | | | | | | | | | The original assumptions regarding the DIMM plugging order in hb-pnor-mvpd-preload.pl was incorrect for Tuleta. I updated to be correct. In a few weeks we should be able to disable this code, but it's needed for the moment to support the Multi-chip bringup efforts. This issue was identified with Defect SW168323. Change-Id: I3bae0aebbabc9da07f87f379a2f6c2dd15db15c8 Tested-by: Jenkins Server Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for core_activate via IPI.Patrick Williams2012-07-161-3/+5
| | | | | | | | RTC: 37009 Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix for PHYP simics checkpoint issues.Patrick Williams2012-07-121-2/+2
| | | | | | | | | | | | | | | | | We were loading the VPD image files in a way that was causing checkpoints of the PNOR FPGA object to have references to the image files we create in the simics root. When PHYP tries to make checkpoints for their developers they don't keep these files around and so they cannot restore the checkpoints. Use load instead of add-diff-file to force the PNOR FPGA object to have the raw data instead of a reference to a file. Change-Id: I7c01499b80de74da436b7b9ae5b67b007a1110e3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1350 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* mboxdd setup ISRN and XIVR xscom registersDoug Gilbert2012-07-121-3/+2
| | | | | | | | | RTC: 44240 Change-Id: I8767265b5f5eccfda2c748c9b0d51027dffbb7eb Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1250 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update HB simics calls to new PHYP model names.Patrick Williams2012-06-281-16/+3
| | | | | | | | | | | | | | | See SW149779. The PHYP simics model is changing the location of phys_mem to be under system_cmp0 and renaming venice_cec_chip_cmp0 to proc_venicechip_cmp0. Change our debug and startup scripts to match these new naming conventions. Change-Id: I32b2ff8fa3467806ac4d7fac1b8b2e1db0796259 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1256 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Switch to using PNOR in SimicsDean Sanner2012-06-261-2/+4
| | | | | | | | | | | | | Switch to use manual PNOR images in simics Provided method for VPO to override Change-Id: I18195b645053f1ce90b4322ae2e09b6b08844331 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1241 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server
* Preload PNOR VPD correctlyTerry J. Opie2012-06-182-7/+88
| | | | | | | | | | | | | | | - Handle Venice, Murano, Tuleta - Change SPD code to use VPD_REC_NUM attribute - Modify FAPI/HWPF tests to use present DIMM targets Change-Id: I2348a2da90ea85a966f3724f8b3694a0b8f03916 RTC: 40774 Depends-on: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133 Depends-on: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/950 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update bbuild to b0611c_1223.810Patrick Williams2012-06-181-1/+0
| | | | | | | | | Change-Id: I8f7e5e3a85dd8ffc39b1970cd78ed2c925608d3d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1205 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Improve distribution mechanism for FSP delivery.Patrick Williams2012-06-086-61/+60
| | | | | | | | | | | | | | | | | | | | | | Replaced 'cpfiles' with a set of makefiles that does all of the old function and also allows more complex behaviors such as creating a TAR file of all our common code. Moved the delivery location of our content into a simics sandbox to match the locations in an FSP build. Updated debug tools to handle living in a different location. Removed 'post_model_hook.simics' and replaced with the {startup,standalone,combined}.simics files. Updated various scripts that were calling 'cpfiles' to instead call 'hbDistribute' (which in turn calls the makefiles). RTC: 41640 Change-Id: I10d1782ae89a397725e880c44ba44d01b0e4b011 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1173 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support P8 memory map from PHYPPatrick Williams2012-06-012-5/+6
| | | | | | | | | Change-Id: I19e5c373713b6e8b12386266c5c2c3a015068d5a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1132 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Tool changes to load hostboot files to new locations for simicsAdam Muhle2012-05-301-1/+1
| | | | | | | | | | | | Tweaked our various scripts to put the hostboot images in $sb/../images/ppc/lab/flash as that is where simics looks for them now. Change-Id: I3b019a460a6f5f03ad666d93724ec1d6fe1ff3c9 RTC: 35728 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1095 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Pick up Simics FSI fixes for multiple chipsDan Crowell2012-05-242-5/+1
| | | | | | | | | | | | | | | | | | | | | | Updating the Simics level to get FSI fixes to allow multiple chips to work. This also allows us to remove some previous workarounds. The new Simics build pulled in a different PNOR so needed to disable some of the tests. The new Simics build also modified some of the L3 objects so changes were required to some debug tools. Had to update the VENICE config since Ched rewired it to look like MURANO/Tuleta. Testing: Verified 2-proc, 4-centaur MURANO config Verified 2-proc, 4-centaur VENICE config Change-Id: I6aaaf8aad2f82dbfffb8ade551d545bedaa3e048 RTC: 41305 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1066 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* hb-istep in debug frameworkMark Wenning2012-05-211-546/+24
| | | | | | | | Change-Id: I21d95952e526e3ade6399c2f7e022e0897ae4610 RTC: 38308 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/959 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* INTR set IPCBAR scom reg on init and add INTR shutdown interfaceDoug Gilbert2012-05-111-0/+3
| | | | | | | | | | RTC: 39730 Change-Id: Ib548202f6f935b46cd92e0ddbf48d19b5ff6679a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/977 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Updating the bbuild to b0419a_1215.810Dan Crowell2012-04-271-0/+4
| | | | | | | | | | | | Moving up levels to get to a stable fips810 driver that includes some Simics fixes RTC: 40995 Change-Id: Iedbefc0f765b51d18af5a106fb4db89a9531f739 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/946 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add IStep Stubs for all ISteps in IPL Flow DocumentMark Wenning2012-04-171-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add stubs for all remaining ISteps, based on HostBoot_IPL_Flow_v1.01.odt document. Task 39253 1 -5 Not applicable, performed by SBE 6 - Save SBE (HWAS) ALL, Brian is moving some of them from 4 7 - Start Clocks on Nest Chiplets ALL 8 - EDI, EI init ALL 9 - Activate PowerBus ALL 10 - Centaur Init already implemented 11 - DMI Training already implemented 12 - MC Init already Implemented 13 - Dram Training already Implemented 14 - Dram Initialization ALL 15 - Build Winkle Images ALL 16 - Core Activate ALL 17 - Init PSI marked FSP, not implemented 18 - Establish System SMP 18.8, 9, 10 only, the rest are marked FSP 19 - Build and Load Host Image marked FSP, not implemented 20 - Load Payload ALL 21 - Start Payload ALL RTC: 38196 Change-Id: I4e853f58caafe7dd472d57b42883724eaaa2e8a3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/826 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Preload PNOR with required VPD dataTerry J. Opie2012-04-093-1/+275
| | | | | | | | | | | - Add 512K of MVPD data - Add 256K of SPD data Change-Id: I9b907e795b7b56d3c09f13c376f86f1f2dc627ae RTC: 35838 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/811 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Implement FSP MailboxMark Wenning2012-04-091-32/+49
| | | | | | | | | | | | | Modify IStepDisp to communicate over the mailbox Q to FSP. If there is no FSP, spin off a task to emulate FSP and communicate with the hb-istep user console on VPO or Simics. RTC: 38871 Change-Id: I2a75a05fbdc559db516a711bff46a49e82580bb0 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/812 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Patch for HWAS to work with hb-istepMark Wenning2012-04-061-6/+1
| | | | | | | | | | | | | HWAS stubs (istep 6) are numbered 3, 5, and 6 but are in the table as 0,1,2 . When hb-istep calls istep 6.3 it will get a "not found" error. Short term solution for this sprint is to renumber the stubs to 0,1,2 . This will be fixed permanently in another patch Add IStep Stubs for all ISteps in IPL Flow Document (task 39253) Change-Id: I7647c4405e1a19a83fe35af5ca6152b6585123d4 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/834 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Mailbox service providerDoug Gilbert2012-04-051-0/+7
| | | | | | | | | RTC: 35323 Change-Id: Ifd626870fcc31f94a684f8a19fdc7816e092a7fa Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/798 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Automating creation of PNOR image with TOC and Section data.Adam Muhle2012-04-041-5/+2
| | | | | | | | | | | | | | | | | Wrote buildpnor.pl which builds PNOR image based on pnorLayout.xml file and input binary files. Setup makefiles to create PNOR if input files change and to handle make clean. Updated PNORRP to support new section offsets and new MVPD and DIMM VPD sections. Also updated PNORDD to use 4 MB of L3 Cache as fake-PNOR. Change-Id: Ic40670a45a53211a2414570d7fe5632e19bd44ed RTC: 35043 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/819 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Increase simics and AWAN timeouts for hb-stepMark Wenning2012-03-151-2/+4
| | | | | | | | | | | | - branch increase_simics_timeout review fixes Change-Id: Id2ee35f3d51ad040f68d8502ff11bcf36640be2a RTC: none Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/724 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* FAPI breakpoint external interface implementationDoug Gilbert2012-03-051-18/+62
| | | | | | | Change-Id: I2d18e87cb8ce250935a129e3567b09e12ce191d8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/699 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Create framework for ISTEP 10, 12, 13Mark Wenning2012-02-291-3/+7
| | | | | | | | | | | | | | | | | | | | | | istep framework for istep 10 (sbe_centaur_init) istep 12( mss_volt, etc). istep 13 ( mss_draminit, etc ) Commented out testHWP, not used anymore. Fixed bug in hb-istep for simics fixed review comments Added section in genIstep.pl to generate include/usr/isteps/istepNlist.H ( istep 13 generated using script) NOTE: 10, 11, 12 were partially generated manually, that is why they are not consistent. Change-Id: I28ed8d3e60d2d0438ebe7ca3ed2053c781bc72ed Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/661 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* istep breakpoint supportDoug Gilbert2012-02-031-2/+36
| | | | | | | Change-Id: I592c617963f810209a9ab76345a8c568d14af62c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/629 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
* Make Hostboot-Extended 1MB in size.Patrick Williams2012-02-011-1/+1
| | | | | | | | Change-Id: I2e59c8bab9d848a5ca0395e993fd405851a44d06 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/634 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* RTC4420 SPless on VPOMark Wenning2012-01-201-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify SPLess code to use memory-mapped locations instead of SCOM scratchpad regs - Debug Framework does not support this at this time. VBU_Cacheline.pm is intended to be a module to read a single 64-bit word (which will be the spless command, status, and istepmode regs) from L3 memory within the AWAN model. CLread() will read the cacheline (at 128-byte boundaries) and then extract the quadword from the offet within the cacheline. CLwrite() will read/modify/write the quadword and cacheline. Note: There is a code block within VBU_Cacheline.pm called TEST - this returns dummy values to CLread and CLwrite so that I can run the perl script on a local system without connecting to simics or AWAN. It is not normally used. hb_istep is meant to be run after running a modified version of Jim McGuire's do_p8vbu_script_hbi-Sprint7 . See my public directory /gsa/ausgsa/home/w/e/wenning/Public/HBI/scripts for the modified script. These changes will be merged back into Jim McGuire's script later. The modified version loads the binaries into L3, sets up all the rest of the environment, and then exits BEFORE going into the execution loop. At that point, the user should run hb-istep --istepmode to set HostBoot up to run IStep SPLess (Single Step) . The user can then run hb-istep commands to execute isteps, etc. hb-istep use is documented on the wiki at https://w3-connections.ibm.com/wikis/home?lang=en_US#/wiki/Host%20Boot/page/HB%20ISteps%20on%20AWAN Please look there for updates. - first commit, branch vbu2 - modify spless to use memory locations instead of SCOM regs - add VBU_Cacheline.pm - archive temporary version of do_p8vbu_script_hbi-mark until we can get the hb-istep hooks into Jim McGuire's scripts - add test calls to VBU_Cacheline.pm - change flush call to Joe McGills "quiet" version - add note that p8_ins* calls are in Jim McGuires dir and will be replaced by the "official" ones soon. - experiment with git notes command, sorry for the thrash - add check to see if VPO is STOPPED before accessing anything - partial review fixes - blocked on model: can't test Change-Id: I07431dc525844c5c504175d92eae113457eac063 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/592 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
* Interrupt presenter implementationDoug Gilbert2012-01-051-1/+2
| | | | | | | | Change-Id: If6b499d819b71298b8a64e096e1eb83c639ad645 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/517 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* RTC3594: Improve SPLess OperationMark Wenning2011-12-061-203/+330
| | | | | | | | | | | | | | | | - branch spless3 - reorganize command and status regs - add seqnum - rewrite spless handler - add scanistepnames.pl code to extract istep names - modify hb-simdebug.py to read istep names - review fixes - add workaround for vbu Change-Id: I0f8f991ccbaa822ef5ab672279c3c206e6b7b2e3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/523 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
* Interactive debug tool.Patrick Williams2011-12-061-32/+65
| | | | | | | | | | | | | | | - Modify debug fw to support writing data. - Modify debug fw to support clocking model forward. - Add simics environment support for both. - Kernel support to start a task when directed. - Write debug tool to modify kernel structure for debug. Change-Id: Ic001dfd45f91392aefbc9d5096c5344018d5190e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/518 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* DbgFw: save tool output to file in simics.Patrick Williams2011-11-181-3/+5
| | | | | | | Change-Id: Ib796caecac77df68012c79fce481445ba171d7ed Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/507 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* RTC4287: Access PNOR to read IStep Mode AttributeMark Wenning2011-11-181-73/+94
| | | | | | | | | | | | | | - initial commit - fix script to work with changes in simics, to test - review fixes - review fixes 2 - add extra command to set (nonvolatile) ISTEP_MODE to OFF - review fixes 3 - minor fixes, remove unit test Change-Id: I9a1b7582da26a272393e3ea6c87c6979d0ea7c11 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/499 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Errl.pm for error log handling via perl debug frameworkMonte Copeland2011-11-161-152/+84
| | | | | | | | Change-Id: Idf79ba5e147afba2d98e926b73263adf9714e604 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/489 Tested-by: Jenkins Server Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Simics implementation of debug framework.Patrick Williams2011-11-162-239/+4
| | | | | | | | | Change-Id: Ie9f6963070ced0a39c2e62f685c79d6da01fdcdb Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/488 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Error log changes for Sprint 6Monte Copeland2011-10-311-4/+4
| | | | | | | | Change-Id: I44ad678cfae8cd84e5370391dc7e20d74f59c9ca Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/449 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
* Pull FSI data from real attributes (Task 3909).Dan Crowell2011-10-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are a group of attributes defined for FSI now. -ATTR_FSI_MASTER_CHIP -ATTR_FSI_MASTER_TYPE -ATTR_FSI_MASTER_PORT -ATTR_FSI_SLAVE_CASCADE -ATTR_FSI_OPTION_FLAGS Also includes work for Story 3996. The attributes are now broken into 3 distinct pieces: - attribute_types.xml : defines hostboot attributes - target_types.xml : defines different types of targets - XXX.system.xml : system-specific information, equivalent to what we'll get from system workbook These are then used to generic system-specific binaries, currently for 3 platforms: - simics_SALERNO_targeting.bin - simics_VENICE_targeting.bin - vbu_targeting.bin Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Simics command for single-thread mode.Patrick Williams2011-10-061-0/+12
| | | | | | | | | Change-Id: I74b49c7bd9647d31603a08ffbc14f21ef579cfc1 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/395 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
* Implement support for generating the PNOR targeting imageNick Bofferding2011-09-191-0/+1
| | | | | | | | | | | | | | | | | - Generate PNOR targeting image as part of the build process - Load it into SIMICS physical memory - Access image from targeting service at correct virtual address - Bridge fapi attributes to host boot attributes using direct macro - Support multidimensional arrays for simple attributes - Removed support for fake PNOR image Change-Id: I45d986d69397940a165c850d0db0fdeccd137d4d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/341 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Added function to dump and parse error logs to hostboot dump and parse tools.CamVan Nguyen2011-09-141-73/+67
| | | | | | | | | | Added new tools hb-trace, hb-errl, hb-printk, hb-dump for vbu/vpo debug. Added support for ecmd options, more error checking and misc enhancements. Change-Id: I8f5ed666a1d99ff894015e07a20595fcac8727b5 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/343 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
* Revert "Support generating the PNOR targeting image"A. Patrick Williams III2011-09-131-1/+0
| | | | | | | | | This reverts commit c82ba14ada9c80565b95ad9d3d05c678591ae328 Change-Id: Ifd9a62779b13d237c9e4c5d2818df6e433f17021 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/338 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support generating the PNOR targeting imageNick Bofferding2011-09-131-0/+1
| | | | | | | Change-Id: I5233ea017d61d629da26aa63b628bb36187d63dd Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/335 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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