diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/build/buildpnor/pnorLayoutAxone.xml | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/src/build/buildpnor/pnorLayoutAxone.xml b/src/build/buildpnor/pnorLayoutAxone.xml index 54f35eae9..68d2bebb7 100644 --- a/src/build/buildpnor/pnorLayoutAxone.xml +++ b/src/build/buildpnor/pnorLayoutAxone.xml @@ -121,10 +121,10 @@ Layout Description <ecc/> </section> <section> - <description>Hostboot Extended image (14.22MB w/o ECC)</description> + <description>Hostboot Extended image (17.77MB w/o ECC)</description> <eyeCatch>HBI</eyeCatch> <physicalOffset>0x3C1000</physicalOffset> - <physicalRegionSize>0x1000000</physicalRegionSize> + <physicalRegionSize>0x1400000</physicalRegionSize> <sha512Version/> <side>sideless</side> <ecc/> @@ -132,7 +132,7 @@ Layout Description <section> <description>SBE-IPL (Staging Area) (752K)</description> <eyeCatch>SBE</eyeCatch> - <physicalOffset>0x13C1000</physicalOffset> + <physicalOffset>0x17C1000</physicalOffset> <physicalRegionSize>0xBC000</physicalRegionSize> <sha512perEC/> <sha512Version/> @@ -142,7 +142,7 @@ Layout Description <section> <description>HCODE Ref Image (1.125MB)</description> <eyeCatch>HCODE</eyeCatch> - <physicalOffset>0x147D000</physicalOffset> + <physicalOffset>0x187D000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -151,7 +151,7 @@ Layout Description <section> <description>Hostboot Runtime Services for Sapphire (7.0MB)</description> <eyeCatch>HBRT</eyeCatch> - <physicalOffset>0x159D000</physicalOffset> + <physicalOffset>0x199D000</physicalOffset> <physicalRegionSize>0x700000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -160,7 +160,7 @@ Layout Description <section> <description>Payload (19.875MB)</description> <eyeCatch>PAYLOAD</eyeCatch> - <physicalOffset>0x1C9D000</physicalOffset> + <physicalOffset>0x209D000</physicalOffset> <physicalRegionSize>0x13E0000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -169,7 +169,7 @@ Layout Description <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TEST</eyeCatch> - <physicalOffset>0x307D000</physicalOffset> + <physicalOffset>0x347D000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <testonly/> <side>sideless</side> @@ -180,7 +180,7 @@ Layout Description from skipping header. Signing is forced in build pnor phase --> <description>Special PNOR Test Space with Header (36K)</description> <eyeCatch>TESTRO</eyeCatch> - <physicalOffset>0x3086000</physicalOffset> + <physicalOffset>0x3486000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <testonly/> @@ -191,7 +191,7 @@ Layout Description <section> <description>Hostboot Bootloader (28K)</description> <eyeCatch>HBBL</eyeCatch> - <physicalOffset>0x308F000</physicalOffset> + <physicalOffset>0x348F000</physicalOffset> <!-- Physical Size includes Header rounded to ECC valid size --> <!-- Max size of actual HBBL content is 20K and 22.5K with ECC --> <physicalRegionSize>0x7000</physicalRegionSize> @@ -202,7 +202,7 @@ Layout Description <section> <description>Global Data (36K)</description> <eyeCatch>GLOBAL</eyeCatch> - <physicalOffset>0x3096000</physicalOffset> + <physicalOffset>0x3496000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -210,7 +210,7 @@ Layout Description <section> <description>Ref Image Ring Overrides (20K)</description> <eyeCatch>RINGOVD</eyeCatch> - <physicalOffset>0x309F000</physicalOffset> + <physicalOffset>0x349F000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -218,7 +218,7 @@ Layout Description <section> <description>SecureBoot Key Transition Partition (16K)</description> <eyeCatch>SBKT</eyeCatch> - <physicalOffset>0x30A4000</physicalOffset> + <physicalOffset>0x34A4000</physicalOffset> <physicalRegionSize>0x4000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -226,7 +226,7 @@ Layout Description <section> <description>OCC Lid (1.125M)</description> <eyeCatch>OCC</eyeCatch> - <physicalOffset>0x30A8000</physicalOffset> + <physicalOffset>0x34A8000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -237,7 +237,7 @@ Layout Description <!-- We need 266KB per module sort, going to support 40 tables by default, plus ECC --> <eyeCatch>WOFDATA</eyeCatch> - <physicalOffset>0x31C8000</physicalOffset> + <physicalOffset>0x35C8000</physicalOffset> <physicalRegionSize>0x600000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -246,7 +246,7 @@ Layout Description <section> <description>FIRDATA (12K)</description> <eyeCatch>FIRDATA</eyeCatch> - <physicalOffset>0x37C8000</physicalOffset> + <physicalOffset>0x3BC8000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -254,7 +254,7 @@ Layout Description <section> <description>Memory Data (128K)</description> <eyeCatch>MEMD</eyeCatch> - <physicalOffset>0x37CB000</physicalOffset> + <physicalOffset>0x3BCB000</physicalOffset> <physicalRegionSize>0x20000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -263,7 +263,7 @@ Layout Description <section> <description>Secureboot Test Load (12K)</description> <eyeCatch>TESTLOAD</eyeCatch> - <physicalOffset>0x37EB000</physicalOffset> + <physicalOffset>0x3BEB000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -272,7 +272,7 @@ Layout Description <section> <description>Centaur Hw Ref Image (12K)</description> <eyeCatch>CENHWIMG</eyeCatch> - <physicalOffset>0x37EE000</physicalOffset> + <physicalOffset>0x3BEE000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -281,7 +281,7 @@ Layout Description <section> <description>Secure Boot (144K)</description> <eyeCatch>SECBOOT</eyeCatch> - <physicalOffset>0x37F1000</physicalOffset> + <physicalOffset>0x3BF1000</physicalOffset> <physicalRegionSize>0x24000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -290,7 +290,7 @@ Layout Description <section> <description>Open CAPI Memory Buffer (OCMB) Firmware (300K)</description> <eyeCatch>OCMBFW</eyeCatch> - <physicalOffset>0x3815000</physicalOffset> + <physicalOffset>0x3C15000</physicalOffset> <physicalRegionSize>0x4B000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -300,7 +300,7 @@ Layout Description <section> <description>HDAT Data (16K)</description> <eyeCatch>HDAT</eyeCatch> - <physicalOffset>0x3860000</physicalOffset> + <physicalOffset>0x3C60000</physicalOffset> <physicalRegionSize>0x4000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -309,7 +309,7 @@ Layout Description <section> <description>Eeprom Cache(512K)</description> <eyeCatch>EECACHE</eyeCatch> - <physicalOffset>0x3864000</physicalOffset> + <physicalOffset>0x3C64000</physicalOffset> <physicalRegionSize>0x80000</physicalRegionSize> <side>sideless</side> <ecc/> |
