diff options
Diffstat (limited to 'src')
-rwxr-xr-x | src/build/citest/etc/workarounds.presimsetup | 19 | ||||
-rw-r--r-- | src/usr/fsi/fsidd.C | 56 | ||||
-rw-r--r-- | src/usr/fsi/fsidd.H | 5 | ||||
-rw-r--r-- | src/usr/fsi/test/fsiddtest.H | 10 | ||||
-rw-r--r-- | src/usr/scom/test/scomtest.H | 51 |
5 files changed, 80 insertions, 61 deletions
diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup index 839a351ce..21c704c8f 100755 --- a/src/build/citest/etc/workarounds.presimsetup +++ b/src/build/citest/etc/workarounds.presimsetup @@ -58,25 +58,6 @@ echo " 0xFF00000F, 64 # Simics workaround" >> $sb/simu/data/cec-chip/cen echo "END" >> $sb/simu/data/cec-chip/centaur.chip echo "DONE" >> $sb/simu/data/cec-chip/centaur.chip -echo "+++ OPB SCOM Address workaround (fixed with 821496)." -mkdir -p $sb/simu/data/cec-chip/ -cp --update $BACKING_BUILD/src/simu/data/cec-chip/p8.chip $sb/simu/data/cec-chip/p8.chip.orig -grep -v DONE $sb/simu/data/cec-chip/p8.chip.orig > $sb/simu/data/cec-chip/p8.chip -echo "SCOMREGS # List all scom registers" >> $sb/simu/data/cec-chip/p8.chip -echo " # cMFSI 0 and MFSI FSI2OPB for Host" >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020000 # OPB Command Register" >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020001 # OPB Status Register " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020002 # OPB Locked Status " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020004 # OPB Reset " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020005 # OPB cMFSI Remote Slave Interrupt Condition " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020006 # OPB cMFSI Remote Slave Interrupt Mask " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020007 # OPB cMFSI Remote Slave Interrupt Status " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020008 # OPB MFSI Remote Slave Interrupt Condition " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x00020009 # OPB MFSI Remote Slave Interrupt Mask " >> $sb/simu/data/cec-chip/p8.chip -echo " 0x0002000A # OPB MFSI Remote Slave Interrupt Status " >> $sb/simu/data/cec-chip/p8.chip -echo "END" >> $sb/simu/data/cec-chip/p8.chip -echo "DONE" >> $sb/simu/data/cec-chip/p8.chip - echo "+++ Update to new phyp and mambo level." mkdir -p $sb/simu/data cp --update $BACKING_BUILD/src/simu/data/simicsInfo $sb/simu/data/simicsInfo diff --git a/src/usr/fsi/fsidd.C b/src/usr/fsi/fsidd.C index 4f829df5f..bcb6810fb 100644 --- a/src/usr/fsi/fsidd.C +++ b/src/usr/fsi/fsidd.C @@ -56,9 +56,6 @@ TRAC_INIT(&g_trac_fsir, "FSIR", 4096); //4K //#define TRACUCOMP(args...) TRACFCOMP(args) #define TRACUCOMP(args...) -//@fixme - VPO Debug -bool INSIDE_DEBUG = false; - //@todo - This should come from the target/attribute code somewhere uint64_t target_to_uint64(const TARGETING::Target* i_target) { @@ -864,15 +861,54 @@ errlHndl_t FsiDD::handleOpbErrors(const FsiAddrInfo_t& i_addrInfo, i_addrInfo.absAddr), TWO_UINT32_TO_UINT64(i_opbStatReg,0)); - if( !INSIDE_DEBUG ) + // Collect some FFDC but avoid an infinite loop + if( !iv_ffdcCollection ) { - INSIDE_DEBUG = true; + iv_ffdcCollection = true; uint32_t data = 0; - read( 0x31D0, &data ); TRACFCOMP( g_trac_fsi, "MESRB0(1D0) = %.8X", data ); - read( 0x31D4, &data ); TRACFCOMP( g_trac_fsi, "MCSCSB0(1D4) = %.8X", data ); - read( 0x31D8, &data ); TRACFCOMP( g_trac_fsi, "MATRB0(1D8) = %.8X", data ); - read( 0x31DC, &data ); TRACFCOMP( g_trac_fsi, "MDTRB0(1DC) = %.8X", data ); - INSIDE_DEBUG = false; + errlHndl_t l_err2 = NULL; + + l_err2 = read( 0x31D0, &data ); + if( l_err2 ) + { + delete l_err2; + } + else + { + TRACFCOMP( g_trac_fsi, "MESRB0(1D0) = %.8X", data ); + } + + l_err2 = read( 0x31D4, &data ); + if( l_err2 ) + { + delete l_err2; + } + else + { + TRACFCOMP( g_trac_fsi, "MCSCSB0(1D4) = %.8X", data ); + } + + l_err2 = read( 0x31D8, &data ); + if( l_err2 ) + { + delete l_err2; + } + else + { + TRACFCOMP( g_trac_fsi, "MATRB0(1D8) = %.8X", data ); + } + + l_err2 = read( 0x31DC, &data ); + if( l_err2 ) + { + delete l_err2; + } + else + { + TRACFCOMP( g_trac_fsi, "MDTRB0(1DC) = %.8X", data ); + } + + iv_ffdcCollection = false; } l_err->collectTrace("FSI"); diff --git a/src/usr/fsi/fsidd.H b/src/usr/fsi/fsidd.H index 26cf04966..69060544e 100644 --- a/src/usr/fsi/fsidd.H +++ b/src/usr/fsi/fsidd.H @@ -457,6 +457,11 @@ class FsiDD */ TARGETING::Target* iv_master; + /** + * Flag to avoid infinite recursion + */ + bool iv_ffdcCollection; + private: // let my testcase poke around diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H index 66a7ba6c5..815fabfc1 100644 --- a/src/usr/fsi/test/fsiddtest.H +++ b/src/usr/fsi/test/fsiddtest.H @@ -200,10 +200,7 @@ class FsiDDTest : public CxxTest::TestSuite // version number { PROC0, 0x003074, 0x91010800, false, true }, //CMFSI MVER { PROC0, 0x003474, 0x91010800, false, true }, //MFSI MVER - - // clock rate delay for ports 32-63 (unused ports) - { PROC0, 0x00340C, 0x11111111, true, true }, //MFSI MCRSP32 - { PROC0, 0x00300C, 0x22222222, true, true }, //CMFSI MCRSP32 + //@fixme - should be 0x92010800 but Simics is wrong //** Slave Regs (cheating) { PROC0, 0x080000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-0 @@ -215,7 +212,7 @@ class FsiDDTest : public CxxTest::TestSuite { PROCWRAP, 0x000000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-0 { PROCWRAP, 0x001000, 0x12345678, false, false }, //DATA_0 from FSI2PIB off MFSI-0 { PROCWRAP, 0x001004, 0xA5A5A5A5, true, false }, //DATA_1 from FSI2PIB off MFSI-0 - //@fixme SW106529 { PROCWRAP, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-0 + { PROCWRAP, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-0 //** Slave Regs { PROC1, 0x001000, 0x88776655, true, false }, //FEL from SHIFT off MFSI-1 @@ -226,7 +223,8 @@ class FsiDDTest : public CxxTest::TestSuite { PROC2, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-2 //** Slave Regs - { CENTAUR0, 0x000000, 0xC0010E9C, false, false }, //Config Table entry for slave0 off cMFSI-0 + { CENTAUR0, 0x000000, 0xC0010E9C, false, false }, //Config Table entry for slave0 off cMFSI-0 + //@fixme - should be 0xC0010E95 but Simics is wrong { CENTAUR0, 0x001028, 0x160E9049, false, false }, //CHIPID from FSI2PIB off cMFSI-0 { CENTAUR0, 0x000C08, 0x12344321, true, false }, //FEL from SHIFT off cMFSI-0 diff --git a/src/usr/scom/test/scomtest.H b/src/usr/scom/test/scomtest.H index 543c589cc..f35f81dd5 100644 --- a/src/usr/scom/test/scomtest.H +++ b/src/usr/scom/test/scomtest.H @@ -46,7 +46,7 @@ public: /** * @brief SCOM test via FSISCOM to Venice - * + * */ void test_FSISCOMreadWrite_proc(void) { @@ -116,12 +116,12 @@ public: uint64_t addr; uint64_t data; } test_data[] = { - { scom_targets[PROCWRAP], 0x120F0000 ,0xFEEDB0B000001234}, - { scom_targets[PROCWRAP], 0x120F0166, 0xFEDCBA9876543210}, - { scom_targets[PROCWRAP], 0x00040005, 0x0000000000000000}, - { scom_targets[PROCWRAP], 0x02040004, 0xFFFFFFFFFFFFFFFF}, - { scom_targets[PROC1], 0x00040005, 0x1234567887654321}, - { scom_targets[PROC1], 0x02040004, 0x1122334455667788}, + { scom_targets[PROCWRAP], 0x120F0000 ,0xFEEDB0B000001234}, + { scom_targets[PROCWRAP], 0x120F0166, 0xFEDCBA9876543210}, + { scom_targets[PROCWRAP], 0x00040005, 0x0000000000000000}, + { scom_targets[PROCWRAP], 0x02040004, 0xFFFFFFFFFFFFFFFF}, + { scom_targets[PROC1], 0x00040005, 0x1234567887654321}, + { scom_targets[PROC1], 0x02040004, 0x1122334455667788}, }; const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]); @@ -130,7 +130,7 @@ public: size_t op_size = sizeof(uint32_t); // write all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -156,7 +156,7 @@ public: } // read all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -193,7 +193,7 @@ public: /** * @brief SCOM test via FSISCOM to Centaur - * + * */ void test_FSISCOMreadWrite_centaur(void) { @@ -204,7 +204,7 @@ public: // Setup some targets to use enum { - CENTAUR0, //local + CENTAUR0, //local CENTAUR8, //remote (off PROC1) NUM_TARGETS }; @@ -260,8 +260,7 @@ public: uint64_t addr; uint64_t data; } test_data[] = { - //@fixme - address should be 0x02011403 but simics is adding parity... - { scom_targets[CENTAUR0], 0x02011402 , 0x123456789ABCDEF0 }, + { scom_targets[CENTAUR0], 0x02011403 , 0x123456789ABCDEF0 }, { scom_targets[CENTAUR0], 0x02011672 , 0x1122334455667788 }, { scom_targets[CENTAUR8], 0x02011672 , 0x9E9E9E9E9E9E9E9E }, }; @@ -272,7 +271,7 @@ public: size_t op_size = sizeof(uint32_t); // write all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -298,7 +297,7 @@ public: } // read all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -336,7 +335,7 @@ public: /** * @brief SCOM test Indirect SCOM - * + * */ void test_IndirectScom(void) @@ -409,8 +408,8 @@ public: uint64_t addr; uint64_t data; } test_data[] = { - { scom_targets[myPROC9], 0x80040C0102011A3F ,0x1234432112344321}, - { scom_targets[myPROC9], 0x800C140002011E3F, 0x123443211234ABAB}, + { scom_targets[myPROC9], 0x80040C0102011A3F ,0x1234432112344321}, + { scom_targets[myPROC9], 0x800C140002011E3F, 0x123443211234ABAB}, }; const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]); @@ -418,7 +417,7 @@ public: size_t op_size = sizeof(uint32_t); // write all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -449,7 +448,7 @@ public: memset(read_data, 0, sizeof read_data); // read all the test registers - for( uint64_t x = 0; x < NUM_ADDRS; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -599,7 +598,7 @@ public: // last 2 writes have expected failure conditions. if ((x == NUM_ADDRS-1) || (x == NUM_ADDRS-2)) { - TRACDCOMP( g_trac_scom, "ScomTest::test_translate_EX.. Expected Error log returned> " ); + TRACDCOMP( g_trac_scom, "ScomTest::test_translate_EX.. Expected Error log returned> " ); } else { @@ -620,7 +619,7 @@ public: // read all the test registers - for( uint64_t x = 0; x < NUM_ADDRS-2; x++ ) + for( uint64_t x = 0; x < NUM_ADDRS-2; x++ ) { //only run if the target exists if(test_data[x].target == NULL) @@ -666,7 +665,7 @@ public: uint64_t fails = 0; uint64_t total = 0; - + //@VBU workaround - Disable Indirect SCOM test case o @@ -730,7 +729,7 @@ public: // add MCS4 target. epath.addLast(TARGETING::TYPE_MCS,4); scom_targets[myMCS4] = TARGETING::targetService().toTarget(epath); - + // remote MCS4 target (off of sys-0/node-0/proc-0/MCS4) epath.removeLast(); @@ -762,7 +761,7 @@ public: // Unit for // the // target - { scom_targets[myMCS4], 0x0601184A, 0x0101010101010101}, // invalid address range + { scom_targets[myMCS4], 0x0601184A, 0x0101010101010101}, // invalid address range { scom_targets[myMCS4], 0x0200184A, 0x2323232323232323}, // Invalid address range for target }; const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]); @@ -1025,7 +1024,7 @@ public: //@todo - write error path testcase for FSI scom using bad address - + //@todo - address translation |