diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8_mba.act.patch | 28 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 18 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/s1.act.patch | 22 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/s1_mba.act.patch | 29 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 131 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.presimsetup | 9 | ||||
| -rwxr-xr-x | src/build/simics/standalone.simics | 7 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/dram_initialization/dram_initialization.C | 79 | ||||
| -rw-r--r-- | src/usr/scan/test/scantest.H | 4 |
10 files changed, 83 insertions, 246 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index e64a1a0f6..aa59ddf6f 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips801/Builds/b1216c_1251.801 +/esw/fips801/Builds/b1221a_1251.801 diff --git a/src/build/citest/etc/patches/p8_mba.act.patch b/src/build/citest/etc/patches/p8_mba.act.patch deleted file mode 100644 index 113552ac9..000000000 --- a/src/build/citest/etc/patches/p8_mba.act.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- p8_mba.act.old 2012-12-13 15:20:03.177168880 -0500 -+++ p8_mba.act 2012-12-13 15:21:10.719053313 -0500 -@@ -194,7 +194,7 @@ CAUSE_EFFECT { - WATCH=[REG(0x01020013)] # ipoll - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,ON] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, raise)] OP=[MODULECALL] - } - -@@ -203,7 +203,7 @@ CAUSE_EFFECT { - WATCH=[REG(0x02000001)] # gp1 - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,OFF] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, lower)] OP=[MODULECALL] - } - -@@ -212,6 +212,6 @@ CAUSE_EFFECT { - WATCH=[REG(0x01020013)] # ipoll - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,ON] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, lower)] OP=[MODULECALL] - } diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index 0f71eeaf5..f6bdfca5e 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -5,19 +5,9 @@ Brief description of the problem or reason for patch -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup -Additional actions for Centaur maint command complete --RTC: Task 60668 will remove the patch --CMVC: D864673 is integrating the changes --Files: p8_mba.act.patch s1_mba.act.patch +Move to memory based on different scom address write +-RTC: Task 61075 will remove the patch +-CMVC: F865077 is integrating the changes +-Files: s1.act.patch -Coreq: there are related changes in workarounds.postsimsetup -Override the simics level --RTC: Story 60617 will remove the patch --CMVC: Simics team is updating simicsInfo, Feature 864898 --Files: workarounds.presimsetup --Coreq: there are related changes in workarounds.postsimsetup - -Override simics config file values --RTC: Story 60780 will remove the patch --CMVC: Feature 864669 used to checkin config file changes --Coreq: there are related changes in workarounds.presimsetup diff --git a/src/build/citest/etc/patches/s1.act.patch b/src/build/citest/etc/patches/s1.act.patch new file mode 100644 index 000000000..d2df187ea --- /dev/null +++ b/src/build/citest/etc/patches/s1.act.patch @@ -0,0 +1,22 @@ +--- s1.act.old 2013-01-02 13:32:25.000000000 -0600 ++++ s1.act 2013-01-03 07:02:03.000000000 -0600 +@@ -31,6 +31,7 @@ + # mc01 F864674 missyc 12/17/12 Added PLL Lock actions + # F864543 thi 12/19/12 Fix action file error + # D864795 dsanner 12/20/12 Fix clock actions ++# F865077 dsanner 01/02/13 Updated exitCacheContainedMode + + CAUSE_EFFECT { + LABEL=[Assert all logic clock domains off when chip logic power asserted off] +@@ -483,9 +484,10 @@ + # Note: Memory regions must have been created prior to this + # This will exit cache contained when non mirror bar is writen to any EX core. + # This only happens on the master core +-CAUSE_EFFECT CHIPLETS ex { ++CAUSE_EFFECT { + LABEL=[Exit Cache Contained mode] +- WATCH=[REG(MYCHIPLET,0x0001080b)] ++ WATCH=[REG(0x0201340C)] ++ CAUSE: TARGET=[LOGIC(0xFF0CC005)] OP=[BIT,ON] BIT=[0] # Master chip + EFFECT: TARGET=[MODULE(exitCacheContainedMode)] OP=[MODULECALL] + } diff --git a/src/build/citest/etc/patches/s1_mba.act.patch b/src/build/citest/etc/patches/s1_mba.act.patch deleted file mode 100644 index 491b84f75..000000000 --- a/src/build/citest/etc/patches/s1_mba.act.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- s1_mba.act.old 2012-12-13 15:24:52.777206738 -0500 -+++ s1_mba.act 2012-12-13 16:34:50.760796428 -0500 -@@ -111,7 +111,7 @@ CAUSE_EFFECT { - WATCH=[REG(0x01020013)] # ipoll - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,ON] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, raise)] OP=[MODULECALL] - } - -@@ -120,7 +120,7 @@ CAUSE_EFFECT { - WATCH=[REG(0x02000001)] # gp1 - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,OFF] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, lower)] OP=[MODULECALL] - } - -@@ -129,7 +129,7 @@ CAUSE_EFFECT { - WATCH=[REG(0x01020013)] # ipoll - - CAUSE: TARGET=[REG(0x02000001)] OP=[BUF,AND,ON] DATA=[LITERAL(32,01FE0000)] -- CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,ON] BIT=[3] -+ CAUSE: TARGET=[REG(0x01020013)] OP=[BIT,OFF] BIT=[3] - EFFECT: TARGET=[MODULE(lclErrInterrupt, lower)] OP=[MODULECALL] - } - diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index b7d9c5883..24a53b5e7 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -1,115 +1,38 @@ #!/bin/sh -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. -# -# $Source: src/build/citest/etc/workarounds.postsimsetup $ -# -# IBM CONFIDENTIAL -# -# COPYRIGHT International Business Machines Corp. 2011,2012 -# -# p1 -# -# Object Code Only (OCO) source materials -# Licensed Internal Code Source Materials -# IBM HostBoot Licensed Internal Code -# -# The source code for this program is not published or otherwise -# divested of its trade secrets, irrespective of what has been -# deposited with the U.S. Copyright Office. -# -# Origin: 30 -# -# IBM_PROLOG_END_TAG +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/build/citest/etc/workarounds.postsimsetup $ +# +# IBM CONFIDENTIAL +# +# COPYRIGHT International Business Machines Corp. 2011,2013 +# +# p1 +# +# Object Code Only (OCO) source materials +# Licensed Internal Code Source Materials +# IBM HostBoot Licensed Internal Code +# +# The source code for this program is not published or otherwise +# divested of its trade secrets, irrespective of what has been +# deposited with the U.S. Copyright Office. +# +# Origin: 30 +# +# IBM_PROLOG_END_TAG ## ## Workarounds that are run after start_simics is executed for the first time ## to setup the sandbox ## -echo "+++ Updating s1.act and p8_common.chip" +echo "+++ Updating s1.act" mkdir -p $sb/simu/data/cec-chip cp $BACKING_BUILD/src/simu/data/cec-chip/s1.act $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/p8.act $sb/simu/data/cec-chip -#### Update actions files for proc_a_x_pci_dmi_pll_setup - -#### Remove when F864674 under RTC 60617 -echo " - #A Bus PLL workaround - CAUSE_EFFECT { - LABEL=[P8 ABUS PLL Lock] - WATCH=[REG(0x080F0013)] - CAUSE: TARGET=[REG(0x080F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x080F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/s1.act +## Update exitCacheContainedMode action to remove sim workaround +## Remove with RTC 61075, CMVC F865077 +echo "+++ Update exitCacheContainedMode action to remove sim workaround" +patch -p0 $sb/simu/data/cec-chip/s1.act $HOSTBOOTROOT/src/build/citest/etc/patches/s1.act.patch -echo " - #A Bus PLL workaround - CAUSE_EFFECT { - LABEL=[P8 ABUS PLL Lock] - WATCH=[REG(0x080F0013)] - CAUSE: TARGET=[REG(0x080F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x080F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/p8.act - -echo " - #DMI PLL workaround -CAUSE_EFFECT { - LABEL=[P8 DMI PLL Lock] - WATCH=[REG(0x020F0013)] - CAUSE: TARGET=[REG(0x020F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/s1.act - - -echo " - #DMI PLL workaround -CAUSE_EFFECT { - LABEL=[P8 DMI PLL Lock] - WATCH=[REG(0x020F0013)] - CAUSE: TARGET=[REG(0x020F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/p8.act - - -echo " - #PCIE PLL workaround -CAUSE_EFFECT { - LABEL=[P8 PCIE PLL Lock] - WATCH=[REG(0x090F0013)] - CAUSE: TARGET=[REG(0x090F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/s1.act - -echo " - #PCIE PLL workaround -CAUSE_EFFECT { - LABEL=[P8 PCIE PLL Lock] - WATCH=[REG(0x090F0013)] - CAUSE: TARGET=[REG(0x090F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)] - EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock -} " >> $sb/simu/data/cec-chip/p8.act - -#### Additional updates for maint commands (Remove with RTC:60668) -echo "+++ Fix up inverted ipoll mask" -cp $bb/src/simu/data/cec-chip/p8_mba.act $sb/simu/data/cec-chip/p8_mba.act -cp $bb/src/simu/data/cec-chip/s1_mba.act $sb/simu/data/cec-chip/s1_mba.act - -patch -p0 $sb/simu/data/cec-chip/p8_mba.act $HOSTBOOTROOT/src/build/citest/etc/patches/p8_mba.act.patch -patch -p0 $sb/simu/data/cec-chip/s1_mba.act $HOSTBOOTROOT/src/build/citest/etc/patches/s1_mba.act.patch -### - -#remove with RTC 60780 -echo "+++ Updating config files - checked in with CMVC Defect 864669" -mkdir -p $sb/simu/configs -egrep -v "GFW_P8_MURANO_PNOR_DIRECT_MMIO" $BACKING_BUILD/src/simu/configs/P8_MURANO.config > $sb/simu/configs/P8_MURANO.config -echo "SETENV GFW_P8_MURANO_PNOR_DIRECT_MMIO 0xC000000 " >> $sb/simu/configs/P8_MURANO.config - -egrep -v "GFW_P8_VENICE_PNOR_DIRECT_MMIO" $BACKING_BUILD/src/simu/configs/P8_VENICE.config > $sb/simu/configs/P8_VENICE.config -echo "SETENV GFW_P8_VENICE_PNOR_DIRECT_MMIO 0xC000000 " >> $sb/simu/configs/P8_VENICE.config - -egrep -v "GFW_P8_TULETA_PNOR_DIRECT_MMIO" $BACKING_BUILD/src/simu/configs/P8_TULETA.config > $sb/simu/configs/P8_TULETA.config -echo "SETENV GFW_P8_TULETA_PNOR_DIRECT_MMIO 0xC000000 " >> $sb/simu/configs/P8_TULETA.config - -egrep -v "GFW_P8_TULETA_PNOR_DIRECT_MMIO" $BACKING_BUILD/src/simu/configs/P8_TULETA_POWERON.config > $sb/simu/configs/P8_TULETA_POWERON.config -echo "SETENV GFW_P8_TULETA_PNOR_DIRECT_MMIO 0xC000000 " >> $sb/simu/configs/P8_TULETA_POWERON.config diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup index 27e844dc9..4ca2b2569 100755 --- a/src/build/citest/etc/workarounds.presimsetup +++ b/src/build/citest/etc/workarounds.presimsetup @@ -6,7 +6,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2011,2012 +# COPYRIGHT International Business Machines Corp. 2011,2013 # # p1 # @@ -32,10 +32,3 @@ #egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo #echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo #echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo - -echo "+++ Backing to Simics Build for Scan support and PNOR mmio changes." -# remove with RTC:60617 when simics info contains FIPSLEVEL fi121218a800.42 -# or later. -mkdir -p $sb/simu/data -egrep -v "WSALIAS DEFAULT FIPSLEVEL " $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo -echo "WSALIAS DEFAULT FIPSLEVEL env/gfwf/simics-4.2.0/simics-4.2.98/fips/fld36/fi121218a800.42 " >> $sb/simu/data/simicsInfo diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics index 57721e947..a1eb6f675 100755 --- a/src/build/simics/standalone.simics +++ b/src/build/simics/standalone.simics @@ -4,7 +4,8 @@ p8Proc0.proc_fsi2host_mbox->responder_enable=1 @SIM_get_interface(conf.p8Proc0.proc_chip, "signal").signal_raise(conf.p8Proc0.proc_chip) #Write the PNOR MMIO addr into Scratch 2, 0x283A -#Then trigger the SBE start +#Then trigger the flush, load, and SBE start p8Proc0.proc_lbus_map.write 0x28e8 0xFFEF0000 -p8Proc0.proc_lbus_map.write 0x2870 0x10000000 #SBE Vital 0x281C -p8Proc0.proc_lbus_map.write 0x2870 0x90000000 #SBE Vital 0x281C +p8Proc0.proc_lbus_map.write 0x2848 0x00000FFF #GP3 0x2812 (flush) +p8Proc0.proc_lbus_map.write 0x2870 0x10000000 #SBE Vital 0x281C (load) +p8Proc0.proc_lbus_map.write 0x2870 0x90000000 #SBE Vital 0x281C (start) diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C index 91af87b07..aff018ea5 100644 --- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C +++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C @@ -1,26 +1,25 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/dram_initialization/dram_initialization.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/dram_initialization/dram_initialization.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ /** * @file dram_initialization.C * @@ -491,40 +490,6 @@ void* call_proc_setup_bars( void *io_pArgs ) } // endfor - - // ---------------------------------------------------------------------- - // @@@@@ TEMPORARY SIMICS HACK for PHYP 6/1 milestone @@@@@ - // ---------------------------------------------------------------------- - if ( !TARGETING::is_vpo() ) - { - //Now need to scom the L3 bar on my EX to trigger Simics cache contained exit - if (l_stepError.isNull()) - { - TARGETING::Target* procTarget = NULL; - TARGETING::targetService().masterProcChipTargetHandle( procTarget ); - - //Base scom address is 0x1001080b, need to place core id from cpuid - //EX chiplet is bits 4:7 of scom addr, EX unit in cpuid is bits 25:28 - uint32_t scom_addr = 0x1001080b | (((task_getcpuid()) & 0x78) << 21); - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "EX L3 BAR1 addr [%08x]", scom_addr); - - uint64_t scom_data = 0x0; //data doesn't matter, just the write - size_t size = sizeof(scom_data); - - l_errl = deviceWrite( procTarget, - &scom_data, - size, - DEVICE_SCOM_ADDRESS(scom_addr) ); - if (l_errl) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "Failed to write EX %08x addr\n", scom_addr); - } - } - // @@@@@ end TEMPORARY SIMICS HACK for PHYP 6/1 milestone @@@@@ - } - if ( l_stepError.isNull() ) { // ----------------------------------------------------------------------- diff --git a/src/usr/scan/test/scantest.H b/src/usr/scan/test/scantest.H index 0b15a677a..041587d4a 100644 --- a/src/usr/scan/test/scantest.H +++ b/src/usr/scan/test/scantest.H @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2012 */ +/* COPYRIGHT International Business Machines Corp. 2011,2013 */ /* */ /* p1 */ /* */ @@ -125,7 +125,7 @@ public: uint64_t length; uint64_t flag; // used for header check.. } test_data[] = { - { scan_targets[myPROC0], {0x12121212, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x10000000, 0x00000000}, 0x14030803, 197, 0x0}, + { scan_targets[myPROC0], {0x12121212, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x10000000, 0x00000000}, 0x15030803, 197, 0x0}, { scan_targets[memBuf0], {0x34343434, 0xaaaaaaaa, 0xbbbbbbbb, 0xb0000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 0x01034001, 100, 0x2}, }; const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]); |
