diff options
Diffstat (limited to 'src')
6 files changed, 44 insertions, 50 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C index 2014227f2..29d6e2b1c 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C @@ -169,15 +169,15 @@ fapi2::ReturnCode p9_cxa_scom(const fapi2::Target<fapi2::TARGET_TYPE_CAPP>& TGT0 } } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_DISABLE_G_ON = 0x1; l_scom_buffer.insert<4, 1, 63, uint64_t>(l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_DISABLE_G_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<3, 1, 63, uint64_t>(l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_DISABLE_VG_NOT_SYS_ON ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C index 2728df278..da4f761cb 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C @@ -126,15 +126,15 @@ fapi2::ReturnCode p9_int_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<49, 1, 63, uint64_t>(literal_0 ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_INT_INT_CQ_INT_CQ_PBO_CTL_DISABLE_G_ON = 0x1; l_scom_buffer.insert<47, 1, 63, uint64_t>(l_INT_INT_CQ_INT_CQ_PBO_CTL_DISABLE_G_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_INT_INT_CQ_INT_CQ_PBO_CTL_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<46, 1, 63, uint64_t>(l_INT_INT_CQ_INT_CQ_PBO_CTL_DISABLE_VG_NOT_SYS_ON ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C index 30afa5a5e..c34baf8d3 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C @@ -124,29 +124,29 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0x3 ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<1, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<5, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<2, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_VG_NOT_SYS_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<6, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_VG_NOT_SYS_ON ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C index b08ba5471..e48166c54 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C @@ -677,57 +677,57 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<1, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<5, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_WR_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<9, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_WR_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_RD_DISABLE_GROUP_ON = 0x1; l_scom_buffer.insert<13, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_RD_DISABLE_GROUP_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<2, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_WR_DISABLE_VG_NOT_SYS_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<6, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_DMA_RD_DISABLE_VG_NOT_SYS_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_WR_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<10, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_WR_DISABLE_VG_NOT_SYS_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_RD_DISABLE_VG_NOT_SYS_ON = 0x1; l_scom_buffer.insert<14, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_UMAC_RD_DISABLE_VG_NOT_SYS_ON ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_vas_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_vas_scom.C index 3803c89ed..44cd049f9 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_vas_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_vas_scom.C @@ -168,29 +168,29 @@ fapi2::ReturnCode p9_vas_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<20, 8, 56, uint64_t>(literal_0xFC ); l_scom_buffer.insert<28, 8, 56, uint64_t>(literal_0xFC ); - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_G_WR_ON = 0x1; l_scom_buffer.insert<1, 1, 63, uint64_t>(l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_G_WR_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_G_RD_ON = 0x1; l_scom_buffer.insert<5, 1, 63, uint64_t>(l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_G_RD_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_VG_WR_ON = 0x1; l_scom_buffer.insert<2, 1, 63, uint64_t>(l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_VG_WR_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) - && (l_chip_ec == 0x23)) ) + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) + && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) ) { constexpr auto l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_VG_RD_ON = 0x1; l_scom_buffer.insert<6, 1, 63, uint64_t>(l_VA_VA_SOUTH_VA_EG_EG_SCF_DISABLE_VG_RD_ON ); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 6d12c43f7..ad74cb670 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -7600,13 +7600,14 @@ <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> Enable extended addressing mode to workaround MCD - coherency issue HW423589 + coherency issue HW423589. EC update will prevent application on + any system. </description> <chipEcFeature> <chip> <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> - <value>0x21</value> + <value>0xAF</value> <test>EQUAL</test> </ec> </chip> @@ -7615,7 +7616,7 @@ <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_HW423589_OPTION1</id> - <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> Disable MCD to workaround coherency issue HW423589 </description> @@ -7624,13 +7625,6 @@ <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> <value>0x20</value> - <test>EQUAL</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x22</value> <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> |
