summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/include/usr/i2c/i2cif.H42
-rw-r--r--src/include/usr/i2c/i2creasoncodes.H47
-rw-r--r--src/usr/hwpf/hwp/start_payload/start_payload.C15
-rwxr-xr-xsrc/usr/i2c/i2c.C251
-rwxr-xr-xsrc/usr/i2c/i2c.H45
-rw-r--r--src/usr/targeting/common/xmltohb/target_types_hb.xml8
6 files changed, 341 insertions, 67 deletions
diff --git a/src/include/usr/i2c/i2cif.H b/src/include/usr/i2c/i2cif.H
new file mode 100644
index 000000000..6373337b8
--- /dev/null
+++ b/src/include/usr/i2c/i2cif.H
@@ -0,0 +1,42 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/include/usr/i2c/i2cif.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __I2CIF_H
+#define __I2CIF_H
+
+namespace I2C
+{
+
+/**
+ * @brief This function will handle everything required to setup the master
+ * engines.
+ * Mainly, as of current code, this is being used to write the I2C Bus
+ * Divisor values to the master engines to be used by Phyp.
+ *
+ * @return errlHndl_t - Null if successful, otherwise a pointer to
+ * the error log.
+ */
+errlHndl_t i2cSetupMasters ( void );
+
+}; // end namespace I2C
+
+#endif // end __I2CIF_H
diff --git a/src/include/usr/i2c/i2creasoncodes.H b/src/include/usr/i2c/i2creasoncodes.H
index ce2af7327..ff12d8191 100644
--- a/src/include/usr/i2c/i2creasoncodes.H
+++ b/src/include/usr/i2c/i2creasoncodes.H
@@ -1,25 +1,25 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/include/usr/i2c/i2creasoncodes.H $
-//
-// IBM CONFIDENTIAL
-//
-// COPYRIGHT International Business Machines Corp. 2011
-//
-// p1
-//
-// Object Code Only (OCO) source materials
-// Licensed Internal Code Source Materials
-// IBM HostBoot Licensed Internal Code
-//
-// The source code for this program is not published or other-
-// wise divested of its trade secrets, irrespective of what has
-// been deposited with the U.S. Copyright Office.
-//
-// Origin: 30
-//
-// IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/include/usr/i2c/i2creasoncodes.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
/**
* @file i2creasoncodes.H
*
@@ -53,6 +53,7 @@ enum i2cModuleId
I2C_WAIT_FOR_CMD_COMP = 0x05,
I2C_READ_STATUS_REG = 0x06,
I2C_CHECK_FOR_ERRORS = 0x07,
+ I2C_SETUP_MASTERS = 0x08,
};
/**
@@ -71,6 +72,8 @@ enum i2cReasonCode
I2C_CMD_COMP_TIMEOUT = I2C_COMP_ID | 0x05, // Timeout waiting for Cmd Complete
I2C_HW_ERROR_FOUND = I2C_COMP_ID | 0x06, // Error found in Status register
I2C_MASTER_SENTINEL_TARGET = I2C_COMP_ID | 0x07, // Master Sentinel used as target
+ I2C_NO_CENTAUR_FOUND = I2C_COMP_ID | 0x08, // No Centaur chip found
+ I2C_NO_PROC_FOUND = I2C_COMP_ID | 0x09, // No Processor chip found
};
}; // end I2C
diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
index c757df18c..4b62e5243 100644
--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
+++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
@@ -51,6 +51,7 @@
#include <sys/mmio.h>
#include <mbox/mbox_queues.H>
#include <mbox/mboxif.H>
+#include <i2c/i2cif.H>
#include <initservice/isteps_trace.H>
#include <hwpisteperror.H>
@@ -136,7 +137,7 @@ void* call_host_runtime_setup( void *io_pArgs )
// Write the HostServices attributes into mainstore
l_err = RUNTIME::populate_attributes();
- // - Update HDAT with tpmd logs
+ // - Update HDAT with tpmd logs
} while(0);
@@ -243,6 +244,18 @@ errlHndl_t callShutdown ( void )
do
{
+ // Phyp needs us to program all of the I2C masters with the bus
+ // divisor
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Setup I2C Masters" );
+ err = I2C::i2cSetupMasters();
+ if( err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error setting up I2C Bus Divisors" );
+ break;
+ }
+
// Set scratch register to indicate Hostboot is [still] active.
const char * hostboot_string = "hostboot";
mmio_scratch_write(MMIO_SCRATCH_HOSTBOOT_ACTIVE,
diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C
index 0c6c40f9d..0aee39199 100755
--- a/src/usr/i2c/i2c.C
+++ b/src/usr/i2c/i2c.C
@@ -1,25 +1,25 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/usr/i2c/i2c.C $
-//
-// IBM CONFIDENTIAL
-//
-// COPYRIGHT International Business Machines Corp. 2011
-//
-// p1
-//
-// Object Code Only (OCO) source materials
-// Licensed Internal Code Source Materials
-// IBM HostBoot Licensed Internal Code
-//
-// The source code for this program is not published or other-
-// wise divested of its trade secrets, irrespective of what has
-// been deposited with the U.S. Copyright Office.
-//
-// Origin: 30
-//
-// IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/i2c/i2c.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
/**
* @file i2c.C
*
@@ -38,7 +38,9 @@
#include <errl/errlmanager.H>
#include <targeting/common/targetservice.H>
#include <devicefw/driverif.H>
+#include <targeting/common/predicates/predicates.H>
#include <i2c/i2creasoncodes.H>
+#include <i2c/i2cif.H>
#include "i2c.H"
// ----------------------------------------------
@@ -64,6 +66,8 @@ TRAC_INIT( & g_trac_i2cr, "I2CR", 4096 );
#define I2C_COMMAND_ATTEMPTS 2 // 1 Retry on failure
#define I2C_RETRY_DELAY 10000000 // Sleep for 10 ms before retrying
#define MAX_I2C_ENGINES 3 // Maximum of 3 engines per I2C Master
+#define P8_MASTER_ENGINES 2 // Number of Engines used in P8
+#define CENTAUR_MASTER_ENGINES 1 // Number of Engines in a Centaur
// ----------------------------------------------
namespace I2C
@@ -1094,4 +1098,207 @@ errlHndl_t i2cGetInterrupts ( TARGETING::Target * i_target,
return err;
} // end i2cGetInterrupts
+
+// ------------------------------------------------------------------
+// i2cSetupMasters
+// ------------------------------------------------------------------
+errlHndl_t i2cSetupMasters ( void )
+{
+ errlHndl_t err = NULL;
+
+ modereg mode;
+ size_t size = sizeof(uint64_t);
+
+ TRACFCOMP( g_trac_i2c,
+ ENTER_MRK"i2cSetupMasters()" );
+
+ do
+ {
+ // Get top level system target
+ TARGETING::TargetService& tS = TARGETING::targetService();
+ TARGETING::Target * sysTarget = NULL;
+ tS.getTopLevelTarget( sysTarget );
+ assert( sysTarget != NULL );
+
+ // Get list of the Centaur Chips
+ TARGETING::TargetHandleList centList;
+ TARGETING::PredicateCTM predCent( TARGETING::CLASS_CHIP,
+ TARGETING::TYPE_MEMBUF );
+ tS.getAssociated( centList,
+ sysTarget,
+ TARGETING::TargetService::CHILD,
+ TARGETING::TargetService::ALL,
+ &predCent );
+
+ if( 0 == centList.size() )
+ {
+ TRACFCOMP( g_trac_i2c,
+ ERR_MRK"i2cSetupMasters: No Centaur chips found!" );
+
+ /*@
+ * @errortype
+ * @reasoncode I2C_NO_CENTAUR_FOUND
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid I2C_SETUP_MASTERS
+ * @userdata1 <UNUSED>
+ * @userdata2 <UNUSED>
+ * @frucallout <NONE>
+ * @devdesc No Centaur chips found to programm I2C bus
+ * divisor
+ */
+ err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ I2C_SETUP_MASTERS,
+ I2C_NO_CENTAUR_FOUND,
+ 0x0, 0x0 );
+ break;
+ }
+
+ TRACDCOMP( g_trac_i2c,
+ INFO_MRK"I2C Master Centaurs: %d",
+ centList.size() );
+
+ // Setup each Membuf Master
+ for( uint32_t centaur = 0; centaur < centList.size(); centaur++ )
+ {
+ if( !centList[centaur]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional )
+ {
+ // Non functional
+ TRACDCOMP( g_trac_i2c,
+ INFO_MRK"Centaur %d is non-functional",
+ centaur );
+ continue;
+ }
+
+ for( uint32_t engine = 0; engine < CENTAUR_MASTER_ENGINES; engine++ )
+ {
+ // Write Mode Register:
+ mode.value = 0x0ull;
+
+ // TODO - Hard code to 400KHz until we get attributes in place
+ // to get this from the target.
+ mode.bit_rate_div = I2C_CLOCK_DIVISOR_400KHZ;
+ err = deviceWrite( centList[centaur],
+ &mode.value,
+ size,
+ DEVICE_SCOM_ADDRESS( masterAddrs[engine].mode ) );
+
+ if( err )
+ {
+ TRACFCOMP( g_trac_i2c,
+ ERR_MRK"i2cSetupMasters: Error reading from "
+ "Centaur, engine: %d",
+ engine );
+
+ // If we get errors on these reads, we still need to continue
+ // to program the I2C Bus Divisor for the rest
+ errlCommit( err,
+ I2C_COMP_ID );
+ }
+ }
+
+ if( err )
+ {
+ break;
+ }
+ }
+
+ if( err )
+ {
+ break;
+ }
+
+ // Get list of Procs
+ TARGETING::TargetHandleList procList;
+ TARGETING::PredicateCTM predProc( TARGETING::CLASS_CHIP,
+ TARGETING::TYPE_PROC );
+ tS.getAssociated( procList,
+ sysTarget,
+ TARGETING::TargetService::CHILD,
+ TARGETING::TargetService::ALL,
+ &predProc );
+
+ if( 0 == procList.size() )
+ {
+ TRACFCOMP( g_trac_i2c,
+ ERR_MRK"i2cSetupMasters: No Processor chips found!" );
+
+ /*@
+ * @errortype
+ * @reasoncode I2C_NO_PROC_FOUND
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid I2C_SETUP_MASTERS
+ * @userdata1 <UNUSED>
+ * @userdata2 <UNUSED>
+ * @frucallout <NONE>
+ * @devdesc No Centaur chips found to programm I2C bus
+ * divisor
+ */
+ err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ I2C_SETUP_MASTERS,
+ I2C_NO_PROC_FOUND,
+ 0x0, 0x0 );
+ break;
+ }
+
+ TRACDCOMP( g_trac_i2c,
+ INFO_MRK"I2C Master Procs: %d",
+ procList.size() );
+
+ // Do reads to each Proc
+ for( uint32_t proc = 0; proc < procList.size(); proc++ )
+ {
+ if( !procList[proc]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional )
+ {
+ // Non functional
+ TRACDCOMP( g_trac_i2c,
+ INFO_MRK"proc %d, is non-functional",
+ proc );
+ continue;
+ }
+
+ for( uint32_t engine = 0; engine < P8_MASTER_ENGINES; engine++ )
+ {
+ // Write Mode Register:
+ mode.value = 0x0ull;
+
+ // TODO - Hard code to 400KHz until we get attributes in place
+ // to get this from the target.
+ mode.bit_rate_div = I2C_CLOCK_DIVISOR_400KHZ;
+ err = deviceWrite( procList[proc],
+ &mode.value,
+ size,
+ DEVICE_SCOM_ADDRESS( masterAddrs[engine].mode ) );
+
+ if( err )
+ {
+ TRACFCOMP( g_trac_i2c,
+ ERR_MRK"i2cSetupMasters: Error reading from "
+ "Processor, engine: %d",
+ engine );
+
+ // If we get errors on these reads, we still need to continue
+ // to program the I2C Bus Divisor for the rest
+ errlCommit( err,
+ I2C_COMP_ID );
+ }
+ }
+
+ if( err )
+ {
+ break;
+ }
+ }
+
+ if( err )
+ {
+ break;
+ }
+ } while( 0 );
+
+ TRACFCOMP( g_trac_i2c,
+ EXIT_MRK"i2cSetupMasters()" );
+
+ return err;
+}
+
} // end namespace I2C
diff --git a/src/usr/i2c/i2c.H b/src/usr/i2c/i2c.H
index ad7592e2c..a5448a175 100755
--- a/src/usr/i2c/i2c.H
+++ b/src/usr/i2c/i2c.H
@@ -1,25 +1,25 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/usr/i2c/i2c.H $
-//
-// IBM CONFIDENTIAL
-//
-// COPYRIGHT International Business Machines Corp. 2011
-//
-// p1
-//
-// Object Code Only (OCO) source materials
-// Licensed Internal Code Source Materials
-// IBM HostBoot Licensed Internal Code
-//
-// The source code for this program is not published or other-
-// wise divested of its trade secrets, irrespective of what has
-// been deposited with the U.S. Copyright Office.
-//
-// Origin: 30
-//
-// IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/i2c/i2c.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __I2C_H
#define __I2C_H
@@ -630,6 +630,7 @@ errlHndl_t i2cGetInterrupts ( TARGETING::Target * i_target,
input_args_t i_args,
uint64_t & o_intRegValue );
+
}; // end I2C namespace
#endif // __I2C_H
diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml
index 9d7d2b04f..6267e937d 100644
--- a/src/usr/targeting/common/xmltohb/target_types_hb.xml
+++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml
@@ -87,6 +87,14 @@
<attribute>
<id>IBSCOM_VIRTUAL_ADDR</id>
</attribute>
+ <attribute>
+ <id>I2C_ENGINE_MUTEX_0</id>
+ <default>0</default>
+ </attribute>
+ <attribute>
+ <id>I2C_ENGINE_MUTEX_1</id>
+ <default>0</default>
+ </attribute>
</targetTypeExtension>
</attributes>
OpenPOWER on IntegriCloud