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-rw-r--r--src/build/buildpnor/pnorLayoutAxone.xml36
-rw-r--r--src/build/buildpnor/pnorLayoutFSP.xml22
2 files changed, 29 insertions, 29 deletions
diff --git a/src/build/buildpnor/pnorLayoutAxone.xml b/src/build/buildpnor/pnorLayoutAxone.xml
index 83a3a726b..c0a8bbcc0 100644
--- a/src/build/buildpnor/pnorLayoutAxone.xml
+++ b/src/build/buildpnor/pnorLayoutAxone.xml
@@ -149,10 +149,10 @@ Layout Description
<ecc/>
</section>
<section>
- <description>Hostboot Runtime Services for Sapphire (7.0MB)</description>
+ <description>Hostboot Runtime Services for Sapphire (8.0MB)</description>
<eyeCatch>HBRT</eyeCatch>
<physicalOffset>0x199D000</physicalOffset>
- <physicalRegionSize>0x700000</physicalRegionSize>
+ <physicalRegionSize>0x800000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
<ecc/>
@@ -160,7 +160,7 @@ Layout Description
<section>
<description>Payload (19.875MB)</description>
<eyeCatch>PAYLOAD</eyeCatch>
- <physicalOffset>0x209D000</physicalOffset>
+ <physicalOffset>0x219D000</physicalOffset>
<physicalRegionSize>0x13E0000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -169,7 +169,7 @@ Layout Description
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TEST</eyeCatch>
- <physicalOffset>0x347D000</physicalOffset>
+ <physicalOffset>0x357D000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<testonly/>
<side>sideless</side>
@@ -180,7 +180,7 @@ Layout Description
from skipping header. Signing is forced in build pnor phase -->
<description>Special PNOR Test Space with Header (36K)</description>
<eyeCatch>TESTRO</eyeCatch>
- <physicalOffset>0x3486000</physicalOffset>
+ <physicalOffset>0x3586000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<testonly/>
@@ -191,7 +191,7 @@ Layout Description
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
- <physicalOffset>0x348F000</physicalOffset>
+ <physicalOffset>0x358F000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
@@ -202,7 +202,7 @@ Layout Description
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
- <physicalOffset>0x3496000</physicalOffset>
+ <physicalOffset>0x3596000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -210,7 +210,7 @@ Layout Description
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
- <physicalOffset>0x349B000</physicalOffset>
+ <physicalOffset>0x359B000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -218,7 +218,7 @@ Layout Description
<section>
<description>OCC Lid (1.125M)</description>
<eyeCatch>OCC</eyeCatch>
- <physicalOffset>0x349F000</physicalOffset>
+ <physicalOffset>0x359F000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -229,7 +229,7 @@ Layout Description
<!-- We need 266KB per module sort, going to support
40 tables by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
- <physicalOffset>0x35BF000</physicalOffset>
+ <physicalOffset>0x36BF000</physicalOffset>
<physicalRegionSize>0x600000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -238,7 +238,7 @@ Layout Description
<section>
<description>FIRDATA (12K)</description>
<eyeCatch>FIRDATA</eyeCatch>
- <physicalOffset>0x3BBF000</physicalOffset>
+ <physicalOffset>0x3CBF000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -246,7 +246,7 @@ Layout Description
<section>
<description>Memory Data (128K)</description>
<eyeCatch>MEMD</eyeCatch>
- <physicalOffset>0x3BC2000</physicalOffset>
+ <physicalOffset>0x3CC2000</physicalOffset>
<physicalRegionSize>0x20000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -255,7 +255,7 @@ Layout Description
<section>
<description>Secureboot Test Load (12K)</description>
<eyeCatch>TESTLOAD</eyeCatch>
- <physicalOffset>0x3BE2000</physicalOffset>
+ <physicalOffset>0x3CE2000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -264,7 +264,7 @@ Layout Description
<section>
<description>Centaur Hw Ref Image (12K)</description>
<eyeCatch>CENHWIMG</eyeCatch>
- <physicalOffset>0x3BE5000</physicalOffset>
+ <physicalOffset>0x3CE5000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -273,7 +273,7 @@ Layout Description
<section>
<description>Secure Boot (144K)</description>
<eyeCatch>SECBOOT</eyeCatch>
- <physicalOffset>0x3BE8000</physicalOffset>
+ <physicalOffset>0x3CE8000</physicalOffset>
<physicalRegionSize>0x24000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -282,7 +282,7 @@ Layout Description
<section>
<description>Open CAPI Memory Buffer (OCMB) Firmware (1164K)</description>
<eyeCatch>OCMBFW</eyeCatch>
- <physicalOffset>0x3C0C000</physicalOffset>
+ <physicalOffset>0x3D0C000</physicalOffset>
<physicalRegionSize>0x123000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -292,7 +292,7 @@ Layout Description
<section>
<description>HDAT Data (16K)</description>
<eyeCatch>HDAT</eyeCatch>
- <physicalOffset>0x3D2F000</physicalOffset>
+ <physicalOffset>0x3E2F000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -301,7 +301,7 @@ Layout Description
<section>
<description>Eeprom Cache(512K)</description>
<eyeCatch>EECACHE</eyeCatch>
- <physicalOffset>0x3D33000</physicalOffset>
+ <physicalOffset>0x3E33000</physicalOffset>
<physicalRegionSize>0x80000</physicalRegionSize>
<side>sideless</side>
<ecc/>
diff --git a/src/build/buildpnor/pnorLayoutFSP.xml b/src/build/buildpnor/pnorLayoutFSP.xml
index 491bdf281..9569e479f 100644
--- a/src/build/buildpnor/pnorLayoutFSP.xml
+++ b/src/build/buildpnor/pnorLayoutFSP.xml
@@ -168,10 +168,10 @@ Layout Description - Used when building an FSP driver
<ecc/>
</section>
<section>
- <description>Hostboot Runtime Services for Sapphire (6MB)</description>
+ <description>Hostboot Runtime Services for Sapphire (8MB)</description>
<eyeCatch>HBRT</eyeCatch>
<physicalOffset>0x162D000</physicalOffset>
- <physicalRegionSize>0x600000</physicalRegionSize>
+ <physicalRegionSize>0x800000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
<ecc/>
@@ -179,7 +179,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
- <physicalOffset>0x1C2D000</physicalOffset>
+ <physicalOffset>0x1E2D000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
@@ -190,7 +190,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
- <physicalOffset>0x1C34000</physicalOffset>
+ <physicalOffset>0x1E34000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -198,7 +198,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
- <physicalOffset>0x1C39000</physicalOffset>
+ <physicalOffset>0x1E39000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -207,7 +207,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>OCC Lid (1.125M)</description>
<eyeCatch>OCC</eyeCatch>
- <physicalOffset>0x1C3D000</physicalOffset>
+ <physicalOffset>0x1E3D000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -218,7 +218,7 @@ Layout Description - Used when building an FSP driver
<!-- We need 266KB per module sort, going to support
40 tables by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
- <physicalOffset>0x1D5D000</physicalOffset>
+ <physicalOffset>0x1F5D000</physicalOffset>
<physicalRegionSize>0xC00000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -227,7 +227,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Memory Data (128K)</description>
<eyeCatch>MEMD</eyeCatch>
- <physicalOffset>0x295D000</physicalOffset>
+ <physicalOffset>0x2B5D000</physicalOffset>
<physicalRegionSize>0x20000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
@@ -236,7 +236,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Centaur Hw Ref Image (12K)</description>
<eyeCatch>CENHWIMG</eyeCatch>
- <physicalOffset>0x297D000</physicalOffset>
+ <physicalOffset>0x2B7D000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
@@ -245,7 +245,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Secure Boot (144K)</description>
<eyeCatch>SECBOOT</eyeCatch>
- <physicalOffset>0x2980000</physicalOffset>
+ <physicalOffset>0x2B80000</physicalOffset>
<physicalRegionSize>0x24000</physicalRegionSize>
<side>sideless</side>
<ecc/>
@@ -254,7 +254,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Open CAPI Memory Buffer (OCMB) Firmware (300K)</description>
<eyeCatch>OCMBFW</eyeCatch>
- <physicalOffset>0x29A4000</physicalOffset>
+ <physicalOffset>0x2BA4000</physicalOffset>
<physicalRegionSize>0x4B000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
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