diff options
Diffstat (limited to 'src')
7 files changed, 128 insertions, 27 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ddrphy_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ddrphy_scom.C index 06fbc43ca..23ad44763 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ddrphy_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ddrphy_scom.C @@ -45,7 +45,6 @@ constexpr auto literal_0x5000 = 0x5000; constexpr auto literal_0x4040 = 0x4040; constexpr auto literal_0xE058 = 0xE058; constexpr auto literal_0x0202 = 0x0202; -constexpr auto literal_0x4770 = 0x4770; fapi2::ReturnCode p9_ddrphy_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0) { @@ -3272,30 +3271,6 @@ fapi2::ReturnCode p9_ddrphy_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TG break; } } - { - l_rc = fapi2::getScom( TGT0, 0x8000c4140701103full, l_scom_buffer ); - - if (l_rc) - { - FAPI_ERR("ERROR executing: getScom (0x8000c4140701103full)"); - break; - } - - { - if (( true )) - { - l_scom_buffer.insert<uint64_t> (literal_0x4770, 48, 16, 48 ); - } - } - - l_rc = fapi2::putScom(TGT0, 0x8000c4140701103full, l_scom_buffer); - - if (l_rc) - { - FAPI_ERR("ERROR executing: putScom (0x8000c4140701103full)"); - break; - } - } } while (0); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index 82a481c0b..f9d8c1f60 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -367,6 +367,8 @@ inline fapi2::ReturnCode dodt_on( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& FAPI_TRY( mss::eff_dram_cwl(i_target, l_cwl) ); o_dodt = l_cwl + l_al + l_ca_parity_latency - 2; + FAPI_INF( "dodt_on %s %d", mss::c_str(i_target), o_dodt ); + return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: @@ -385,6 +387,40 @@ inline fapi2::ReturnCode dodt_off( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& return dodt_on(i_target, o_dodt); } +/// +/// @brief Direct ODT turn on Latency - max value on port +/// @param[in] i_target the MCA target +/// @param[out] o_dodt *in clocks* +/// @return FAPI2_RC_SUCCESS iff ok +/// +inline fapi2::ReturnCode max_dodt_on( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_dodt ) +{ + for (const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target)) + { + uint8_t l_odt = 0; + FAPI_TRY( mss::dodt_on(d, l_odt) ); + + o_dodt = std::max(o_dodt, l_odt); + } + + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Direct ODT turn off Latency - max value on port +/// @param[in] i_target the MCA +/// @param[out] o_dodt *in clocks* +/// @return FAPI2_RC_SUCCESS iff ok +/// +inline fapi2::ReturnCode max_dodt_off( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_dodt ) +{ + // Same for all frequencies of DDR4; DDR4 Full spec update(79-4B) + return max_dodt_on(i_target, o_dodt); +} + // TK RODTon - The use would be for the ODT in the PHY, but the max RODT is equal to or less than // the max DODTon/off so it would really never be used anyway there anyway. We can implement it if // we find another need for it. diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index b9d39b945..841dfd36a 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -641,6 +641,7 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target // Workarounds // FAPI_TRY( mss::workarounds::dp16::dqs_polarity(p) ); + FAPI_TRY( mss::workarounds::dp16::rd_dia_config5(p) ); } fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C index 415a54cef..c7583f58c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.C @@ -169,8 +169,26 @@ fapi2::ReturnCode reset_timing1( const fapi2::Target<TARGET_TYPE_MCA>& i_target template<> fapi2::ReturnCode reset_timing2( const fapi2::Target<TARGET_TYPE_MCA>& i_target ) { - // NO-OP right now. - return fapi2::FAPI2_RC_SUCCESS; + typedef seqTraits<TARGET_TYPE_MCA> TT; + + // Reset value of SEQ_TIMING2 is lucky 7's - we'll fix up the first nibble with ODT info + fapi2::buffer<uint64_t> l_data(0x7777); + + // Table 5-327. SEQ Memory Timing Parameter 2 Register + // TODTLON_OFF_CYCLES max(ODTLon, ODTLoff) + uint8_t l_odtlon = 0; + uint8_t l_odtloff = 0; + uint64_t l_odt = 0; + FAPI_TRY( mss::max_dodt_on(i_target, l_odtlon) ); + FAPI_TRY( mss::max_dodt_off(i_target, l_odtloff) ); + + l_odt = std::max( l_odtlon, l_odtloff ); + l_data.insertFromRight<TT::TODTLON_OFF_CYCLES, TT::TODTLON_OFF_CYCLES_LEN>( exp_helper(l_odt) ); + + FAPI_TRY( mss::putScom(i_target, TT::SEQ_TIMING2_REG, l_data) ); + +fapi_try_exit: + return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H index 4985c6557..044467a2c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/seq.H @@ -250,6 +250,41 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief Read SEQ_MEM_TIMING_PARAM2 +/// @tparam T fapi2 Target Type - derived +/// @tparam TT traits type defaults to seqTraits<T> +/// @param[in] i_target the fapi2 target of the port +/// @param[out] o_data the value of the register +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +template< fapi2::TargetType T, typename TT = seqTraits<T> > +inline fapi2::ReturnCode read_timing2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data ) +{ + FAPI_TRY( mss::getScom(i_target, TT::SEQ_TIMING2_REG, o_data) ); + FAPI_DBG("seq_timing2: 0x%016lx", o_data); +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Write SEQ_MEM_TIMING_PARAM2 +/// @tparam T fapi2 Target Type - derived +/// @tparam TT traits type defaults to seqTraits<T> +/// @param[in] i_target the fapi2 target of the port +/// @param[in] i_data the value of the register +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +template< fapi2::TargetType T, typename TT = seqTraits<T> > +inline fapi2::ReturnCode write_timing2( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data ) +{ + FAPI_DBG("seq_timing2: 0x%016lx", i_data); + FAPI_TRY( mss::putScom(i_target, TT::SEQ_TIMING2_REG, i_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + // TK read, write RD_WR_DATA /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C index 3430305c5..110020984 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C @@ -91,6 +91,33 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief DP16 Read Diagnostic Configuration 5 work around +/// Not in the Model 67 spydef, so we scom them. Should be removed when they are +/// added to the spydef. +/// @param[in] i_target the fapi2 target of the port +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +fapi2::ReturnCode rd_dia_config5( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) +{ + // Config provided by S. Wyatt 8/16 + constexpr uint64_t rd_dia_config = 0x0010; + + static const std::vector<uint64_t> l_addrs = + { + MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_0, + MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_1, + MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_2, + MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_3, + MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_4, + }; + + FAPI_TRY( mss::scom_blastah(i_target, l_addrs, rd_dia_config) ); + +fapi_try_exit: + return fapi2::current_err; +} + } // close namespace dp16 } // close namespace workarounds } // close namespace mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H index fd20617f3..1c88754e8 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H @@ -60,6 +60,15 @@ namespace dp16 /// fapi2::ReturnCode dqs_polarity( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); +/// +/// @brief DP16 Read Diagnostic Configuration 5 work around +/// Not in the Model 67 spydef, so we scom them. Should be removed when they are +/// added to the spydef. +/// @param[in] i_target the fapi2 target of the port +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +fapi2::ReturnCode rd_dia_config5( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); + } // close namespace dp16 } // close namespace workarounds } // close namespace mss |
