diff options
Diffstat (limited to 'src')
5 files changed, 39 insertions, 22 deletions
diff --git a/src/include/usr/isteps/istep14list.H b/src/include/usr/isteps/istep14list.H index 573b4ed19..73c612c38 100644 --- a/src/include/usr/isteps/istep14list.H +++ b/src/include/usr/isteps/istep14list.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -120,6 +122,7 @@ const DepModInfo g_istep14Dependancies = { DEP_LIB(libdram_initialization.so), DEP_LIB(libdram_training.so), DEP_LIB(libdump.so), + DEP_LIB(libnest_chiplets.so), NULL } }; diff --git a/src/usr/hwpf/hwp/dram_initialization/makefile b/src/usr/hwpf/hwp/dram_initialization/makefile index c693c3004..b5bf93cf2 100644 --- a/src/usr/hwpf/hwp/dram_initialization/makefile +++ b/src/usr/hwpf/hwp/dram_initialization/makefile @@ -5,7 +5,9 @@ # # OpenPOWER HostBoot Project # -# COPYRIGHT International Business Machines Corp. 2012,2014 +# Contributors Listed Below - COPYRIGHT 2012,2014 +# [+] International Business Machines Corp. +# # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -54,6 +56,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/dram_initialization/mss_memd EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mc_config/mss_eff_config/ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_throttle_sync +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup ## NOTE: add new object files when you add a new HWP OBJS += dram_initialization.o diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C index 7f248fa4b..dd560543d 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C +++ b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_pcie_config.C,v 1.7 2014/01/27 05:22:15 jmcgill Exp $ +// $Id: proc_pcie_config.C,v 1.9 2014/08/27 14:53:48 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_config.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -42,6 +42,7 @@ //------------------------------------------------------------------------------ #include <fapiHwpExecInitFile.H> #include <proc_pcie_config.H> +#include <proc_a_x_pci_dmi_pll_setup.H> extern "C" { @@ -128,7 +129,7 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( data); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%d_FIR_0x%08X)", + FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%zd_FIR_0x%08X)", i, PROC_PCIE_CONFIG_PCIE_NEST_FIR[i]); break; } @@ -139,7 +140,7 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( data); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%d_FIR_WOF_0x%08X)", + FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%zd_FIR_WOF_0x%08X)", i, PROC_PCIE_CONFIG_PCIE_NEST_FIR_WOF[i]); break; } @@ -159,7 +160,7 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( data); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%d_FIR_ACTION0_0x%08X)", + FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%zd_FIR_ACTION0_0x%08X)", i, PROC_PCIE_CONFIG_PCIE_NEST_FIR_ACTION0[i]); break; } @@ -179,7 +180,7 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( data); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%d_FIR_ACTION1_0x%08X)", + FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%zd_FIR_ACTION1_0x%08X)", i, PROC_PCIE_CONFIG_PCIE_NEST_FIR_ACTION1[i]); break; } @@ -199,7 +200,7 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( data); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%d_FIR_MASK_0x%08X)", + FAPI_ERR("proc_pcie_config_pbcq_fir: Error from fapiPutScom (PCIE%zd_FIR_MASK_0x%08X)", i, PROC_PCIE_CONFIG_PCIE_NEST_FIR_MASK[i]); break; } @@ -259,6 +260,15 @@ fapi::ReturnCode proc_pcie_config( FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq_fir"); break; } + + rc = proc_a_x_pci_dmi_pll_setup_unmask_lock( + i_target, + PCIE_CHIPLET_0x09000000); + if (!rc.ok()) + { + FAPI_ERR("proc_pcie_config: Error from proc_a_x_pci_dmi_pll_setup_unmask_lock"); + break; + } } else { diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C index d5bda7b7f..004ed3b44 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.C @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_a_x_pci_dmi_pll_setup.C,v 1.15 2014/04/02 14:02:33 jmcgill Exp $ +// $Id: proc_a_x_pci_dmi_pll_setup.C,v 1.16 2014/08/27 14:53:40 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_a_x_pci_dmi_pll_setup.C,v $ //------------------------------------------------------------------------------ // *| @@ -327,18 +327,6 @@ fapi::ReturnCode proc_a_x_pci_dmi_pll_setup_unmask_lock(const fapi::Target & i_t break; } -// TODO: Temporary workaround for SW274072 and SW273877 in order to release 820 driver. -// HW team is investigating. Also, refer to SW255565 for more info. -// -// rc = proc_a_x_pci_dmi_pll_setup_unmask_lock( -// i_target, -// PCIE_CHIPLET_0x09000000); -// if (!rc.ok()) -// { -// FAPI_ERR("Error from proc_a_x_pci_dmi_pll_setup_unmask_lock"); -// break; -// } - FAPI_INF("Done setting up PCIE PLL. "); } // end PCIE PLL @@ -357,6 +345,9 @@ fapi::ReturnCode proc_a_x_pci_dmi_pll_setup_unmask_lock(const fapi::Target & i_t This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: proc_a_x_pci_dmi_pll_setup.C,v $ +Revision 1.16 2014/08/27 14:53:40 jmcgill +shift PCI PLL unlock reporting from istep 7 -> 14 (SW273877) + Revision 1.15 2014/04/02 14:02:33 jmcgill respect function input parameters/partial good in unlock error clear/unmask logic (SW252901) diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.H b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.H index c40bd52f1..ce3df4d2e 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.H +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup/proc_a_x_pci_dmi_pll_setup.H @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_a_x_pci_dmi_pll_setup.H,v 1.7 2014/04/02 14:02:33 jmcgill Exp $ +// $Id: proc_a_x_pci_dmi_pll_setup.H,v 1.8 2014/08/27 14:53:48 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_a_x_pci_dmi_pll_setup.H,v $ //------------------------------------------------------------------------------ // *| @@ -62,6 +62,16 @@ typedef fapi::ReturnCode (*proc_a_x_pci_dmi_pll_setup_FP_t)(const fapi::Target & extern "C" { +/* + * @brief Clear and unmask chiplet PLL lock indication + * @param[in] i_target Reference to target + * @param[in] i_chiplet_base_scom_addr Aligned base address of chiplet SCOM + * address space + * @return ReturnCode + */ + fapi::ReturnCode proc_a_x_pci_dmi_pll_setup_unmask_lock(const fapi::Target & i_target, + const uint32_t i_chiplet_base_scom_addr); + /** * @brief Initialize and lock A/X/PCI/DMI PLLs * |