diff options
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 32 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 2 |
2 files changed, 34 insertions, 0 deletions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 48e2e7da8..239ae3ed4 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -19948,4 +19948,36 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <readable/> </attribute> +<attribute> + <id>SYSTEM_IPL_PHASE</id> + <description>Define context for current phase of system IPL. + Provided by the platform. + HB_IPL = 0x1,HB_RUNTIME = 0x2,CACHE_CONTAINED = 0x4</description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_SYSTEM_IPL_PHASE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>ADU_XSCOM_BAR_BASE_ADDR</id> + <description>Defines XSCOM base address on each processor level. + address provided by the MRW </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_ADU_XSCOM_BAR_BASE_ADDR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index d1c25a5bf..f4aeb08f8 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -564,6 +564,7 @@ <attribute><id>TLB_RESERVE_SIZE</id></attribute> <attribute><id>TIME_BASE</id></attribute> <attribute><id>CPU_ATTR</id></attribute> + <attribute><id>ADU_XSCOM_BAR_BASE_ADDR</id></attribute> </targetType> <targetType> @@ -2025,6 +2026,7 @@ <attribute><id>PFET_POWERDOWN_DELAY_NS</id></attribute> <attribute><id>PFET_VDD_VOFF_SEL</id></attribute> <attribute><id>PFET_VCS_VOFF_SEL</id></attribute> + <attribute><id>SYSTEM_IPL_PHASE</id></attribute> </targetType> <!-- enc-node-power9 --> |