diff options
Diffstat (limited to 'src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml')
| -rw-r--r-- | src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml | 748 |
1 files changed, 745 insertions, 3 deletions
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml index 2b78bb57f..ec2dbd275 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml +++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml @@ -5,7 +5,7 @@ <!-- --> <!-- IBM CONFIDENTIAL --> <!-- --> -<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- COPYRIGHT International Business Machines Corp. 2013,2014 --> <!-- --> <!-- p1 --> <!-- --> @@ -20,11 +20,753 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<hwpErrors> -<!-- $Id: memory_mss_eff_config.xml,v 1.1 2013/06/19 18:27:53 bellows Exp $ --> +<!-- $Id: memory_mss_eff_config.xml,v 1.2 2014/04/01 17:07:22 asaetow Exp $ --> <!-- For file ../../ipl/fapi/mss_eff_config.C --> <!-- // *! OWNER NAME : Anuwat Saetow Email: asaetow@us.ibm.com --> <!-- // *! BACKUP NAME : Mark Bellows Email: bellows@us.ibm.com --> +<hwpErrors> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_LRDIMM_INVALID_EXEC</rc> + <description>Invalid exec of mss_lrdimm_eff_config function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INVALID_TERM_EXEC</rc> + <description>Invalid exec of mss_eff_config_termination function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DDR4_INVALID_EXEC</rc> + <description>Invalid exec of mss_eff_config_ddr4 function in + mss_eff_config </description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_MISMATCH_EMPTY</rc> + <description>Plug rule violation, one position is empty but other are present + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_MISMATCH_SIDE</rc> + <description>Plug rule violation, sides do not match + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_MISMATCH_TOP</rc> + <description>Plug rule violation, top and bottom do not match + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_0_1</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_0</ffdc> + <ffdc>CUR_DIMM_SPD_VALID_U8ARRAY_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN</rc> + <description>Incompatable DRAM generation + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>DRAM_DEVICE_TYPE_0_0</ffdc> + <ffdc>DRAM_DEVICE_TYPE_0_1</ffdc> + <ffdc>DRAM_DEVICE_TYPE_1_0</ffdc> + <ffdc>DRAM_DEVICE_TYPE_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_TYPE</rc> + <description>Incompatable DIMM type + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>MODULE_TYPE_0_0</ffdc> + <ffdc>MODULE_TYPE_0_1</ffdc> + <ffdc>MODULE_TYPE_1_0</ffdc> + <ffdc>MODULE_TYPE_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_RANKS</rc> + <description>Incompatable DIMM ranks + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>NUM_RANKS_0_0</ffdc> + <ffdc>NUM_RANKS_0_1</ffdc> + <ffdc>NUM_RANKS_1_0</ffdc> + <ffdc>NUM_RANKS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_BANKS</rc> + <description>Incompatable DIMM banks + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_BANKS_0_0</ffdc> + <ffdc>SDRAM_BANKS_0_1</ffdc> + <ffdc>SDRAM_BANKS_1_0</ffdc> + <ffdc>SDRAM_BANKS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_ROWS</rc> + <description>Incompatable DIMM rows + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_ROWS_0_0</ffdc> + <ffdc>SDRAM_ROWS_0_1</ffdc> + <ffdc>SDRAM_ROWS_1_0</ffdc> + <ffdc>SDRAM_ROWS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_COLUMNS</rc> + <description>Incompatable DIMM columns + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>SDRAM_COLS_0_0</ffdc> + <ffdc>SDRAM_COLS_0_1</ffdc> + <ffdc>SDRAM_COLS_1_0</ffdc> + <ffdc>SDRAM_COLS_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_BUS_WIDTH</rc> + <description>Incompatable DRAM primary bus width + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>BUS_WIDTH_0_0</ffdc> + <ffdc>BUS_WIDTH_0_1</ffdc> + <ffdc>BUS_WIDTH_1_0</ffdc> + <ffdc>BUS_WIDTH_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_UNSUPPORTED_MODULE_MEMORY_BUS_WIDTH</rc> + <description>Unsupported DRAM bus width, only 64bit with ECC extension is allowed + </description> + <ffdc>MODULE_MEMORY_BUS_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_WIDTH</rc> + <description>Incompatable DRAM width + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>DRAM_WIDTH_0_0</ffdc> + <ffdc>DRAM_WIDTH_0_1</ffdc> + <ffdc>DRAM_WIDTH_1_0</ffdc> + <ffdc>DRAM_WIDTH_1_1</ffdc> + + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DRAM_DEVICE_ERROR</rc> + <description>Unknown DRAM type + </description> + <ffdc>DRAM_DEVICE_TYPE</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_MOD_TYPE_ERROR</rc> + <description>Unknown DIMM type + </description> + <ffdc>MOD_TYPE</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_SDRAM_BANK_ERROR</rc> + <description>Unknown DRAM bank + </description> + <ffdc>SDRAM_BANKS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_SDRAM_ROWS_ERROR</rc> + <description>Unknown DRAM rows + </description> + <ffdc>SDRAM_ROWS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_SDRAM_COLS_ERROR</rc> + <description>Unknown DRAM cols + </description> + <ffdc>SDRAM_COLS</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_16_ERROR</rc> + <description>Unsupported DRAM width x16 + </description> + <ffdc>DRAM_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_32_ERROR</rc> + <description>Unsupported DRAM width x32 + </description> + <ffdc>DRAM_WIDTH</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DRAM_WIDTH_ERROR</rc> + <description>Unknown DRAM width + </description> + <FFDC>DRAM_WIDTH</FFDC> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DRAM_DENSITY_ERR</rc> + <description>Unsupported DRAM density + </description> + <ffdc>SDRAM_DENSITY</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_CWL_CALC_ERR</rc> + <description>Error calculating CWL + </description> + <ffdc>CWL_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_RDIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_UDIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE</rc> + <description>Currently unsupported IBM_TYPE + </description> + <ffdc>UNSUPPORTED_VAL</ffdc> + <FFDC>TARGET_MBA</FFDC> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> + +<!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_EFF_CONFIG_MSS_FREQ</rc> + <description>Invalid ATTR_MSS_FREQ + </description> + <FFDC>TARGET_MBA</FFDC> + <ffdc>FREQ_VAL</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET_MBA</target> + </deconfigure> + + <gard> + <target>TARGET_MBA</target> + <priority>HIGH</priority> + </gard> +</hwpError> </hwpErrors> |
