diff options
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile')
| -rw-r--r-- | src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile | 43 |
1 files changed, 22 insertions, 21 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile b/src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile index dbcd537e5..4321f9b58 100644 --- a/src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/cen.dmi.scom.initfile @@ -1,8 +1,9 @@ -#-- $Id: cen.dmi.scom.initfile,v 1.3 2012/06/19 23:16:29 jmcgill Exp $ +#-- $Id: cen.dmi.scom.initfile,v 1.6 2012/10/08 20:12:49 bwieman Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- +#-- 1.4 |thomsen |07/13/12|Updated non-mirrored PRBS_TAP_ID's to have abcdefgabcdefgabc... pattern #-- 1.3 |jmcgill |06/19/12|Update non-mirrored mode PRBS TX/RX values to make DMI.SETUP_ID = DMI_BUS, setup RX FENCE #-- 1.2 |thomsen |06/19/12|Updated PRBS_TAP_ID's to match processor #-- 1.1 |thomsen |06/11/12|Created initial version @@ -211,7 +212,7 @@ scom 0x800.0b(rx_dyn_rpr_err_tallying2_pg)(rx_grp0)(lane_na).0x(cn_gcr_addr){ # /_/ /_/ |_/_____/____/ /_/ \__,_/ .___/ /____/\___/_/\___/\___/\__/____/ banner2 -fslant # /_/ #------------------------------------------------------------------------------------- -# PER-LANE (RX) +# PER-LANE (RX: 17 lanes) #------------------------------------------------------------------------------------- scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_0).0x(cn_gcr_addr){ bits, scom_data, expr; @@ -261,17 +262,17 @@ scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_8).0x(cn_gcr_addr){ scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_9).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_h, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_h, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_b, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_10).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_g, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_g, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_c, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_11).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_f, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_f, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_d, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_12).0x(cn_gcr_addr){ bits, scom_data, expr; @@ -281,17 +282,17 @@ scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_12).0x(cn_gcr_addr){ scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_13).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_d, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_d, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_f, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_14).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_c, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_c, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_g, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_15).0x(cn_gcr_addr){ bits, scom_data, expr; rx_prbs_tap_id, rx_prbs_tap_id_pattern_b, (def_rx_mirrored_mode); - rx_prbs_tap_id, rx_prbs_tap_id_pattern_b, (def_rx_non_mirrored_mode); + rx_prbs_tap_id, rx_prbs_tap_id_pattern_h, (def_rx_non_mirrored_mode); } scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_16).0x(cn_gcr_addr){ bits, scom_data, expr; @@ -299,7 +300,7 @@ scom 0x800.0b(rx_prbs_mode_pl)(rx_grp0)(lane_16).0x(cn_gcr_addr){ rx_prbs_tap_id, rx_prbs_tap_id_pattern_a, (def_rx_non_mirrored_mode); } #------------------------------------------------------------------------------------- -# PER-LANE (TX) +# PER-LANE (TX: 24 lanes) #------------------------------------------------------------------------------------- # GCR Lane = 0 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_0).0x(cn_gcr_addr){ @@ -377,73 +378,73 @@ scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_11).0x(cn_gcr_addr){ scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_12).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_d, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_d, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_e, (def_tx_non_mirrored_mode); } # GCR Lane = 13 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_13).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_c, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_c, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_f, (def_tx_non_mirrored_mode); } # GCR Lane = 14 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_14).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_b, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_b, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_g, (def_tx_non_mirrored_mode); } # GCR Lane = 15 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_15).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_a, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_a, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_h, (def_tx_non_mirrored_mode); } # GCR Lane = 16 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_16).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_h, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_h, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_a, (def_tx_non_mirrored_mode); } # GCR Lane = 17 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_17).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_g, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_g, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_b, (def_tx_non_mirrored_mode); } # GCR Lane = 18 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_18).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_f, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_f, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_c, (def_tx_non_mirrored_mode); } # GCR Lane = 19 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_19).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_e, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_e, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_d, (def_tx_non_mirrored_mode); } # GCR Lane = 20 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_20).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_d, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_d, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_e, (def_tx_non_mirrored_mode); } # GCR Lane = 21 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_21).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_c, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_c, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_f, (def_tx_non_mirrored_mode); } # GCR Lane = 22 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_22).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_b, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_b, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_g, (def_tx_non_mirrored_mode); } # GCR Lane = 23 scom 0x800.0b(tx_prbs_mode_pl)(tx_grp0)(lane_23).0x(cn_gcr_addr){ bits, scom_data, expr; tx_prbs_tap_id, tx_prbs_tap_id_pattern_a, (def_tx_mirrored_mode); - tx_prbs_tap_id, tx_prbs_tap_id_pattern_a, (def_tx_non_mirrored_mode); + tx_prbs_tap_id, tx_prbs_tap_id_pattern_h, (def_tx_non_mirrored_mode); } |
