diff options
Diffstat (limited to 'src/usr/hwpf/hwp/edi_ei_initialization')
7 files changed, 970 insertions, 30 deletions
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C b/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C index ca7c6b246..224536aa4 100644 --- a/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C +++ b/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C @@ -59,7 +59,7 @@ // #include "fabric_io_run_training/fabric_io_run_training.H" // #include "host_startPRD_pbus/host_startPRD_pbus.H" // #include "host_attnlisten_proc/host_attnlisten_proc.H" -// #include "proc_fab_iovalid/proc_fab_iovalid.H" +#include "proc_fab_iovalid/proc_fab_iovalid.H" namespace EDI_EI_INITIALIZATION { @@ -340,45 +340,172 @@ void call_host_attnlisten_proc( void *io_pArgs ) // void call_proc_fab_iovalid( void *io_pArgs ) { - errlHndl_t l_errl = NULL; + ReturnCode l_rc; + errlHndl_t l_errl = NULL; - TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_fab_iovalid entry" ); -#if 0 - // @@@@@ CUSTOM BLOCK: @@@@@ - // figure out what targets we need - // customize any other inputs - // set up loops to go through all targets (if parallel, spin off a task) - - // dump physical path to targets - EntityPath l_path; - l_path = l_@targetN_target->getAttr<ATTR_PHYS_PATH>(); - l_path.dump(); - - // cast OUR type of target to a FAPI type of target. - const fapi::Target l_fapi_@targetN_target( - TARGET_TYPE_MEMBUF_CHIP, - reinterpret_cast<void *> - (const_cast<TARGETING::Target*>(l_@targetN_target)) ); + // Get all chip/chiplet targets + // Use PredicateIsFunctional to filter only functional chips/chiplets + TARGETING::PredicateIsFunctional l_isFunctional; + // filter for functional Chips/Chiplets + TARGETING::PredicateCTM l_Filter(CLASS_CHIP, TYPE_PROC); + // declare a postfix expression widget + TARGETING::PredicatePostfixExpr l_goodFilter; + // is-a--chip is-functional AND + l_goodFilter.push(&l_Filter).push(&l_isFunctional).And(); + // apply the filter through all targets. + TARGETING::TargetRangeFilter l_Procs( + TARGETING::targetService().begin(), + TARGETING::targetService().end(), + &l_goodFilter ); + + std::vector<proc_fab_smp_proc_chip *> l_smp; + + for ( ; l_Procs; ++l_Procs ) + { + proc_fab_smp_proc_chip *l_proc = new proc_fab_smp_proc_chip(); + l_smp.push_back( l_proc ); + + const TARGETING::Target * l_pTarget = *l_Procs; + fapi::Target l_fapiproc_target( TARGET_TYPE_PROC_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_pTarget)) ); + + l_proc->this_chip = l_fapiproc_target; + + std::vector<fapi::Target> l_abuses; + l_rc = fapiGetChildChiplets( l_fapiproc_target, + fapi::TARGET_TYPE_ABUS_ENDPOINT, l_abuses); + if (l_rc) + { + break; + } + + std::vector<fapi::Target>::iterator l_abus; + for (l_abus = l_abuses.begin(); l_abus != l_abuses.end(); ++l_abus) + { + fapi::Target & l_fapiTgt = *l_abus; + TARGETING::Target * l_target = NULL; + l_target = reinterpret_cast<TARGETING::Target*>(l_fapiTgt.get()); + uint8_t l_srcID = l_target->getAttr<ATTR_CHIP_UNIT>(); + TARGETING::Target *l_dstTgt = l_target->getAttr<ATTR_PEER_TARGET>(); + if (l_dstTgt) + { + fapi::Target l_fapiAbus( TARGET_TYPE_ABUS_ENDPOINT, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_dstTgt)) ); + fapi::Target l_parent; + l_rc = fapiGetParentChip( l_fapiAbus, l_parent ); + if (l_rc) + { + break; + } + proc_fab_smp_a_bus *l_Abus = new proc_fab_smp_a_bus(); + l_proc->a_busses.push_back(l_Abus); + l_Abus->src_chip_bus_id = + static_cast<proc_fab_smp_a_bus_id>(l_srcID); + l_Abus->dest_chip = new fapi::Target(l_parent); + uint8_t l_destID = l_dstTgt->getAttr<ATTR_CHIP_UNIT>(); + l_Abus->dest_chip_bus_id = + static_cast<proc_fab_smp_a_bus_id>(l_destID); + } + } + + if (l_rc) + { + break; + } + + std::vector<fapi::Target> l_xbuses; + l_rc = fapiGetChildChiplets( l_fapiproc_target, + fapi::TARGET_TYPE_XBUS_ENDPOINT, l_xbuses); + + if (l_rc) + { + break; + } + + std::vector<fapi::Target>::iterator l_xbus; + for (l_xbus = l_xbuses.begin(); l_xbus != l_xbuses.end(); ++l_xbus) + { + fapi::Target & l_fapiTgt = *l_xbus; + TARGETING::Target * l_target = NULL; + l_target = reinterpret_cast<TARGETING::Target*>(l_fapiTgt.get()); + uint8_t l_srcID = l_target->getAttr<ATTR_CHIP_UNIT>(); + TARGETING::Target *l_dstTgt = l_target->getAttr<ATTR_PEER_TARGET>(); + if (l_dstTgt) + { + fapi::Target l_fapiXbus( TARGET_TYPE_XBUS_ENDPOINT, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_dstTgt)) ); + fapi::Target l_parent; + l_rc = fapiGetParentChip( l_fapiXbus, l_parent ); + if (l_rc) + { + break; + } + proc_fab_smp_x_bus *l_Xbus = new proc_fab_smp_x_bus(); + l_proc->x_busses.push_back(l_Xbus); + l_Xbus->src_chip_bus_id = + static_cast<proc_fab_smp_x_bus_id>(l_srcID); + l_Xbus->dest_chip = new fapi::Target(l_parent); + uint8_t l_destID = l_dstTgt->getAttr<ATTR_CHIP_UNIT>(); + l_Xbus->dest_chip_bus_id = + static_cast<proc_fab_smp_x_bus_id>(l_destID); + } + } + + if (l_rc) + { + break; + } + } - // call the HWP with each fapi::Target - FAPI_INVOKE_HWP( l_errl, proc_fab_iovalid, _args_...); - if ( l_errl ) + if (l_rc.ok()) { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : .........." ); - errlCommit( l_errl, HWPF_COMP_ID ); + FAPI_INVOKE_HWP( l_errl, proc_fab_iovalid, l_smp, true, true, true ); + + if ( l_errl ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR : proc_fab_iovalid HWP fails"); + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : proc_fab_iovalid HWP passes"); + } } else { + l_errl = fapi::fapiRcToErrl(l_rc); TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : .........." ); + "ERROR : call_proc_fab_iovalid encountered an error"); } - // @@@@@ END CUSTOM BLOCK: @@@@@ -#endif - TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + std::vector<proc_fab_smp_proc_chip *>::iterator l_itr; + for (l_itr = l_smp.begin(); l_itr != l_smp.end(); ++l_itr) + { + std::vector<proc_fab_smp_a_bus *>::iterator l_atr; + for (l_atr = (*l_itr)->a_busses.begin(); + l_atr != (*l_itr)->a_busses.end(); ++l_atr) + { + delete ((*l_atr)->dest_chip); + delete (*l_atr); + } + std::vector<proc_fab_smp_x_bus *>::iterator l_xtr; + for (l_xtr = (*l_itr)->x_busses.begin(); + l_xtr != (*l_itr)->x_busses.end(); ++l_xtr) + { + delete ((*l_xtr)->dest_chip); + delete (*l_xtr); + } + delete (*l_itr); + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_fab_iovalid exit" ); // end task, returning any errorlogs to IStepDisp diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/makefile b/src/usr/hwpf/hwp/edi_ei_initialization/makefile index 5f3f92e09..ce997d0ad 100644 --- a/src/usr/hwpf/hwp/edi_ei_initialization/makefile +++ b/src/usr/hwpf/hwp/edi_ei_initialization/makefile @@ -41,15 +41,18 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization ## NOTE: add a new EXTRAINCDIR when you add a new HWP ## EXAMPLE: ## EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization/<HWP_dir> +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid ## NOTE: add new object files when you add a new HWP -OBJS = edi_ei_initialization.o +OBJS = edi_ei_initialization.o \ + proc_fab_iovalid.o proc_fab_smp.o ## NOTE: add a new directory onto the vpaths when you add a new HWP ## EXAMPLE: # VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization/<HWP_dir> +VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid include ${ROOTPATH}/config.mk diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C new file mode 100644 index 000000000..76c74d518 --- /dev/null +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C @@ -0,0 +1,332 @@ +// IBM_PROLOG_BEGIN_TAG +// This is an automatically generated prolog. +// +// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.C $ +// +// IBM CONFIDENTIAL +// +// COPYRIGHT International Business Machines Corp. 2012 +// +// p1 +// +// Object Code Only (OCO) source materials +// Licensed Internal Code Source Materials +// IBM HostBoot Licensed Internal Code +// +// The source code for this program is not published or other- +// wise divested of its trade secrets, irrespective of what has +// been deposited with the U.S. Copyright Office. +// +// Origin: 30 +// +// IBM_PROLOG_END +// $Id: proc_fab_iovalid.C,v 1.6 2012/04/16 19:44:55 jmcgill Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_iovalid.C,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : proc_fab_iovalid.C +// *! DESCRIPTION : Manage X/A link iovalid controls (FAPI) +// *! +// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com +// *! +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ +#include "proc_fab_iovalid.H" + +extern "C" +{ + +//------------------------------------------------------------------------------ +// Function definitions +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// function: utility subroutine which writes chiplet GP0 register to +// set/clear desired iovalid bits +// parameters: i_target => chip target +// i_active_link_mask => bit mask defining active links to act on +// i_set_not_clear => define desired operation +// (true=set, false=clear) +// i_gp0_and_mask_addr => SCOM address for chiplet GP0 AND +// mask register +// i_gp0_or_mask_addr => SCOM address for chiplet GP0 OR +// mask register +// returns: FAPI_RC_SUCCESS if operation was successful, else error +//------------------------------------------------------------------------------ +fapi::ReturnCode proc_fab_iovalid_write_gp0_mask( + const fapi::Target& i_target, + ecmdDataBufferBase& i_active_link_mask, + bool i_set_not_clear, + const uint32_t& i_gp0_and_mask_addr, + const uint32_t& i_gp0_or_mask_addr) +{ + // data buffer to hold final iovalid bit mask + ecmdDataBufferBase mask(64); + + // return codes + uint32_t rc_ecmd = 0; + fapi::ReturnCode rc; + + // mark function entry + FAPI_DBG("proc_fab_iovalid_write_gp0_mask: Start"); + + do + { + // copy input mask + rc_ecmd = i_active_link_mask.copy(mask); + // form final mask based on desired operation (set/clear) + if (!i_set_not_clear) + { + FAPI_DBG("proc_fab_iovalid_write_gp0_mask: Inverting active link mask"); + rc_ecmd |= mask.invert(); + } + + // check return code from buffer manipulation operations + rc.setEcmdError(rc_ecmd); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_write_gp0_mask: Error 0x%x setting up iovalid mask data buffer", + rc_ecmd); + break; + } + + // write GP0 register (use OR mask address for set operation, + // AND mask address for clear operation) + rc = fapiPutScom(i_target, + i_set_not_clear?i_gp0_or_mask_addr:i_gp0_and_mask_addr, + mask); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_write_gp0_mask: fapiPutScom error (GP0 Register 0x%08X)", + i_set_not_clear?i_gp0_or_mask_addr:i_gp0_and_mask_addr); + break; + } + + } while (0); + + // mark function exit + FAPI_DBG("proc_fab_iovalid_write_gp0_mask: End"); + return rc; +} + + +//------------------------------------------------------------------------------ +// function: utility subroutine to set/clear X bus iovalid bits on one chip +// parameters: i_smp_proc_chip => pointer to structure providing: +// o target for this chip +// o vector of structs representing X bus +// connections (empty if no connection) +// i_set_not_clear => define desired operation (true=set, false=clear) +// returns: FAPI_RC_SUCCESS if operation was successful, else error +//------------------------------------------------------------------------------ +fapi::ReturnCode proc_fab_iovalid_manage_x_links( + proc_fab_smp_proc_chip* i_smp_proc_chip, + bool i_set_not_clear) +{ + // data buffer to hold iovalid bit mask + ecmdDataBufferBase active_link_mask(64); + + // return codes + uint32_t rc_ecmd = 0; + fapi::ReturnCode rc; + + // mark function entry + FAPI_DBG("proc_fab_iovalid_manage_x_links: Start"); + + // set mask bit for each link + std::vector<proc_fab_smp_x_bus*>::iterator i; + for (i = i_smp_proc_chip->x_busses.begin(); + i != i_smp_proc_chip->x_busses.end(); + i++) + { + proc_fab_smp_x_bus_id src_chip_bus_id = (*i)->src_chip_bus_id; + FAPI_DBG("proc_fab_iovalid_manage_x_links: Adding link X%d to active link mask", + (*i)->src_chip_bus_id); + if (src_chip_bus_id == FBC_BUS_X0) + { + rc_ecmd |= active_link_mask.setBit(X_GP0_X0_IOVALID_BIT); + } + else if (src_chip_bus_id == FBC_BUS_X1) + { + rc_ecmd |= active_link_mask.setBit(X_GP0_X1_IOVALID_BIT); + } + else if (src_chip_bus_id == FBC_BUS_X2) + { + rc_ecmd |= active_link_mask.setBit(X_GP0_X2_IOVALID_BIT); + } + else + { + rc_ecmd |= active_link_mask.setBit(X_GP0_X3_IOVALID_BIT); + } + + // check aggregate return code from buffer manipulation operations + rc.setEcmdError(rc_ecmd); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_manage_x_links: Error 0x%x setting up active link mask data buffer", + rc_ecmd); + break; + } + + // write appropriate GP0 mask register to perform desired operation + rc = proc_fab_iovalid_write_gp0_mask(i_smp_proc_chip->this_chip, + active_link_mask, + i_set_not_clear, + X_GP0_AND_0x04000004, + X_GP0_OR_0x04000005); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_manage_x_links: Error from proc_fab_iovalid_write_gp0_mask"); + break; + } + } + + // mark function exit + FAPI_DBG("proc_fab_iovalid_manage_x_links: End"); + return rc; +} + + +//------------------------------------------------------------------------------ +// function: utility subroutine to set/clear A bus iovalid bits on one chip +// parameters: i_smp_proc_chip => pointer to structure providing: +// o target for this chip +// o vector of structs representing A bus +// connections (empty if no connection) +// i_set_not_clear => define desired operation (true=set, false=clear) +// returns: FAPI_RC_SUCCESS if operation was successful, else error +//------------------------------------------------------------------------------ +fapi::ReturnCode proc_fab_iovalid_manage_a_links( + proc_fab_smp_proc_chip* i_smp_proc_chip, + bool i_set_not_clear) +{ + // data buffer to hold iovalid bit mask + ecmdDataBufferBase active_link_mask(64); + + // return codes + uint32_t rc_ecmd = 0; + fapi::ReturnCode rc; + + // mark function entry + FAPI_DBG("proc_fab_iovalid_manage_a_links: Start"); + + // set mask bit for each link + std::vector<proc_fab_smp_a_bus*>::iterator i; + for (i = i_smp_proc_chip->a_busses.begin(); + i != i_smp_proc_chip->a_busses.end(); + i++) + { + proc_fab_smp_a_bus_id src_chip_bus_id = (*i)->src_chip_bus_id; + FAPI_DBG("proc_fab_iovalid_manage_a_links: Adding link A%d to active link mask", + (*i)->src_chip_bus_id); + if (src_chip_bus_id == FBC_BUS_A0) + { + rc_ecmd |= active_link_mask.setBit(A_GP0_A0_IOVALID_BIT); + } + else if (src_chip_bus_id == FBC_BUS_A1) + { + rc_ecmd |= active_link_mask.setBit(A_GP0_A1_IOVALID_BIT); + } + else + { + rc_ecmd |= active_link_mask.setBit(A_GP0_A2_IOVALID_BIT); + } + + // check aggregate return code from buffer manipulation operations + rc.setEcmdError(rc_ecmd); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_manage_a_links: Error 0x%x setting up active link mask data buffer", + rc_ecmd); + break; + } + + // write appropriate GP0 mask register to perform desired operation + rc = proc_fab_iovalid_write_gp0_mask(i_smp_proc_chip->this_chip, + active_link_mask, + i_set_not_clear, + A_GP0_AND_0x08000004, + A_GP0_OR_0x08000005); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid_manage_a_links: Error from proc_fab_iovalid_write_gp0_mask"); + break; + } + } + + // mark function exit + FAPI_DBG("proc_fab_iovalid_manage_a_links: End"); + return rc; +} + + +//------------------------------------------------------------------------------ +// HWP entry point +//------------------------------------------------------------------------------ +fapi::ReturnCode proc_fab_iovalid(std::vector<proc_fab_smp_proc_chip *>& i_smp, + bool i_manage_x, + bool i_manage_a, + bool i_set_not_clear) +{ + // return code + fapi::ReturnCode rc; + + // mark HWP entry + FAPI_IMP("proc_fab_iovalid: Entering ..."); + + do + { + // make pass through entire SMP, validate inputs + rc = proc_fab_smp_validate_smp(i_smp); + if (rc) + { + FAPI_ERR("proc_fab_iovalid: Error from proc_fab_smp_validate_smp"); + break; + } + + // loop over all chips composing SMP + for (std::vector<proc_fab_smp_proc_chip *>::iterator i = i_smp.begin(); + i != i_smp.end(); + i++) + { + // operate on X links? + if (i_manage_x) + { + rc = proc_fab_iovalid_manage_x_links(*i, + i_set_not_clear); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid: Error from proc_fab_iovalid_manage_x_links"); + break; + } + } + + // operate on A links? + if (i_manage_a) + { + rc = proc_fab_iovalid_manage_a_links(*i, + i_set_not_clear); + if (!rc.ok()) + { + FAPI_ERR("proc_fab_iovalid: Error from proc_fab_iovalid_manage_a_links"); + break; + } + } + } + } while(0); + + // log function exit + FAPI_IMP("proc_fab_iovalid: Exiting ..."); + return rc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H new file mode 100644 index 000000000..dbef4391d --- /dev/null +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H @@ -0,0 +1,123 @@ +// IBM_PROLOG_BEGIN_TAG +// This is an automatically generated prolog. +// +// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_iovalid.H $ +// +// IBM CONFIDENTIAL +// +// COPYRIGHT International Business Machines Corp. 2012 +// +// p1 +// +// Object Code Only (OCO) source materials +// Licensed Internal Code Source Materials +// IBM HostBoot Licensed Internal Code +// +// The source code for this program is not published or other- +// wise divested of its trade secrets, irrespective of what has +// been deposited with the U.S. Copyright Office. +// +// Origin: 30 +// +// IBM_PROLOG_END +// $Id: proc_fab_iovalid.H,v 1.6 2012/04/16 19:44:57 jmcgill Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_iovalid.H,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : proc_fab_iovalid.H +// *! DESCRIPTION : Manage X/A link iovalid controls (FAPI) +// *! +// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com +// *! +// *! ADDITIONAL COMMENTS: +// *! +// *! Manage fabric SMP (X/A) link iovalid controls, which control the +// *! logical link layer fabric traffic. +// *! +// *! The iovalid controls are intended to be raised in the IPL flow +// *! after the underlying physical (EI) layer is running, to start the +// *! flow of fabric frames. +// *! +// *! The iovalid controls are intended to be lowered prior to stopping +// *! the clocks in the dump process (to provide a clean dump state, +// *! assuming that the logical layer is quiesced). +// *! +//------------------------------------------------------------------------------ + +#ifndef _PROC_FAB_IOVALID_H_ +#define _PROC_FAB_IOVALID_H_ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +#include <fapi.H> +#include "proc_fab_smp.H" +#include "p8_scom_addresses.H" + +//------------------------------------------------------------------------------ +// Structure definitions +//------------------------------------------------------------------------------ + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode +(*proc_fab_iovalid_FP_t)(std::vector<proc_fab_smp_proc_chip *>&, + bool, + bool, + bool); + +//------------------------------------------------------------------------------ +// Constant definitions +//------------------------------------------------------------------------------ + +// GP0 register bit/field definitions +const uint8_t X_GP0_X0_IOVALID_BIT = 48; +const uint8_t X_GP0_X1_IOVALID_BIT = 49; +const uint8_t X_GP0_X2_IOVALID_BIT = 50; +const uint8_t X_GP0_X3_IOVALID_BIT = 51; + +const uint8_t A_GP0_A0_IOVALID_BIT = 48; +const uint8_t A_GP0_A1_IOVALID_BIT = 49; +const uint8_t A_GP0_A2_IOVALID_BIT = 50; + + +extern "C" +{ + +//------------------------------------------------------------------------------ +// Function prototypes +//------------------------------------------------------------------------------ + +// function: FAPI proc_fab_iovalid HWP entry point +// operates on chips passed in i_smp argument to perform +// desired iovalid manipulation (set or clear) on X/A busses +// parameters: i_smp => vector of pointers to proc_fab_smp_chip +// structures which defines scope of SMP fabric +// & bus connectivity +// i_manage_x => operate on X link iovalids? +// i_manage_x => operate on A link iovalids? +// i_set_not_clear => define target iovalid operation (true=set, +// false=clear) +// returns: FAPI_RC_SUCCESS if all specified operations complete successfully, +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG +// if invalid/NULL proc_fab_smp_proc_chip argument is passed +// in HWP argument vector +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG +// if invalid/NULL proc_fab_smp_a_bus argument is passed +// in HWP argument vector +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG +// if invalid/NULL proc_fab_smp_x_bus argument is passed +// in HWP argument vector +// else FAPI getscom/putscom return code for failing operation +fapi::ReturnCode proc_fab_iovalid(std::vector<proc_fab_smp_proc_chip *>& i_smp, + bool i_manage_x, + bool i_manage_a, + bool i_set_not_clear); + +} // extern "C" + +#endif // _PROC_FAB_IOVALID_H_ diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C new file mode 100644 index 000000000..d046d869e --- /dev/null +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C @@ -0,0 +1,186 @@ +// IBM_PROLOG_BEGIN_TAG +// This is an automatically generated prolog. +// +// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.C $ +// +// IBM CONFIDENTIAL +// +// COPYRIGHT International Business Machines Corp. 2012 +// +// p1 +// +// Object Code Only (OCO) source materials +// Licensed Internal Code Source Materials +// IBM HostBoot Licensed Internal Code +// +// The source code for this program is not published or other- +// wise divested of its trade secrets, irrespective of what has +// been deposited with the U.S. Copyright Office. +// +// Origin: 30 +// +// IBM_PROLOG_END +// $Id: proc_fab_smp.C,v 1.3 2012/04/27 18:20:00 jmcgill Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.C,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : proc_fab_smp.C +// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI) +// *! +// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com +// *! +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ +#include "proc_fab_smp.H" + +extern "C" { + +//------------------------------------------------------------------------------ +// Function definitions +//------------------------------------------------------------------------------ + +fapi::ReturnCode proc_fab_smp_validate_smp( + std::vector<proc_fab_smp_proc_chip *>& i_smp) +{ + // return code + fapi::ReturnCode rc; + + // iterator defintions + std::vector<proc_fab_smp_proc_chip *>::iterator smp_chip; + std::vector<proc_fab_smp_x_bus *>::iterator x_bus; + std::vector<proc_fab_smp_a_bus *>::iterator a_bus; + + do + { + // mark function entry + FAPI_DBG("proc_fab_smp_validate_smp: Start"); + + FAPI_DBG("proc_fab_smp_validate_smp: *************************************"); + for (smp_chip = i_smp.begin(); smp_chip != i_smp.end(); smp_chip++) + { + // ensure that proc_fab_smp_proc_chip pointer is non NULL + if ((*smp_chip) == NULL) + { + FAPI_ERR("proc_fab_smp_validate_smp: Invalid NULL proc_fab_smp_proc_chip pointer"); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG); + break; + } + + // display target information for this chip + FAPI_DBG("proc_fab_smp_validate_smp: Target: %s", (*smp_chip)->this_chip.toEcmdString()); + + // display information about X bus connections + for (x_bus = (*smp_chip)->x_busses.begin(); + x_bus != (*smp_chip)->x_busses.end(); + x_bus++) + { + // ensure that proc_fab_smp_x_bus pointer & enclosed destination + // chip pointers are non NULL + if ((*x_bus == NULL) || + ((*x_bus)->dest_chip == NULL)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Invalid/NULL proc_fab_smp_x_bus pointer"); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG); + break; + } + // validate source/destination bus ID values + if (((*x_bus)->src_chip_bus_id != FBC_BUS_X0) && + ((*x_bus)->src_chip_bus_id != FBC_BUS_X1) && + ((*x_bus)->src_chip_bus_id != FBC_BUS_X2) && + ((*x_bus)->src_chip_bus_id != FBC_BUS_X3)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Unsupported source X bus ID value 0x%x presented", + (*x_bus)->src_chip_bus_id); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG); + break; + } + if (((*x_bus)->dest_chip_bus_id != FBC_BUS_X0) && + ((*x_bus)->dest_chip_bus_id != FBC_BUS_X1) && + ((*x_bus)->dest_chip_bus_id != FBC_BUS_X2) && + ((*x_bus)->dest_chip_bus_id != FBC_BUS_X3)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Unsupported destination X bus ID value 0x%x presented", + (*x_bus)->dest_chip_bus_id); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG); + break; + } + FAPI_DBG("proc_fab_smp_validate_smp: X%d [ Target: %s X%d]", + (*x_bus)->src_chip_bus_id, + (*x_bus)->dest_chip->toEcmdString(), + (*x_bus)->dest_chip_bus_id); + } + if (!rc.ok()) + { + break; + } + + // display information about A bus connections + for (a_bus = (*smp_chip)->a_busses.begin(); + a_bus != (*smp_chip)->a_busses.end(); + a_bus++) + { + // ensure that proc_fab_smp_a_bus pointer & enclosed destination + // chip pointers are non NULL + if ((*a_bus == NULL) || + ((*a_bus)->dest_chip == NULL)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Invalid/NULL proc_fab_smp_a_bus pointer"); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG); + break; + } + // validate source/destination bus ID values + if (((*a_bus)->src_chip_bus_id != FBC_BUS_A0) && + ((*a_bus)->src_chip_bus_id != FBC_BUS_A1) && + ((*a_bus)->src_chip_bus_id != FBC_BUS_A2)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Unsupported source A bus ID value 0x%x presented", + (*a_bus)->src_chip_bus_id); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG); + break; + } + if (((*a_bus)->dest_chip_bus_id != FBC_BUS_A0) && + ((*a_bus)->dest_chip_bus_id != FBC_BUS_A1) && + ((*a_bus)->dest_chip_bus_id != FBC_BUS_A2)) + { + FAPI_ERR("proc_fab_smp_validate_smp: Unsupported destination A bus ID value 0x%x presented", + (*a_bus)->dest_chip_bus_id); + FAPI_SET_HWP_ERROR(rc, + RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG); + break; + } + FAPI_DBG("proc_fab_smp_validate_smp: A%d [ Target: %s A%d]", + (*a_bus)->src_chip_bus_id, + (*a_bus)->dest_chip->toEcmdString(), + (*a_bus)->dest_chip_bus_id); + } + if (!rc.ok()) + { + break; + } + + FAPI_DBG("proc_fab_smp_validate_smp:"); + } + FAPI_DBG("proc_fab_smp_validate_smp: *************************************"); + } while(0); + + // mark function exit + FAPI_DBG("proc_fab_smp_validate_smp: End"); + return rc; +} + + +} // extern "C" diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H new file mode 100644 index 000000000..ae904b1c5 --- /dev/null +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H @@ -0,0 +1,131 @@ +// IBM_PROLOG_BEGIN_TAG +// This is an automatically generated prolog. +// +// $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp.H $ +// +// IBM CONFIDENTIAL +// +// COPYRIGHT International Business Machines Corp. 2012 +// +// p1 +// +// Object Code Only (OCO) source materials +// Licensed Internal Code Source Materials +// IBM HostBoot Licensed Internal Code +// +// The source code for this program is not published or other- +// wise divested of its trade secrets, irrespective of what has +// been deposited with the U.S. Copyright Office. +// +// Origin: 30 +// +// IBM_PROLOG_END +// $Id: proc_fab_smp.H,v 1.2 2012/03/19 03:18:39 jmcgill Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.H,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : proc_fab_smp.H +// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI) +// *! +// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com +// *! +// *! ADDITIONAL COMMENTS: +// *! +// *! Define interface structures which pass SMP connectivity information +// *! between platform and FAPI HWP code. +// *! +//------------------------------------------------------------------------------ + +#ifndef _PROC_FAB_SMP_H_ +#define _PROC_FAB_SMP_H_ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +#include <fapi.H> + +//------------------------------------------------------------------------------ +// Structure definitions +//------------------------------------------------------------------------------ + +// define set of supported X busses +enum proc_fab_smp_x_bus_id +{ + FBC_BUS_X0 = 0, + FBC_BUS_X1 = 1, + FBC_BUS_X2 = 2, + FBC_BUS_X3 = 3 +}; + +// define set of supported A busses +enum proc_fab_smp_a_bus_id +{ + FBC_BUS_A0 = 0, + FBC_BUS_A1 = 1, + FBC_BUS_A2 = 2 +}; + +// encapsulate X bus connectivity information (relative to source chip): +// source bus ID +// destination bus ID, pointer to destination target +struct proc_fab_smp_x_bus +{ + proc_fab_smp_x_bus_id src_chip_bus_id; + fapi::Target* dest_chip; + proc_fab_smp_x_bus_id dest_chip_bus_id; +}; + +// encapsulate A bus connectivity information (relative to source chip): +// source bus ID +// destination bus ID, and pointer to destination target +struct proc_fab_smp_a_bus +{ + proc_fab_smp_a_bus_id src_chip_bus_id; + fapi::Target* dest_chip; + proc_fab_smp_a_bus_id dest_chip_bus_id; +}; + +// structure to document target/fabric connectivity for a single chip +// in the SMP topology +struct proc_fab_smp_proc_chip +{ + // target associated with this chip + fapi::Target this_chip; + // X bus connections + std::vector<proc_fab_smp_x_bus*> x_busses; + // A bus connections + std::vector<proc_fab_smp_a_bus*> a_busses; +}; + +//------------------------------------------------------------------------------ +// Function prototypes +//------------------------------------------------------------------------------ + +extern "C" +{ + +// function: validate & display SMP topology +// parameters: i_smp => vector of proc_fab_smp_chip structures which +// defines scope of SMP fabric & bus connectivity +// returns: FAPI_RC_SUCCESS if topology is valid, +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG +// if invalid/NULL proc_fab_smp_proc_chip argument is passed +// in HWP argument vector +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG +// if invalid/NULL proc_fab_smp_a_bus argument is passed +// in HWP argument vector +// RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG +// if invalid/NULL proc_fab_smp_x_bus argument is passed +// in HWP argument vector +// else FAPI getscom/putscom return code for failing operation +fapi::ReturnCode proc_fab_smp_validate_smp( + std::vector<proc_fab_smp_proc_chip *>& i_smp); + +} // extern "C" + +#endif // _PROC_FAB_SMP_H_ diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml new file mode 100644 index 000000000..9caa67fe8 --- /dev/null +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml @@ -0,0 +1,38 @@ +<!-- IBM_PROLOG_BEGIN_TAG + This is an automatically generated prolog. + + $Source: src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml $ + + IBM CONFIDENTIAL + + COPYRIGHT International Business Machines Corp. 2012 + + p1 + + Object Code Only (OCO) source materials + Licensed Internal Code Source Materials + IBM HostBoot Licensed Internal Code + + The source code for this program is not published or other- + wise divested of its trade secrets, irrespective of what has + been deposited with the U.S. Copyright Office. + + Origin: 30 + + IBM_PROLOG_END --> +<!-- Error definitions for proc_fab_smp library --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_PROC_CHIP_ARG</rc> + <description>Invalid/NULL proc_fab_smp_proc_chip_argument passed in HWP argument vector.</description> + </hwpError> + <hwpError> + <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_A_BUS_ARG</rc> + <description>Invalid/NULL proc_fab_smp_a_bus argument passed in HWP argument vector.</description> + </hwpError> + <hwpError> + <rc>RC_PROC_FAB_SMP_INVALID_PROC_FAB_SMP_X_BUS_ARG</rc> + <description>Invalid/NULL proc_fab_smp_x_bus argument passed in HWP argument vector.</description> + </hwpError> +</hwpErrors> |
