diff options
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
3 files changed, 328 insertions, 38 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_funcs.C b/src/usr/hwpf/hwp/dram_training/mss_funcs.C index 13301ce55..85b30452a 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_funcs.C +++ b/src/usr/hwpf/hwp/dram_training/mss_funcs.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_funcs.C,v 1.33 2013/08/27 22:22:46 kcook Exp $ +// $Id: mss_funcs.C,v 1.35 2014/02/21 21:58:42 jdsloat Exp $ /* File mss_funcs.C created by SLOAT JACOB D. (JAKE),2D3970 on Fri Apr 22 2011. */ //------------------------------------------------------------------------------ @@ -43,6 +43,8 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.35 | jdsloat | 02/21/14| Fixed an inf loop with edit 1.34 and 128GB DIMMs. +// 1.34 | jdsloat | 02/20/14| Edited set_end_bit to add a NOP to the end of every CCS execution per CCS defect // 1.33 | kcook | 08/27/13| Removed LRDIMM functions to mss_lrdimm_funcs.C. Use with mss_funcs.H v1.16. // 1.32 | kcook | 08/16/13| Added LRDIMM support. Use with mss_funcs.H v1.15. // 1.31 | jdsloat | 05/20/13| Added ddr_gen determination in address mirror mode function @@ -98,21 +100,72 @@ ReturnCode mss_ccs_set_end_bit( uint32_t i_instruction_number ) { - uint32_t reg_address = 0; uint32_t rc_num = 0; ReturnCode rc; ecmdDataBufferBase data_buffer(64); - reg_address = i_instruction_number + CCS_INST_ARRY1_AB_REG0_0x03010635; - - FAPI_INF( "Setting End Bit."); - - rc = fapiGetScom(i_target, reg_address, data_buffer); + ecmdDataBufferBase address_16(16); + ecmdDataBufferBase bank_3(3); + ecmdDataBufferBase activate_1(1); + ecmdDataBufferBase rasn_1(1); + ecmdDataBufferBase casn_1(1); + ecmdDataBufferBase wen_1(1); + ecmdDataBufferBase cke_4(4); + ecmdDataBufferBase csn_8(8); + ecmdDataBufferBase odt_4(4); + ecmdDataBufferBase ddr_cal_type_4(4); + ecmdDataBufferBase num_idles_16(16); + ecmdDataBufferBase num_repeat_16(16); + ecmdDataBufferBase data_20(20); + ecmdDataBufferBase read_compare_1(1); + ecmdDataBufferBase rank_cal_4(4); + ecmdDataBufferBase ddr_cal_enable_1(1); + ecmdDataBufferBase ccs_end_1(1); + + uint32_t l_port_number = 0xFFFFFFFF; + + i_instruction_number = i_instruction_number + 1; + + FAPI_INF( "Setting End Bit on instruction (NOP): %d.", i_instruction_number); + + // Single NOP with CKE raised high and the end bit set high + rc_num = rc_num | csn_8.setBit(0,8); + rc_num = rc_num | address_16.clearBit(0, 16); + rc_num = rc_num | num_idles_16.clearBit(0, 16); + rc_num = rc_num | odt_4.setBit(0,4); + rc_num = rc_num | csn_8.setBit(0,8); + rc_num = rc_num | cke_4.setBit(0,4); + rc_num = rc_num | wen_1.clearBit(0); + rc_num = rc_num | casn_1.clearBit(0); + rc_num = rc_num | rasn_1.clearBit(0); + rc_num = rc_num | ccs_end_1.setBit(0); + + rc.setEcmdError(rc_num); if(rc) return rc; - rc_num = data_buffer.setBit(58); - rc.setEcmdError( rc_num); + + rc = mss_ccs_inst_arry_0( i_target, + i_instruction_number, + address_16, + bank_3, + activate_1, + rasn_1, + casn_1, + wen_1, + cke_4, + csn_8, + odt_4, + ddr_cal_type_4, + l_port_number); if(rc) return rc; - rc = fapiPutScom(i_target, reg_address, data_buffer); + rc = mss_ccs_inst_arry_1( i_target, + i_instruction_number, + num_idles_16, + num_repeat_16, + data_20, + read_compare_1, + rank_cal_4, + ddr_cal_enable_1, + ccs_end_1); if(rc) return rc; return rc; @@ -239,17 +292,22 @@ ReturnCode mss_ccs_inst_arry_0( uint32_t reg_address = 0; ecmdDataBufferBase data_buffer(64); - if (io_instruction_number >= 31) + if ((io_instruction_number >= 30)&&(i_port != 0xFFFFFFFF)) { uint32_t num_retry = 10; uint32_t timer = 10; - rc = mss_ccs_set_end_bit( i_target, 30); + rc = mss_ccs_set_end_bit( i_target, 29); if(rc) return rc; rc = mss_execute_ccs_inst_array( i_target, num_retry, timer); if(rc) return rc; io_instruction_number = 0; } + if (i_port == 0xFFFFFFFF) + { + i_port = 0; + } + reg_address = io_instruction_number + CCS_INST_ARRY0_AB_REG0_0x03010615; rc_num = rc_num | data_buffer.insert(i_cke, 24, 4, 0); @@ -312,11 +370,11 @@ ReturnCode mss_ccs_inst_arry_1( uint32_t reg_address = 0; ecmdDataBufferBase goto_inst(5); - if (io_instruction_number >= 31) + if ((io_instruction_number >= 30)&&(i_ccs_end.isBitClear(0))) { uint32_t num_retry = 10; uint32_t timer = 10; - rc = mss_ccs_set_end_bit( i_target, 30); + rc = mss_ccs_set_end_bit( i_target, 29); if(rc) return rc; rc = mss_execute_ccs_inst_array( i_target, num_retry, timer); if(rc) return rc; diff --git a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml new file mode 100755 index 000000000..eea5c60b8 --- /dev/null +++ b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml @@ -0,0 +1,212 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/memory_mss_lrdimm_funcs.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- $Id: memory_mss_lrdimm_funcs.xml,v 1.1 2014/02/12 22:47:52 kcook Exp $ --> +<!-- Error definitions for mss_lrdimm_funcs procedure --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_UNSUPPORTED_TYPE</rc> + <description> + Currently unsuported IBM type + </description> + <ffdc>IBM_TYPE</ffdc> + <ffdc>TARGET</ffdc> + <callout> + <target>DIMM</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>DIMM</target> + </deconfigure> + <gard> + <target>DIMM</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_MSS_FREQ</rc> + <description>Invalid LRDIMM ATTR_MSS_FREQ</description> + <ffdc>L_MSS_FREQ</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_MSS_VOLT</rc> + <description>Invalid LRDIMM ATTR_MSS_VOLT</description> + <ffdc>L_MSS_VOLT</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_DRAM_DENSITY</rc> + <description>Invalid ATTR_EFF_DRAM_DENSITY for mult_mode = 1</description> + <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc> + <ffdc>L_DRAM_DENSITY</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_DRAM_DENSITY_MULT_2</rc> + <description>Invalid ATTR_EFF_DRAM_DENSITY for mult_mode = 2</description> + <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc> + <ffdc>L_DRAM_DENSITY</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_SPD_DRV_IMP</rc> + <description>Invalid SPD LR MR1,2 DRAM drv imp on</description> + <ffdc>L_DRAM_RON</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_SPD_RTT_NOM</rc> + <description>Invalid SPD LR MR1,2 DRAM drv imp on</description> + <ffdc>L_DRAM_RTT_NOM</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_SPD_RTT_WR</rc> + <description>Invalid SPD LR MR1,2 DRAM RTT_WR</description> + <ffdc>L_DRAM_RTT_WR</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_LRDIMM_INVALID_RANK_MULT_MODE</rc> + <description>Invalid LR rank mult mode </description> + <ffdc>L_LRDIMM_RANK_MULT_MODE</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> + <gard> + <target>TARGET</target> + </gard> + </hwpError> + +</hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C index 9ca589880..366805ced 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C +++ b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_lrdimm_funcs.C,v 1.6 2014/01/07 21:50:11 bellows Exp $ +// $Id: mss_lrdimm_funcs.C,v 1.8 2014/02/13 18:04:08 kcook Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2013 // *! All Rights Reserved -- Property of IBM @@ -40,6 +40,8 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.8 | kcook |13-FEB-14| More FW updates. +// 1.7 | kcook |12-FEB-14| Updated HWP_ERROR per RAS review to be used with memory_mss_lrdimm_funcs.xml // 1.6 | bellows |02-JAN-14| VPD attribute removal // 1.5 | kcook |12/03/13 | Updated VPD attributes. // 1.4 | bellows |09/16/13 | Hostboot compile update @@ -67,7 +69,7 @@ const uint32_t MSS_EFF_VALID = 255; using namespace fapi; -fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, uint32_t& ccs_inst_cnt) +fapi::ReturnCode mss_lrdimm_rcd_load( fapi::Target& i_target, uint32_t port_number, uint32_t& ccs_inst_cnt) { ReturnCode rc; uint8_t num_drops_per_port; @@ -262,6 +264,8 @@ fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, ui data_buff_rcd_word.insertFromRight(&l_rcd_cntl_word_7, 28,4); func_rcd_control_word[dimm_number] = data_buff_rcd_word.getDoubleWord(0); + + //check for rc but not seeing where rc is set in this loop/if statment if(rc) return rc; } } @@ -338,6 +342,7 @@ fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, ui data_buff_rcd_word.insertFromRight(&l_rcd_cntl_word_9, 36,4); func_rcd_control_word[dimm_number] = data_buff_rcd_word.getDoubleWord(0); + //why check rc here and not at the FAPI_ATTR_GET line if(rc) return rc; } } @@ -371,6 +376,7 @@ fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, ui data_buff_rcd_word.insertFromRight(&l_rcd_cntl_word_11,44,4); func_rcd_control_word[dimm_number] = data_buff_rcd_word.getDoubleWord(0); + //not sure why the rc check is here since there are no rc calls if(rc) return rc; } } @@ -469,6 +475,8 @@ fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, ui data_buff_rcd_word.insert(ext_funcs[dimm_number][i][1], 60,4); // msb data func_rcd_control_word[dimm_number] = data_buff_rcd_word.getDoubleWord(0); + + //not sure where the rc call is made if(rc) return rc; } // end if has ranks } // end dimm loop @@ -525,7 +533,7 @@ fapi::ReturnCode mss_lrdimm_rcd_load( Target& i_target, uint32_t port_number, ui } -fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number,uint32_t dimm_number, uint32_t& io_ccs_inst_cnt) +fapi::ReturnCode mss_lrdimm_mrs_load( fapi::Target& i_target , uint32_t i_port_number,uint32_t dimm_number, uint32_t& io_ccs_inst_cnt) { // For LRDIMM Set Rtt_nom, rtt_wr, driver impedance for R0 and R1 // turn off MRS broadcast @@ -679,6 +687,8 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, data_buff_rcd_word.clearBit(0,64); data_buff_rcd_word.insertFromRight(&l_rcd_cntl_word_14, 56,4); func_rcd_control_word[dimm_num] = data_buff_rcd_word.getDoubleWord(0); + + //not sure need this rc check if(rc) return rc; } } @@ -747,6 +757,7 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, data_buff_rcd_word.insert(ext_func[1], 60,4); // msb data func_rcd_control_word[dimm_number] = data_buff_rcd_word.getDoubleWord(0); + //not sure need this rc check if(rc) return rc; } // end if has ranks @@ -964,6 +975,8 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, data_buff_rcd_word.clearBit(0,64); data_buff_rcd_word.insertFromRight(&l_rcd_cntl_word_14, 56,4); func_rcd_control_word[dimm_num] = data_buff_rcd_word.getDoubleWord(0); + + //not sure if need the rc check if(rc) return rc; } } @@ -1081,7 +1094,7 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, return rc; } -fapi::ReturnCode mss_execute_lrdimm_mb_dram_training(Target &i_target) +fapi::ReturnCode mss_execute_lrdimm_mb_dram_training(fapi::Target &i_target) { ReturnCode rc; uint8_t l_rcd_cntl_word_7; @@ -1231,7 +1244,7 @@ fapi::ReturnCode mss_execute_lrdimm_mb_dram_training(Target &i_target) return rc; } -fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, +fapi::ReturnCode mss_lrdimm_eff_config(const fapi::Target &i_target_mba, uint8_t cur_dimm_spd_valid_u8array[PORT_SIZE][DIMM_SIZE], uint32_t mss_freq, uint8_t eff_num_ranks_per_dimm[PORT_SIZE][DIMM_SIZE]) { @@ -1256,7 +1269,6 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, if(rc) { FAPI_ERR("Error retrieving assodiated dimms"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); break; } @@ -1267,7 +1279,6 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, if(rc) { FAPI_ERR("Error retrieving ATTR_MBA_PORT"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); break; } //------------------------------------------------------------------------ @@ -1275,7 +1286,6 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, if(rc) { FAPI_ERR("Error retrieving ATTR_MBA_DIMM"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); break; } @@ -1357,7 +1367,6 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, if(rc) { FAPI_ERR("Error reading spd data from caller"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); break; } @@ -1472,7 +1481,11 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, //p_o_atts->eff_stack_type[l_cur_mba_port][l_cur_mba_dimm] = fapi::ENUM_ATTR_EFF_STACK_TYPE_NONE; eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm] = fapi::ENUM_ATTR_EFF_IBM_TYPE_UNDEFINED; FAPI_ERR("Currently unsupported IBM_TYPE on %s!", i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + uint8_t IBM_TYPE = eff_num_ranks_per_dimm[l_cur_mba_port][l_cur_mba_dimm]; + const fapi::Target& TARGET = i_target_mba; + fapi::Target& DIMM = l_target_dimm_array[l_cur_mba_dimm]; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_UNSUPPORTED_TYPE); + return rc; } } // end valid dimm } // end dimm loop @@ -1492,7 +1505,6 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, if(rc) { FAPI_ERR("Error setting attributes"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); break; } } while(0); @@ -1500,7 +1512,7 @@ fapi::ReturnCode mss_lrdimm_eff_config(const Target &i_target_mba, return rc; } -fapi::ReturnCode mss_lrdimm_rewrite_odt( const Target& i_target_mba, uint32_t * p_b_var_array, uint32_t *var_array_p_array[5]) +fapi::ReturnCode mss_lrdimm_rewrite_odt(const fapi::Target& i_target_mba, uint32_t * p_b_var_array, uint32_t *var_array_p_array[5]) { ReturnCode rc; uint8_t l_num_ranks_per_dimm_u8array[PORT_SIZE][DIMM_SIZE]; @@ -1547,7 +1559,7 @@ fapi::ReturnCode mss_lrdimm_rewrite_odt( const Target& i_target_mba, uint32_t * return rc; } -fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) +fapi::ReturnCode mss_lrdimm_term_atts(const fapi::Target& i_target_mba) { ReturnCode rc; @@ -1629,6 +1641,7 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) FAPI_INF("rcd control word 8-9 %X", l_rcd_cntl_word_8_9 ); + const fapi::Target& TARGET = i_target_mba; // RC10 LRDIMM operating speed if ( l_mss_freq <= 933 ) { // 800Mbps l_rcd_cntl_word_10 = 0; @@ -1642,7 +1655,8 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) l_rcd_cntl_word_10 = 4; } else { FAPI_ERR("Invalid LRDIMM ATTR_MSS_FREQ = %d on %s!", l_mss_freq, i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + uint32_t& L_MSS_FREQ = l_mss_freq; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_MSS_FREQ); return rc; } FAPI_INF("rcd control word 10 %X", l_rcd_cntl_word_10 ); @@ -1655,7 +1669,8 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) l_rcd_cntl_word_11 = 6; } else { FAPI_ERR("Invalid LRDIMM ATTR_MSS_VOLT = %d on %s!", l_mss_volt, i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + uint32_t& L_MSS_VOLT = l_mss_volt; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_MSS_VOLT); return rc; } FAPI_INF("rcd control word 11 %X", l_rcd_cntl_word_11 ); @@ -1685,6 +1700,8 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) } data_buffer_8.extractToRight( &l_rcd_cntl_word_14, 0, 4); FAPI_INF("rcd control word 14 %X", l_rcd_cntl_word_14 ); + uint8_t& L_LRDIMM_RANK_MULT_MODE=l_lrdimm_rank_mult_mode; + uint8_t& L_DRAM_DENSITY=l_dram_density; // RC15 Rank multiplication if ( l_lrdimm_rank_mult_mode == 4 ) { @@ -1696,7 +1713,7 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) l_rcd_cntl_word_15 = 7; // A[17:16]; 4x multiplication, 4 Gbit DDR3 SDRAM } else { FAPI_ERR("Invalid LRDIMM Rank mult mode =%d, ATTR_EFF_DRAM_DENSITY = %d on %s!", l_lrdimm_rank_mult_mode, l_dram_density, i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_RANK_MULT_MODE); return rc; } } else if ( l_lrdimm_rank_mult_mode == 2 ) { if ( l_dram_density == 1 ) { @@ -1707,7 +1724,7 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) l_rcd_cntl_word_15 = 3; // A[16]; 2x multiplication, 4 Gbit DDR3 SDRAM } else { FAPI_ERR("Invalid LRDIMM Rank Mult mode = %d, ATTR_EFF_DRAM_DENSITY = %d on %s!", l_lrdimm_rank_mult_mode, l_dram_density, i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_DRAM_DENSITY_MULT_2); return rc; } } else { l_rcd_cntl_word_15 = 0; @@ -1741,8 +1758,9 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) } else if ( l_dram_ron[l_port][l_dimm] == 1 ) { l_dram_ron[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RON_OHM34; } else { + uint8_t& L_DRAM_RON = l_dram_ron[l_port][l_dimm]; FAPI_ERR("Invalid SPD LR MR1,2 DRAM drv imp on %s!", i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_SPD_DRV_IMP); return rc; } attr_eff_dram_ron[l_port][l_dimm] = l_dram_ron[l_port][l_dimm]; @@ -1762,8 +1780,9 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) case 5 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM30; break; default: FAPI_ERR("Invalid SPD LR MR1,2 DRAM RTT_NOM on %s!", i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; - break; + uint8_t& L_DRAM_RTT_NOM = l_dram_rtt_nom[l_port][l_dimm]; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_SPD_RTT_NOM); + return rc; } switch (l_dram_rtt_wr[l_port][l_dimm]) { @@ -1774,8 +1793,9 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) case 2 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_WR_OHM120; break; default: FAPI_ERR("Invalid SPD LR MR1,2 DRAM RTT_WR on %s!", i_target_mba.toEcmdString()); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; - break; + uint8_t& L_DRAM_RTT_WR = l_dram_rtt_wr[l_port][l_dimm]; + FAPI_SET_HWP_ERROR(rc, RC_MSS_LRDIMM_INVALID_SPD_RTT_WR); + return rc; } uint8_t l_rank; @@ -1825,7 +1845,7 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) return rc; } -fapi::ReturnCode mss_spec_rcd_load( Target& i_target, uint32_t i_port_number, uint8_t *p_i_rcd_num_arr, uint8_t i_rcd_num_arr_length, uint64_t i_rcd_word[], uint32_t& io_ccs_inst_cnt,uint8_t i_keep_cke_high) +fapi::ReturnCode mss_spec_rcd_load( fapi::Target& i_target, uint32_t i_port_number, uint8_t *p_i_rcd_num_arr, uint8_t i_rcd_num_arr_length, uint64_t i_rcd_word[], uint32_t& io_ccs_inst_cnt,uint8_t i_keep_cke_high) { const uint8_t MAX_NUM_PORTS=2; const uint8_t MAX_NUM_DIMMS=2; |