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-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C2631
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C8300
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.H30
-rwxr-xr-xsrc/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C46
-rwxr-xr-xsrc/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H10
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C311
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C32
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.C600
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.H99
-rw-r--r--src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_shmoo_common.H16
10 files changed, 6860 insertions, 5215 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
index 48529a4f4..c62c99695 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_draminit_training_advanced.C,v 1.45 2015/02/09 15:54:37 sglancy Exp $
+// $Id: mss_draminit_training_advanced.C,v 1.50 2015/08/27 21:59:32 eliner Exp $
/* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */
//------------------------------------------------------------------------------
@@ -32,8 +32,8 @@
//------------------------------------------------------------------------------
// *! TITLE :mss_draminit_training_advanced.C
// *! DESCRIPTION : Tools for centaur procedures
-// *! OWNER NAME : Saravanan Sethuraman email ID:saravanans@in.ibm.com
-// *! BACKUP NAME: Mark D Bellows email ID:bellows@us.ibm.com
+// *! OWNER NAME : Preetham Hosmane email: preeragh@in.ibm.com
+// *! BACKUP NAME: Saravanan Sethuraman email ID:saravanans@in.ibm.com
// #! ADDITIONAL COMMENTS :
//
// General purpose funcs
@@ -87,7 +87,11 @@
// 1.43 | jdsloat |10-MAR-14| Edited comments
// 1.44 |preeragh |06-NOV-14| Added Sanity checks for wr_vref and rd_vref only at nominal and disabled any other
// 1.45 |sglancy |09-FEB-14| Responded to FW comments
-
+// 1.46 |preeragh |22-Jun-14| DDR4 Enhancements and Optimizations
+// 1.47 |preeragh |22-Jul-14| 64 Bit compile Fix
+// 1.48 |preeragh |19-Aug-14| Fix FW Review Comments
+// 1.49 |eliner |27-Aug-15| Fixing Index Overflow Bug
+// 1.50 |eliner |27-Aug-15| Fixing Index Overflow Bug
// This procedure Schmoo's DRV_IMP, SLEW, VREF (DDR, CEN), RCV_IMP based on attribute from effective config procedure
// DQ & DQS Driver impedance, Slew rate, WR_Vref shmoo would call only write_eye shmoo for margin calculation
// DQ & DQS VREF (rd_vref), RCV_IMP shmoo would call rd_eye for margin calculation
@@ -110,92 +114,108 @@
#include <mss_generic_shmoo.H>
#include <mss_draminit_training_advanced.H>
#include <mss_unmask_errors.H>
+#include <mss_mrs6_DDR4.H>
+#include <mss_ddr4_pda.H>
+#include <vector>
const uint32_t MASK = 1;
const uint32_t MAX_DIMM =2;
enum shmoo_param
{
- PARAM_NONE = 0x00,
- DELAY_REG = 0x01,
- DRV_IMP = 0x02,
- SLEW_RATE = 0x04,
- WR_VREF = 0x08,
- RD_VREF = 0x10,
- RCV_IMP = 0x20
+ PARAM_NONE = 0x00,
+ DELAY_REG = 0x01,
+ DRV_IMP = 0x02,
+ SLEW_RATE = 0x04,
+ WR_VREF = 0x08,
+ RD_VREF = 0x10,
+ RCV_IMP = 0x20
};
extern "C"
{
-using namespace fapi;
+ using namespace fapi;
-fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_target_mba);
+ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_target_mba);
-fapi::ReturnCode drv_imped_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid);
+ fapi::ReturnCode drv_imped_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid);
-fapi::ReturnCode slew_rate_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid);
+ fapi::ReturnCode slew_rate_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid);
-fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid);
+ fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid);
+
+ fapi::ReturnCode wr_vref_shmoo_ddr4(const fapi::Target & i_target_mba);
+ fapi::ReturnCode wr_vref_shmoo_ddr4_bin(const fapi::Target & i_target_mba);
+ fapi::ReturnCode rd_vref_shmoo_ddr4(const fapi::Target & i_target_mba);
-fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid);
+ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid);
-fapi::ReturnCode rcv_imp_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid);
+ fapi::ReturnCode rcv_imp_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid);
-fapi::ReturnCode delay_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid,
- uint32_t *o_left_margin, uint32_t *o_right_margin,
- uint32_t i_shmoo_param);
+ fapi::ReturnCode delay_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid,
+ uint32_t *o_left_margin, uint32_t *o_right_margin,
+ uint32_t i_shmoo_param);
+ fapi::ReturnCode delay_shmoo_ddr4(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid,
+ uint32_t *o_left_margin, uint32_t *o_right_margin,
+ uint32_t i_shmoo_param,uint32_t pda_nibble_table[2][2][16][2]);
+
+ fapi::ReturnCode delay_shmoo_ddr4_pda(const fapi::Target & i_target_mba, uint8_t i_port,
+ shmoo_type_t i_shmoo_type_valid,
+ uint32_t *o_left_margin, uint32_t *o_right_margin,
+ uint32_t i_shmoo_param,uint32_t pda_nibble_table[2][2][16][2]);
-void find_best_margin(shmoo_param i_shmoo_param_valid,uint32_t i_left[],
- uint32_t i_right[], const uint8_t l_max,
- uint32_t i_param_nom, uint8_t& o_index);
+ void find_best_margin(shmoo_param i_shmoo_param_valid,uint32_t i_left[],
+ uint32_t i_right[], const uint8_t l_max,
+ uint32_t i_param_nom, uint8_t& o_index);
-fapi::ReturnCode set_attribute(const fapi::Target & i_target_mba);
+ fapi::ReturnCode set_attribute(const fapi::Target & i_target_mba);
-fapi::ReturnCode reset_attribute(const fapi::Target & i_target_mba);
+ fapi::ReturnCode reset_attribute(const fapi::Target & i_target_mba);
-//-----------------------------------------------------------------------------------
-//Function name: mss_draminit_training_advanced()
-//Description: This function varies driver impedance, receiver impedance, slew, wr & rd vref
-//based on attribute definition and runs either mcbist/delay shmoo based on attribute
-//Also calls unmask function mss_unmask_draminit_training_advanced_errors()
-//Input : const fapi::Target MBA, i_pattern = pattern selection during mcbist @ lab,
-// l_test type = test type selection during mcbist @ lab
-// Default vlaues are Zero
-//-----------------------------------------------------------------------------------
+ //-----------------------------------------------------------------------------------
+ //Function name: mss_draminit_training_advanced()
+ //Description: This function varies driver impedance, receiver impedance, slew, wr & rd vref
+ //based on attribute definition and runs either mcbist/delay shmoo based on attribute
+ //Also calls unmask function mss_unmask_draminit_training_advanced_errors()
+ //Input : const fapi::Target MBA, i_pattern = pattern selection during mcbist @ lab,
+ // l_test type = test type selection during mcbist @ lab
+ // Default vlaues are Zero
+ //-----------------------------------------------------------------------------------
-fapi::ReturnCode mss_draminit_training_advanced(const fapi::Target & i_target_mba)
-{
- // const fapi::Target is centaur.mba
- fapi::ReturnCode rc;
- //FAPI_INF(" pattern bit is %d and test_type_bit is %d");
- rc = mss_draminit_training_advanced_cloned(i_target_mba);
- if (rc)
- {
- FAPI_ERR("Advanced DRAM Init training procedure is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
- }
-
- // If mss_unmask_draminit_training_advanced_errors gets it's own bad rc,
- // it will commit the passed in rc (if non-zero), and return it's own bad rc.
- // Else if mss_unmask_draminit_training_advanced_errors runs clean,
- // it will just return the passed in rc.
-
- rc = mss_unmask_draminit_training_advanced_errors(i_target_mba, rc);
- if (rc)
- {
- FAPI_ERR("Unmask Function is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
- return rc;
- }
- return rc;
- }
+ fapi::ReturnCode mss_draminit_training_advanced(const fapi::Target & i_target_mba)
+ {
+ // const fapi::Target is centaur.mba
+ fapi::ReturnCode rc;
+ //FAPI_INF(" pattern bit is %d and test_type_bit is %d");
+ rc = mss_draminit_training_advanced_cloned(i_target_mba);
+ if (rc)
+ {
+ FAPI_ERR("Advanced DRAM Init training procedure is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ }
+
+ // If mss_unmask_draminit_training_advanced_errors gets it's own bad rc,
+ // it will commit the passed in rc (if non-zero), and return it's own bad rc.
+ // Else if mss_unmask_draminit_training_advanced_errors runs clean,
+ // it will just return the passed in rc.
+
+ rc = mss_unmask_draminit_training_advanced_errors(i_target_mba, rc);
+ if (rc)
+ {
+ FAPI_ERR("Unmask Function is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ return rc;
+ }
}
//end of extern C
@@ -209,140 +229,184 @@ fapi::ReturnCode mss_draminit_training_advanced(const fapi::Target & i_target_mb
//-----------------------------------------------------------------------------------
fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_target_mba)
{
- //const fapi::Target is centaur.mba
- fapi::ReturnCode rc;
+ //const fapi::Target is centaur.mba
+ fapi::ReturnCode rc;
- FAPI_INF("+++++++ Executing mss_draminit_training_advanced +++++++");
+ FAPI_INF("+++++++ Executing mss_draminit_training_advanced +++++++");
+
+ // Define attribute variables
+ uint32_t l_attr_mss_freq_u32 = 0;
+ uint32_t l_attr_mss_volt_u32 = 0;
+ uint8_t l_num_drops_per_port_u8 = 2;
+ uint8_t l_num_ranks_per_dimm_u8array[MAX_PORT][MAX_DIMM] = {{0}};
+ uint8_t l_port = 0;
+ uint32_t l_left_margin=0;
+ uint32_t l_right_margin=0;
+ uint32_t l_shmoo_param=0;
+ uint8_t l_dram_type=0;
+ uint8_t bin_pda=0;
+ // Define local variables
+ uint8_t l_shmoo_type_valid_t=0;
+ uint8_t l_shmoo_param_valid_t=0;
+ enum dram_type { EMPTY = 0, DDR3 = 1, DDR4 = 2};
+ //const fapi::Target is centaur
+ fapi::Target l_target_centaur;
+ rc = fapiGetParentChip(i_target_mba, l_target_centaur);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32);
+ if(rc) return rc;
- // Define attribute variables
- uint32_t l_attr_mss_freq_u32 = 0;
- uint32_t l_attr_mss_volt_u32 = 0;
- uint8_t l_num_drops_per_port_u8 = 2;
- uint8_t l_num_ranks_per_dimm_u8array[MAX_PORT][MAX_DIMM] = {{0}};
- uint8_t l_port = 0;
- uint32_t l_left_margin=0;
- uint32_t l_right_margin=0;
- uint32_t l_shmoo_param=0;
-
- // Define local variables
- uint8_t l_shmoo_type_valid_t=0;
- uint8_t l_shmoo_param_valid_t=0;
-
- //const fapi::Target is centaur
- fapi::Target l_target_centaur;
- rc = fapiGetParentChip(i_target_mba, l_target_centaur);
- if(rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32);
- if(rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32);
- if(rc) return rc;
-
- //const fapi::Target is centaur.mba
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target_mba, l_num_drops_per_port_u8);
- if(rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, l_num_ranks_per_dimm_u8array);
- if(rc) return rc;
-
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
- FAPI_INF("freq = %d on %s.", l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
- FAPI_INF("volt = %d on %s.", l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
- FAPI_INF("num_drops_per_port = %d on %s.", l_num_drops_per_port_u8, i_target_mba.toEcmdString());
- FAPI_INF("num_ranks_per_dimm = [%02d][%02d][%02d][%02d]",
- l_num_ranks_per_dimm_u8array[0][0],
- l_num_ranks_per_dimm_u8array[0][1],
- l_num_ranks_per_dimm_u8array[1][0],
- l_num_ranks_per_dimm_u8array[1][1]);
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-
- rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_shmoo_type_valid_t);
- if(rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_PARAM_VALID, &i_target_mba, l_shmoo_param_valid_t);
- if(rc) return rc;
-
- shmoo_type_t l_shmoo_type_valid;
- shmoo_param l_shmoo_param_valid;
-
- l_shmoo_type_valid=(shmoo_type_t)l_shmoo_type_valid_t;
- l_shmoo_param_valid=(shmoo_param)l_shmoo_param_valid_t;
- FAPI_INF("+++++++++++++++++++++++++ Read Schmoo Attributes ++++++++++++++++++++++++++");
- FAPI_INF("Schmoo param valid = 0x%x on %s", l_shmoo_param_valid, i_target_mba.toEcmdString());
- FAPI_INF("Schmoo test valid = 0x%x on %s", l_shmoo_type_valid, i_target_mba.toEcmdString());
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
- //Check for Shmoo Parameter, if anyof them is enabled then go into the loop else the procedure exit
-
- if ((l_num_ranks_per_dimm_u8array[0][0] > 0) ||
- (l_num_ranks_per_dimm_u8array[0][1] > 0) ||
- (l_num_ranks_per_dimm_u8array[1][0] > 0) ||
- (l_num_ranks_per_dimm_u8array[1][1] > 0))
- {
- if ((l_shmoo_param_valid != PARAM_NONE) ||
- (l_shmoo_type_valid != TEST_NONE))
- {
- if ((l_shmoo_param_valid & DRV_IMP) != 0)
- {
- rc = drv_imped_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
- if (rc)
- {
- FAPI_ERR("Driver Impedance Schmoo function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- if ((l_shmoo_param_valid & SLEW_RATE) != 0)
- {
- rc = slew_rate_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
- if (rc)
- {
- FAPI_ERR("Slew Rate Schmoo Function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- if ((l_shmoo_param_valid & WR_VREF) != 0)
- {
- rc = wr_vref_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
- if (rc)
- {
- FAPI_ERR("Write Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- if ((l_shmoo_param_valid & RD_VREF) != 0)
- {
- rc = rd_vref_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
- if (rc)
- {
- FAPI_ERR("Read Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- if ((l_shmoo_param_valid & RCV_IMP) != 0)
- {
- rc = rcv_imp_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
- if (rc)
- {
- FAPI_ERR("Receiver Impedance Schmoo Function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- if (((l_shmoo_param_valid == PARAM_NONE)))
- {
- rc = delay_shmoo(i_target_mba, l_port, l_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_shmoo_param);
- if (rc)
- {
- FAPI_ERR("Delay Schmoo Function is Failed rc = 0x%08X (creator = %d)",
- uint32_t(rc), rc.getCreator());
- return rc;
- }
- }
- }
- }
- return rc;
+ //const fapi::Target is centaur.mba
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target_mba, l_num_drops_per_port_u8);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, l_num_ranks_per_dimm_u8array);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target_mba, l_dram_type);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MCBIST_USER_BANK, &i_target_mba, bin_pda);
+ if(rc) return rc;
+
+
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ FAPI_INF("freq = %d on %s.", l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("volt = %d on %s.", l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("num_drops_per_port = %d on %s.", l_num_drops_per_port_u8, i_target_mba.toEcmdString());
+ FAPI_INF("num_ranks_per_dimm = [%02d][%02d][%02d][%02d]",
+ l_num_ranks_per_dimm_u8array[0][0],
+ l_num_ranks_per_dimm_u8array[0][1],
+ l_num_ranks_per_dimm_u8array[1][0],
+ l_num_ranks_per_dimm_u8array[1][1]);
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_shmoo_type_valid_t);
+ if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_PARAM_VALID, &i_target_mba, l_shmoo_param_valid_t);
+ if(rc) return rc;
+
+ shmoo_type_t l_shmoo_type_valid;
+ shmoo_param l_shmoo_param_valid;
+
+ l_shmoo_type_valid=(shmoo_type_t)l_shmoo_type_valid_t;
+ l_shmoo_param_valid=(shmoo_param)l_shmoo_param_valid_t;
+ FAPI_INF("+++++++++++++++++++++++++ Read Schmoo Attributes ++++++++++++++++++++++++++");
+ FAPI_INF("Schmoo param valid = 0x%x on %s", l_shmoo_param_valid, i_target_mba.toEcmdString());
+ FAPI_INF("Schmoo test valid = 0x%x on %s", l_shmoo_type_valid, i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ //Check for Shmoo Parameter, if anyof them is enabled then go into the loop else the procedure exit
+
+ if ((l_num_ranks_per_dimm_u8array[0][0] > 0) ||
+ (l_num_ranks_per_dimm_u8array[0][1] > 0) ||
+ (l_num_ranks_per_dimm_u8array[1][0] > 0) ||
+ (l_num_ranks_per_dimm_u8array[1][1] > 0))
+ {
+ if ((l_shmoo_param_valid != PARAM_NONE) ||
+ (l_shmoo_type_valid != TEST_NONE))
+ {
+ if ((l_shmoo_param_valid & DRV_IMP) != 0)
+ {
+ rc = drv_imped_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
+ if (rc)
+ {
+ FAPI_ERR("Driver Impedance Schmoo function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ if ((l_shmoo_param_valid & SLEW_RATE) != 0)
+ {
+ rc = slew_rate_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
+ if (rc)
+ {
+ FAPI_ERR("Slew Rate Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ if ((l_shmoo_param_valid & WR_VREF) != 0)
+ {
+ if(l_dram_type==DDR3){
+ rc = wr_vref_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
+ if (rc)
+ {
+ FAPI_ERR("Write Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ else{
+ if(bin_pda == 1)
+ {
+ FAPI_INF("************* Bin - PDA - Vref_Schmoo **************");
+
+ rc = wr_vref_shmoo_ddr4_bin(i_target_mba);
+ if (rc)
+ {
+ FAPI_ERR("Write Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ else
+ {
+ rc = wr_vref_shmoo_ddr4(i_target_mba);
+ if (rc)
+ {
+ FAPI_ERR("Write Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ }
+ }
+ if ((l_shmoo_param_valid & RD_VREF) != 0)
+ {
+ if(l_dram_type==DDR3){
+ rc = rd_vref_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
+ if (rc)
+ {
+ FAPI_ERR("Read Vref Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ else
+ {
+ rc = rd_vref_shmoo_ddr4(i_target_mba);
+ if (rc)
+ {
+ FAPI_ERR("rd_vref_shmoo_ddr4 Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ }
+ if ((l_shmoo_param_valid & RCV_IMP) != 0)
+ {
+ rc = rcv_imp_shmoo(i_target_mba, l_port, l_shmoo_type_valid);
+ if (rc)
+ {
+ FAPI_ERR("Receiver Impedance Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ if (((l_shmoo_param_valid == PARAM_NONE)))
+ {
+ rc = delay_shmoo(i_target_mba, l_port, l_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_shmoo_param);
+ if (rc)
+ {
+ FAPI_ERR("Delay Schmoo Function is Failed rc = 0x%08X (creator = %d)",
+ uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+ }
+ }
+ }
+ return rc;
}
//-------------------------------------------------------------------------------
@@ -358,137 +422,137 @@ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_ta
//-------------------------------------------------------------------------------
fapi::ReturnCode drv_imped_shmoo(const fapi::Target & i_target_mba,
- uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid)
+uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid)
{
- fapi::ReturnCode rc;
- uint8_t l_drv_imp_dq_dqs[MAX_PORT] = {0};
- uint8_t l_drv_imp_dq_dqs_nom[MAX_PORT] = {0};
- //uint8_t l_drv_imp_dq_dqs_new[MAX_PORT] = {0};
- uint8_t index=0;
- uint8_t l_slew_rate_dq_dqs[MAX_PORT] = {0};
- uint8_t l_slew_rate_dq_dqs_schmoo[MAX_PORT] = {0};
- uint32_t l_drv_imp_dq_dqs_schmoo[MAX_PORT] = {0};
- uint8_t l_drv_imp_dq_dqs_nom_fc = 0;
- uint8_t l_drv_imp_dq_dqs_in = 0;
- //Temporary
- i_shmoo_type_valid = WR_EYE; //Hard coded, since no other schmoo is applicable for this parameter
- uint32_t l_left_margin_drv_imp_array[MAX_DRV_IMP] = {0};
- uint32_t l_right_margin_drv_imp_array[MAX_DRV_IMP] = {0};
- uint32_t l_left_margin = 0;
- uint32_t l_right_margin = 0;
- uint8_t count = 0;
- uint8_t shmoo_param_count = 0;
- uint8_t l_slew_type = 0; // Hard coded since this procedure will touch only DQ_DQS and not address
-
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, l_drv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba, l_slew_rate_dq_dqs);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_drv_imp_dq_dqs_schmoo);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO, &i_target_mba, l_slew_rate_dq_dqs_schmoo);
- if (rc) return rc;
+ fapi::ReturnCode rc;
+ uint8_t l_drv_imp_dq_dqs[MAX_PORT] = {0};
+ uint8_t l_drv_imp_dq_dqs_nom[MAX_PORT] = {0};
+ //uint8_t l_drv_imp_dq_dqs_new[MAX_PORT] = {0};
+ uint8_t index=0;
+ uint8_t l_slew_rate_dq_dqs[MAX_PORT] = {0};
+ uint8_t l_slew_rate_dq_dqs_schmoo[MAX_PORT] = {0};
+ uint32_t l_drv_imp_dq_dqs_schmoo[MAX_PORT] = {0};
+ uint8_t l_drv_imp_dq_dqs_nom_fc = 0;
+ uint8_t l_drv_imp_dq_dqs_in = 0;
+ //Temporary
+ i_shmoo_type_valid = WR_EYE; //Hard coded, since no other schmoo is applicable for this parameter
+ uint32_t l_left_margin_drv_imp_array[MAX_DRV_IMP] = {0};
+ uint32_t l_right_margin_drv_imp_array[MAX_DRV_IMP] = {0};
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint8_t count = 0;
+ uint8_t shmoo_param_count = 0;
+ uint8_t l_slew_type = 0; // Hard coded since this procedure will touch only DQ_DQS and not address
- FAPI_INF("+++++++++++++++++Read DRIVER IMP Attributes values++++++++++++++++");
- FAPI_INF("CEN_DRV_IMP_DQ_DQS[%d] = [%02d] Ohms, on %s",
- i_port,
- l_drv_imp_dq_dqs_nom[i_port],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_DRV_IMP_DQ_DQS_SCHMOO[0] = [0x%x], CEN_DRV_IMP_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
- l_drv_imp_dq_dqs_schmoo[0],
- l_drv_imp_dq_dqs_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_SLEW_RATE_DQ_DQS[0] = [%02d]V/ns , CEN_SLEW_RATE_DQ_DQS[1] = [%02d]V/ns on %s",
- l_slew_rate_dq_dqs[0],
- l_slew_rate_dq_dqs[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_SLEW_RATE_DQ_DQS_SCHMOO[0] = [0x%x], CEN_SLEW_RATE_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
- l_slew_rate_dq_dqs_schmoo[0],
- l_slew_rate_dq_dqs_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-
- if(l_drv_imp_dq_dqs_schmoo[i_port] == 0) //Check for any of the bits enabled in the shmoo
- {
- FAPI_INF("DRIVER IMP Shmoo set to FAST Mode and won't do anything");
- }
- else
- {
- for (index = 0; index < MAX_DRV_IMP; index += 1)
- {
- if (l_drv_imp_dq_dqs_schmoo[i_port] & MASK)
- {
- l_drv_imp_dq_dqs[i_port] = drv_imp_array[index];
- FAPI_INF("Current Driver Impedance Value = %d Ohms",
- drv_imp_array[index]);
- FAPI_INF("Configuring Driver Impedance Registers:");
- rc = config_drv_imp(i_target_mba, i_port,
- l_drv_imp_dq_dqs[i_port]);
- if (rc) return rc;
- l_drv_imp_dq_dqs_in = l_drv_imp_dq_dqs[i_port];
- FAPI_INF("Configuring Slew Rate Registers:");
- rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
- l_drv_imp_dq_dqs[i_port],
- l_slew_rate_dq_dqs[i_port]);
- if (rc) return rc;
- FAPI_INF("Calling Shmoo for finding Timing Margin:");
- if (shmoo_param_count)
- {
- rc = set_attribute(i_target_mba);
- if (rc) return rc;
- }
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_drv_imp_dq_dqs_in);
- if (rc) return rc;
- l_left_margin_drv_imp_array[index] = l_left_margin;
- l_right_margin_drv_imp_array[index] = l_right_margin;
- shmoo_param_count++;
- }
- else
- {
- l_left_margin_drv_imp_array[index] = 0;
- l_right_margin_drv_imp_array[index] = 0;
- }
- l_drv_imp_dq_dqs_schmoo[i_port] = (l_drv_imp_dq_dqs_schmoo[i_port] >> 1);
- }
- l_drv_imp_dq_dqs_nom_fc = l_drv_imp_dq_dqs_nom[i_port];
- find_best_margin(DRV_IMP, l_left_margin_drv_imp_array,
- l_right_margin_drv_imp_array, MAX_DRV_IMP,
- l_drv_imp_dq_dqs_nom_fc, count);
-
- if (count >= MAX_DRV_IMP)
- {
- FAPI_ERR("Driver Imp new input(%d) out of bounds, (>= %d)", count,
- MAX_DRV_IMP);
- const uint8_t & COUNT_DATA = count;
- FAPI_SET_HWP_ERROR(rc, RC_DRV_IMPED_SHMOO_INVALID_MARGIN_DATA);
- return rc;
- }
- else
- {
- FAPI_INF("Restoring the nominal values!");
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba,
- l_drv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = config_drv_imp(i_target_mba, i_port,
- l_drv_imp_dq_dqs_nom[i_port]);
- if (rc) return rc;
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba,
- l_slew_rate_dq_dqs);
- if (rc) return rc;
- rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
- l_drv_imp_dq_dqs_nom[i_port],
- l_slew_rate_dq_dqs[i_port]);
- if (rc) return rc;
- }
- FAPI_INF("Restoring mcbist setup attribute...");
- rc = reset_attribute(i_target_mba);
- if (rc) return rc;
- FAPI_INF("++++ Driver impedance shmoo function executed successfully ++++");
- }
- return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, l_drv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba, l_slew_rate_dq_dqs);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_drv_imp_dq_dqs_schmoo);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO, &i_target_mba, l_slew_rate_dq_dqs_schmoo);
+ if (rc) return rc;
+
+ FAPI_INF("+++++++++++++++++Read DRIVER IMP Attributes values++++++++++++++++");
+ FAPI_INF("CEN_DRV_IMP_DQ_DQS[%d] = [%02d] Ohms, on %s",
+ i_port,
+ l_drv_imp_dq_dqs_nom[i_port],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_DRV_IMP_DQ_DQS_SCHMOO[0] = [0x%x], CEN_DRV_IMP_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
+ l_drv_imp_dq_dqs_schmoo[0],
+ l_drv_imp_dq_dqs_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_SLEW_RATE_DQ_DQS[0] = [%02d]V/ns , CEN_SLEW_RATE_DQ_DQS[1] = [%02d]V/ns on %s",
+ l_slew_rate_dq_dqs[0],
+ l_slew_rate_dq_dqs[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_SLEW_RATE_DQ_DQS_SCHMOO[0] = [0x%x], CEN_SLEW_RATE_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
+ l_slew_rate_dq_dqs_schmoo[0],
+ l_slew_rate_dq_dqs_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ if(l_drv_imp_dq_dqs_schmoo[i_port] == 0) //Check for any of the bits enabled in the shmoo
+ {
+ FAPI_INF("DRIVER IMP Shmoo set to FAST Mode and won't do anything");
+ }
+ else
+ {
+ for (index = 0; index < MAX_DRV_IMP; index += 1)
+ {
+ if (l_drv_imp_dq_dqs_schmoo[i_port] & MASK)
+ {
+ l_drv_imp_dq_dqs[i_port] = drv_imp_array[index];
+ FAPI_INF("Current Driver Impedance Value = %d Ohms",
+ drv_imp_array[index]);
+ FAPI_INF("Configuring Driver Impedance Registers:");
+ rc = config_drv_imp(i_target_mba, i_port,
+ l_drv_imp_dq_dqs[i_port]);
+ if (rc) return rc;
+ l_drv_imp_dq_dqs_in = l_drv_imp_dq_dqs[i_port];
+ FAPI_INF("Configuring Slew Rate Registers:");
+ rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
+ l_drv_imp_dq_dqs[i_port],
+ l_slew_rate_dq_dqs[i_port]);
+ if (rc) return rc;
+ FAPI_INF("Calling Shmoo for finding Timing Margin:");
+ if (shmoo_param_count)
+ {
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+ }
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_drv_imp_dq_dqs_in);
+ if (rc) return rc;
+ l_left_margin_drv_imp_array[index] = l_left_margin;
+ l_right_margin_drv_imp_array[index] = l_right_margin;
+ shmoo_param_count++;
+ }
+ else
+ {
+ l_left_margin_drv_imp_array[index] = 0;
+ l_right_margin_drv_imp_array[index] = 0;
+ }
+ l_drv_imp_dq_dqs_schmoo[i_port] = (l_drv_imp_dq_dqs_schmoo[i_port] >> 1);
+ }
+ l_drv_imp_dq_dqs_nom_fc = l_drv_imp_dq_dqs_nom[i_port];
+ find_best_margin(DRV_IMP, l_left_margin_drv_imp_array,
+ l_right_margin_drv_imp_array, MAX_DRV_IMP,
+ l_drv_imp_dq_dqs_nom_fc, count);
+
+ if (count >= MAX_DRV_IMP)
+ {
+ FAPI_ERR("Driver Imp new input(%d) out of bounds, (>= %d)", count,
+ MAX_DRV_IMP);
+ const uint8_t & COUNT_DATA = count;
+ FAPI_SET_HWP_ERROR(rc, RC_DRV_IMPED_SHMOO_INVALID_MARGIN_DATA);
+ return rc;
+ }
+ else
+ {
+ FAPI_INF("Restoring the nominal values!");
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba,
+ l_drv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = config_drv_imp(i_target_mba, i_port,
+ l_drv_imp_dq_dqs_nom[i_port]);
+ if (rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba,
+ l_slew_rate_dq_dqs);
+ if (rc) return rc;
+ rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
+ l_drv_imp_dq_dqs_nom[i_port],
+ l_slew_rate_dq_dqs[i_port]);
+ if (rc) return rc;
+ }
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);
+ if (rc) return rc;
+ FAPI_INF("++++ Driver impedance shmoo function executed successfully ++++");
+ }
+ return rc;
}
//-----------------------------------------------------------------------------------------
@@ -504,126 +568,126 @@ fapi::ReturnCode drv_imped_shmoo(const fapi::Target & i_target_mba,
//-----------------------------------------------------------------------------------------
fapi::ReturnCode slew_rate_shmoo(const fapi::Target & i_target_mba,
- uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid)
+uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid)
{
- fapi::ReturnCode rc;
- uint8_t l_slew_rate_dq_dqs[MAX_PORT] = {0};
- uint8_t l_slew_rate_dq_dqs_nom[MAX_PORT] = {0};
- uint8_t l_slew_rate_dq_dqs_nom_fc = 0;
- uint8_t l_slew_rate_dq_dqs_in = 0;
- uint32_t l_slew_rate_dq_dqs_schmoo[MAX_PORT] = {0};
- uint8_t l_drv_imp_dq_dqs_nom[MAX_PORT] = {0};
- i_shmoo_type_valid = WR_EYE; // Hard coded - Other shmoo type is not valid - Temporary
-
- uint8_t index = 0;
- uint8_t count = 0;
- uint8_t shmoo_param_count = 0;
- uint32_t l_left_margin_slew_array[MAX_NUM_SLEW_RATES] = {0};
- uint32_t l_right_margin_slew_array[MAX_NUM_SLEW_RATES] = {0};
- uint32_t l_left_margin = 0;
- uint32_t l_right_margin = 0;
- uint8_t l_slew_type = 0; // Hard coded since this procedure will touch only DQ_DQS and not address
-
- //Read Attributes - DRV IMP, SLEW, SLEW RATES values to be Schmoo'ed
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, l_drv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba, l_slew_rate_dq_dqs_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_slew_rate_dq_dqs_schmoo);
- if (rc) return rc;
+ fapi::ReturnCode rc;
+ uint8_t l_slew_rate_dq_dqs[MAX_PORT] = {0};
+ uint8_t l_slew_rate_dq_dqs_nom[MAX_PORT] = {0};
+ uint8_t l_slew_rate_dq_dqs_nom_fc = 0;
+ uint8_t l_slew_rate_dq_dqs_in = 0;
+ uint32_t l_slew_rate_dq_dqs_schmoo[MAX_PORT] = {0};
+ uint8_t l_drv_imp_dq_dqs_nom[MAX_PORT] = {0};
+ i_shmoo_type_valid = WR_EYE; // Hard coded - Other shmoo type is not valid - Temporary
+
+ uint8_t index = 0;
+ uint8_t count = 0;
+ uint8_t shmoo_param_count = 0;
+ uint32_t l_left_margin_slew_array[MAX_NUM_SLEW_RATES] = {0};
+ uint32_t l_right_margin_slew_array[MAX_NUM_SLEW_RATES] = {0};
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint8_t l_slew_type = 0; // Hard coded since this procedure will touch only DQ_DQS and not address
+
+ //Read Attributes - DRV IMP, SLEW, SLEW RATES values to be Schmoo'ed
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, l_drv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba, l_slew_rate_dq_dqs_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_slew_rate_dq_dqs_schmoo);
+ if (rc) return rc;
- FAPI_INF("+++++++++++++++++Read Slew Shmoo Attributes values+++++++++++++++");
- FAPI_INF("CEN_DRV_IMP_DQ_DQS[0] = [%02d] Ohms, CEN_DRV_IMP_DQ_DQS[1] = [%02d] Ohms on %s",
- l_drv_imp_dq_dqs_nom[0],
- l_drv_imp_dq_dqs_nom[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_SLEW_RATE_DQ_DQS[0] = [%02d]V/ns , CEN_SLEW_RATE_DQ_DQS[1] = [%02d]V/ns on %s",
- l_slew_rate_dq_dqs_nom[0],
- l_slew_rate_dq_dqs_nom[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_SLEW_RATE_DQ_DQS_SCHMOO[0] = [0x%x], CEN_SLEW_RATE_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
- l_slew_rate_dq_dqs_schmoo[0],
- l_slew_rate_dq_dqs_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-
- if(l_slew_rate_dq_dqs_schmoo == 0) //Check for any of the bits enabled in the shmoo
- {
- FAPI_INF("Slew Rate Shmoo set to FAST Mode and won't do anything");
- }
- else
- {
- for (index = 0; index < MAX_NUM_SLEW_RATES; index += 1)
- {
- if (l_slew_rate_dq_dqs_schmoo[i_port] & MASK)
- {
- l_slew_rate_dq_dqs[i_port] = slew_rate_array[index];
- FAPI_INF("Current Slew rate value is %d V/ns",
- slew_rate_array[index]);
- FAPI_INF("Configuring Slew registers:");
- rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
- l_drv_imp_dq_dqs_nom[i_port],
- l_slew_rate_dq_dqs[i_port]);
- if (rc) return rc;
- l_slew_rate_dq_dqs_in = l_slew_rate_dq_dqs[i_port];
- FAPI_INF("Calling Shmoo for finding Timing Margin:");
- if (shmoo_param_count)
- {
- rc = set_attribute(i_target_mba);
- if (rc) return rc;
- }
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_slew_rate_dq_dqs_in);
- if (rc) return rc;
- l_left_margin_slew_array[index] = l_left_margin;
- l_right_margin_slew_array[index] = l_right_margin;
- shmoo_param_count++;
- }
- else
- {
- l_left_margin_slew_array[index] = 0;
- l_right_margin_slew_array[index] = 0;
- }
- l_slew_rate_dq_dqs_schmoo[i_port]
- = (l_slew_rate_dq_dqs_schmoo[i_port] >> 1);
- }
- l_slew_rate_dq_dqs_nom_fc = l_slew_rate_dq_dqs_nom[i_port];
- find_best_margin(SLEW_RATE, l_left_margin_slew_array,
- l_right_margin_slew_array, MAX_NUM_SLEW_RATES,
- l_slew_rate_dq_dqs_nom_fc, count);
- if (count >= MAX_NUM_SLEW_RATES)
- {
- FAPI_ERR("Driver Imp new input(%d) out of bounds, (>= %d)", count,
- MAX_NUM_SLEW_RATES);
- const uint8_t & COUNT_DATA = count;
- FAPI_SET_HWP_ERROR(rc, RC_SLEW_RATE_SHMOO_INVALID_MARGIN_DATA);
- return rc;
- }
- else
- {
- FAPI_INF("Restoring the nominal values!");
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba,
- l_drv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = config_drv_imp(i_target_mba, i_port,
- l_drv_imp_dq_dqs_nom[i_port]);
- if (rc) return rc;
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba,
- l_slew_rate_dq_dqs_nom);
- if (rc) return rc;
- rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
- l_drv_imp_dq_dqs_nom[i_port],
- l_slew_rate_dq_dqs_nom[i_port]);
- if (rc) return rc;
- }
- FAPI_INF("Restoring mcbist setup attribute...");
- rc = reset_attribute(i_target_mba);
- if (rc) return rc;
- FAPI_INF("++++ Slew Rate shmoo function executed successfully ++++");
- }
- return rc;
+ FAPI_INF("+++++++++++++++++Read Slew Shmoo Attributes values+++++++++++++++");
+ FAPI_INF("CEN_DRV_IMP_DQ_DQS[0] = [%02d] Ohms, CEN_DRV_IMP_DQ_DQS[1] = [%02d] Ohms on %s",
+ l_drv_imp_dq_dqs_nom[0],
+ l_drv_imp_dq_dqs_nom[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_SLEW_RATE_DQ_DQS[0] = [%02d]V/ns , CEN_SLEW_RATE_DQ_DQS[1] = [%02d]V/ns on %s",
+ l_slew_rate_dq_dqs_nom[0],
+ l_slew_rate_dq_dqs_nom[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_SLEW_RATE_DQ_DQS_SCHMOO[0] = [0x%x], CEN_SLEW_RATE_DQ_DQS_SCHMOO[1] = [0x%x] on %s",
+ l_slew_rate_dq_dqs_schmoo[0],
+ l_slew_rate_dq_dqs_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ if(l_slew_rate_dq_dqs_schmoo == 0) //Check for any of the bits enabled in the shmoo
+ {
+ FAPI_INF("Slew Rate Shmoo set to FAST Mode and won't do anything");
+ }
+ else
+ {
+ for (index = 0; index < MAX_NUM_SLEW_RATES; index += 1)
+ {
+ if (l_slew_rate_dq_dqs_schmoo[i_port] & MASK)
+ {
+ l_slew_rate_dq_dqs[i_port] = slew_rate_array[index];
+ FAPI_INF("Current Slew rate value is %d V/ns",
+ slew_rate_array[index]);
+ FAPI_INF("Configuring Slew registers:");
+ rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
+ l_drv_imp_dq_dqs_nom[i_port],
+ l_slew_rate_dq_dqs[i_port]);
+ if (rc) return rc;
+ l_slew_rate_dq_dqs_in = l_slew_rate_dq_dqs[i_port];
+ FAPI_INF("Calling Shmoo for finding Timing Margin:");
+ if (shmoo_param_count)
+ {
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+ }
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_slew_rate_dq_dqs_in);
+ if (rc) return rc;
+ l_left_margin_slew_array[index] = l_left_margin;
+ l_right_margin_slew_array[index] = l_right_margin;
+ shmoo_param_count++;
+ }
+ else
+ {
+ l_left_margin_slew_array[index] = 0;
+ l_right_margin_slew_array[index] = 0;
+ }
+ l_slew_rate_dq_dqs_schmoo[i_port]
+ = (l_slew_rate_dq_dqs_schmoo[i_port] >> 1);
+ }
+ l_slew_rate_dq_dqs_nom_fc = l_slew_rate_dq_dqs_nom[i_port];
+ find_best_margin(SLEW_RATE, l_left_margin_slew_array,
+ l_right_margin_slew_array, MAX_NUM_SLEW_RATES,
+ l_slew_rate_dq_dqs_nom_fc, count);
+ if (count >= MAX_NUM_SLEW_RATES)
+ {
+ FAPI_ERR("Driver Imp new input(%d) out of bounds, (>= %d)", count,
+ MAX_NUM_SLEW_RATES);
+ const uint8_t & COUNT_DATA = count;
+ FAPI_SET_HWP_ERROR(rc, RC_SLEW_RATE_SHMOO_INVALID_MARGIN_DATA);
+ return rc;
+ }
+ else
+ {
+ FAPI_INF("Restoring the nominal values!");
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba,
+ l_drv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = config_drv_imp(i_target_mba, i_port,
+ l_drv_imp_dq_dqs_nom[i_port]);
+ if (rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, &i_target_mba,
+ l_slew_rate_dq_dqs_nom);
+ if (rc) return rc;
+ rc = config_slew_rate(i_target_mba, i_port, l_slew_type,
+ l_drv_imp_dq_dqs_nom[i_port],
+ l_slew_rate_dq_dqs_nom[i_port]);
+ if (rc) return rc;
+ }
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);
+ if (rc) return rc;
+ FAPI_INF("++++ Slew Rate shmoo function executed successfully ++++");
+ }
+ return rc;
}
//----------------------------------------------------------------------------------------------
@@ -639,124 +703,650 @@ fapi::ReturnCode slew_rate_shmoo(const fapi::Target & i_target_mba,
//----------------------------------------------------------------------------------------------
fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba,
- uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid)
+uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid)
{
- fapi::ReturnCode rc;
- uint32_t l_wr_dram_vref[MAX_PORT] = {0};
- uint32_t l_wr_dram_vref_nom[MAX_PORT] = {0};
- uint32_t l_wr_dram_vref_schmoo[MAX_PORT] = {0};
- uint32_t l_wr_dram_vref_nom_fc = 0;
- uint32_t l_wr_dram_vref_in = 0;
- i_shmoo_type_valid = MCBIST;
-
- uint8_t index = 0;
- uint8_t count = 0;
- //uint8_t shmoo_param_count = 0;
- uint32_t l_left_margin = 0;
- uint32_t l_right_margin = 0;
- uint32_t l_left_margin_wr_vref_array[MAX_WR_VREF]= {0};
- uint32_t l_right_margin_wr_vref_array[MAX_WR_VREF]= {0};
-
- //Read the write vref attributes
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF, &i_target_mba, l_wr_dram_vref_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF_SCHMOO, &i_target_mba, l_wr_dram_vref_schmoo);
- if (rc) return rc;
+ fapi::ReturnCode rc;
+ uint32_t l_wr_dram_vref[MAX_PORT] = {0};
+ uint32_t l_wr_dram_vref_nom[MAX_PORT] = {0};
+ uint32_t l_wr_dram_vref_schmoo[MAX_PORT] = {0};
+ uint32_t l_wr_dram_vref_nom_fc = 0;
+ uint32_t l_wr_dram_vref_in = 0;
+ i_shmoo_type_valid = MCBIST;
+
+ uint8_t index = 0;
+ uint8_t count = 0;
+ //uint8_t shmoo_param_count = 0;
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint32_t l_left_margin_wr_vref_array[MAX_WR_VREF]= {0};
+ uint32_t l_right_margin_wr_vref_array[MAX_WR_VREF]= {0};
+
+ //Read the write vref attributes
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF, &i_target_mba, l_wr_dram_vref_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF_SCHMOO, &i_target_mba, l_wr_dram_vref_schmoo);
+ if (rc) return rc;
FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - WR_VREF - Check Sanity only at 500 +++++++++++++++++++++++++++");
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_wr_dram_vref_in);
- if(rc) return rc;
- rc = set_attribute(i_target_mba);
- if (rc) return rc;
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_wr_dram_vref_in);
+ if(rc) return rc;
+ FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing .....");
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+
+
+
+ i_shmoo_type_valid = WR_EYE;
+
+ FAPI_INF("+++++++++++++++++WRITE DRAM VREF Shmoo Attributes Values+++++++++++++++");
+ FAPI_INF("DRAM_WR_VREF[0] = %d , DRAM_WR_VREF[1] = %d on %s",
+ l_wr_dram_vref_nom[0],
+ l_wr_dram_vref_nom[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("DRAM_WR_VREF_SCHMOO[0] = [%x],DRAM_WR_VREF_SCHMOO[1] = [%x] on %s",
+ l_wr_dram_vref_schmoo[0],
+ l_wr_dram_vref_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+
+ if (l_wr_dram_vref_schmoo[i_port] == 0)
+ {
+ FAPI_INF("FAST Shmoo Mode: This function will not change any Write DRAM VREF settings");
+ }
+ else
+ {
+ for (index = 0; index < MAX_WR_VREF; index += 1)
+ {
+ if (l_wr_dram_vref_schmoo[i_port] & MASK)
+ {
+ FAPI_INF("Current Vref multiplier value is %d",
+ wr_vref_array[index]);
+ l_wr_dram_vref[i_port] = wr_vref_array[index];
+ rc = config_wr_dram_vref(i_target_mba, i_port,
+ l_wr_dram_vref[i_port]);
+ if (rc) return rc;
+ l_wr_dram_vref_in = l_wr_dram_vref[i_port];
+ //FAPI_INF(" Calling Shmoo for finding Timing Margin:");
+
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_wr_dram_vref_in);
+ if (rc) return rc;
+ l_left_margin_wr_vref_array[index] = l_left_margin;
+ l_right_margin_wr_vref_array[index] = l_right_margin;
+
+ FAPI_INF("Wr Vref = %d ; Min Setup time = %d; Min Hold time = %d",
+ wr_vref_array[index],
+ l_left_margin_wr_vref_array[index],
+ l_right_margin_wr_vref_array[index]);
+ }
+ else
+ {
+ l_left_margin_wr_vref_array[index] = 0;
+ l_right_margin_wr_vref_array[index] = 0;
+ }
+ l_wr_dram_vref_schmoo[i_port] = (l_wr_dram_vref_schmoo[i_port] >> 1);
+ //FAPI_INF("Wr Vref = %d ; Min Setup time = %d; Min Hold time = %d", wr_vref_array[index],l_left_margin_wr_vref_array[index], l_right_margin_wr_vref_array[index]);
+ //FAPI_INF("Configuring Vref registers_2:, index %d , max value %d, schmoo %x mask %d ", index, MAX_WR_VREF, l_wr_dram_vref_schmoo[i_port], MASK);
+ }
+ l_wr_dram_vref_nom_fc = l_wr_dram_vref_nom[i_port];
+ find_best_margin(WR_VREF, l_left_margin_wr_vref_array,
+ l_right_margin_wr_vref_array, MAX_WR_VREF,
+ l_wr_dram_vref_nom_fc, count);
+ if (count >= MAX_WR_VREF)
+ {
+ FAPI_ERR("Write dram vref input(%d) out of bounds, (>= %d)", count,
+ MAX_WR_VREF);
+ const uint8_t & COUNT_DATA = count;
+ FAPI_SET_HWP_ERROR(rc, RC_WR_VREF_SHMOO_INVALID_MARGIN_DATA);
+ return rc;
+ }
+ else
+ {
+ // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
+ FAPI_INF(" Restoring the nominal values!");
+ rc = FAPI_ATTR_SET(ATTR_EFF_DRAM_WR_VREF, &i_target_mba,
+ l_wr_dram_vref_nom);
+ if (rc) return rc;
+ rc = config_wr_dram_vref(i_target_mba, i_port,
+ l_wr_dram_vref_nom[i_port]);
+ if (rc) return rc;
+ }
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);
+ if (rc) return rc;
+ FAPI_INF("++++ Write DRAM Vref Shmoo function executed successfully ++++");
+ }
+ return rc;
+}
+
+//////////////////////////////////////////////wr_vref schmoo for ddr4 ////////////////////////////////////////////////////////////
+fapi::ReturnCode wr_vref_shmoo_ddr4(const fapi::Target & i_target_mba)
+{
+ fapi::ReturnCode rc;
+ uint8_t max_port = 2;
+ uint8_t max_ddr4_vrefs1 = 52;
+ shmoo_type_t i_shmoo_type_valid = MCBIST; // Hard coded - Temporary
+ ecmdDataBufferBase l_data_buffer_64(64);
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t vrefdq_train_range[2][2][4];
+ uint8_t num_ranks_per_dimm[2][2];
+ uint8_t l_MAX_RANKS[2];
+ uint32_t rc_num = 0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t base_percent = 60;
+
+ float index_mul_print = 0.65;
+ uint8_t l_attr_schmoo_test_type_u8 = 1;
+ float vref_val_print = 0;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target_mba, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, num_ranks_per_dimm); if(rc) return rc;
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target_mba, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ if(vrefdq_train_range[0][0][0] == 1)
+ {
+ base_percent = 45;
+ }
+
+ l_MAX_RANKS[0]=num_ranks_per_dimm[0][0]+num_ranks_per_dimm[0][1];
+ l_MAX_RANKS[1]=num_ranks_per_dimm[1][0]+num_ranks_per_dimm[1][1];
+ FAPI_INF("\n ** l_max_rank 0 = %d",l_MAX_RANKS[0]);
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
+ {
+ l_SCHMOO_NIBBLES=20;
+ }
+ else
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+ FAPI_INF(" +++ l_SCHMOO_NIBBLES = %d +++ ",l_SCHMOO_NIBBLES);
+ ///// ddr4 vref //////
+ fapi::Target l_target_centaur=i_target_mba;
+
+ uint8_t vrefdq_train_value[2][2][4];
+ uint8_t vrefdq_train_enable[2][2][4];
+ //uint32_t best_margin[2][8][20];
+ //uint32_t best_vref[50][2][8][20];
+ //uint32_t best_vref_nibble[2][8][20];
+ uint32_t vref_val=0;
+ uint32_t pda_nibble_table[2][2][16][2];
+ uint8_t i=0;
+ uint8_t j=0;
+ uint8_t k=0;
+ uint8_t a=0;
+ uint8_t c=0;
+ uint8_t l_ranks = 0;
+ uint8_t l_vref_num = 0;
+ uint8_t i_port=0;
+
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - WR_VREF - Check Sanity only at 500 ddr4 +++++++++++++++++++++++++++");
+ rc = delay_shmoo_ddr4(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ vref_val,pda_nibble_table);
+
+ if(rc) return rc;
+ FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing .....");
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+
+
+
+ i_shmoo_type_valid = WR_EYE;
+ l_attr_schmoo_test_type_u8 = 2;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ //Initialize all to zero
+
+for(l_vref_num=0; l_vref_num < max_ddr4_vrefs1; l_vref_num++){
+ vref_val = l_vref_num;
+ vref_val_print = base_percent + (l_vref_num * index_mul_print);
+
+ rc = fapiGetScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ rc_num = rc_num | l_data_buffer_64.clearBit(0); if(rc_num) return rc;
+ rc = fapiPutScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ //system("putscom cen.mba 03010432 0 1 0 -ib -all");
+ FAPI_INF("\n After Clearing Refresh");
+ for(i=0;i< max_port;i++){
+ for(j=0;j<2;j++){
+ for(k=0;k<4;k++){
+
+ vrefdq_train_enable[i][j][k]=0x00;
+
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target_mba, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+
+
+ for(a=0;a < max_port;a++){
+ for(l_ranks=0;l_ranks < l_MAX_RANKS[0];l_ranks++){
+ for(c=0;c<4;c++){
+
+ vrefdq_train_value[a][l_ranks][c]=vref_val;
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_VALUE, &i_target_mba, vrefdq_train_value);
+
+
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ FAPI_INF("The Vref value is %d .... The percent voltage bump = %f ",vref_val,vref_val_print);
+
+ for(i=0;i< max_port;i++){
+ for(j=0;j<l_MAX_RANKS[0];j++){
+ for(k=0;k<4;k++){
+ vrefdq_train_enable[i][j][k]=0x01;
- i_shmoo_type_valid = WR_EYE;
+ }
+ }
+ }
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ rc = fapiGetScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ rc_num = rc_num | l_data_buffer_64.setBit(0); if(rc_num) return rc;
+ rc = fapiPutScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+
+ //system("putscom cen.mba 03010432 0 1 1 -ib -all");
+
+ rc = delay_shmoo_ddr4(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ vref_val,pda_nibble_table);
+ if (rc) return rc;
+
+ FAPI_INF("Wr Vref = %f ; Min Setup time = %d; Min Hold time = %d",
+ vref_val_print,
+ l_left_margin,
+ l_right_margin);
+
+ //vref_val=vref_val+1;
+ }
- FAPI_INF("+++++++++++++++++WRITE DRAM VREF Shmoo Attributes Values+++++++++++++++");
- FAPI_INF("DRAM_WR_VREF[0] = %d , DRAM_WR_VREF[1] = %d on %s",
- l_wr_dram_vref_nom[0],
- l_wr_dram_vref_nom[1],
- i_target_mba.toEcmdString());
- FAPI_INF("DRAM_WR_VREF_SCHMOO[0] = [%x],DRAM_WR_VREF_SCHMOO[1] = [%x] on %s",
- l_wr_dram_vref_schmoo[0],
- l_wr_dram_vref_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-
-
- if (l_wr_dram_vref_schmoo[i_port] == 0)
- {
- FAPI_INF("FAST Shmoo Mode: This function will not change any Write DRAM VREF settings");
- }
- else
- {
- for (index = 0; index < MAX_WR_VREF; index += 1)
- {
- if (l_wr_dram_vref_schmoo[i_port] & MASK)
- {
- FAPI_INF("Current Vref multiplier value is %d",
- wr_vref_array[index]);
- l_wr_dram_vref[i_port] = wr_vref_array[index];
- rc = config_wr_dram_vref(i_target_mba, i_port,
- l_wr_dram_vref[i_port]);
- if (rc) return rc;
- l_wr_dram_vref_in = l_wr_dram_vref[i_port];
- //FAPI_INF(" Calling Shmoo for finding Timing Margin:");
-
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_wr_dram_vref_in);
- if (rc) return rc;
- l_left_margin_wr_vref_array[index] = l_left_margin;
- l_right_margin_wr_vref_array[index] = l_right_margin;
-
- FAPI_INF("Wr Vref = %d ; Min Setup time = %d; Min Hold time = %d",
- wr_vref_array[index],
- l_left_margin_wr_vref_array[index],
- l_right_margin_wr_vref_array[index]);
- }
- else
- {
- l_left_margin_wr_vref_array[index] = 0;
- l_right_margin_wr_vref_array[index] = 0;
- }
- l_wr_dram_vref_schmoo[i_port] = (l_wr_dram_vref_schmoo[i_port] >> 1);
- //FAPI_INF("Wr Vref = %d ; Min Setup time = %d; Min Hold time = %d", wr_vref_array[index],l_left_margin_wr_vref_array[index], l_right_margin_wr_vref_array[index]);
- //FAPI_INF("Configuring Vref registers_2:, index %d , max value %d, schmoo %x mask %d ", index, MAX_WR_VREF, l_wr_dram_vref_schmoo[i_port], MASK);
- }
- l_wr_dram_vref_nom_fc = l_wr_dram_vref_nom[i_port];
- find_best_margin(WR_VREF, l_left_margin_wr_vref_array,
- l_right_margin_wr_vref_array, MAX_WR_VREF,
- l_wr_dram_vref_nom_fc, count);
- if (count >= MAX_WR_VREF)
- {
- FAPI_ERR("Write dram vref input(%d) out of bounds, (>= %d)", count,
- MAX_WR_VREF);
- const uint8_t & COUNT_DATA = count;
- FAPI_SET_HWP_ERROR(rc, RC_WR_VREF_SHMOO_INVALID_MARGIN_DATA);
- return rc;
- }
- else
- {
- // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
- FAPI_INF(" Restoring the nominal values!");
- rc = FAPI_ATTR_SET(ATTR_EFF_DRAM_WR_VREF, &i_target_mba,
- l_wr_dram_vref_nom);
- if (rc) return rc;
- rc = config_wr_dram_vref(i_target_mba, i_port,
- l_wr_dram_vref_nom[i_port]);
- if (rc) return rc;
- }
- FAPI_INF("Restoring mcbist setup attribute...");
- rc = reset_attribute(i_target_mba);
- if (rc) return rc;
- FAPI_INF("++++ Write DRAM Vref Shmoo function executed successfully ++++");
- }
- return rc;
+
+
+
+ //Read the write vref attributes
+
+
+
+ return rc;
+}
+
+
+fapi::ReturnCode wr_vref_shmoo_ddr4_bin(const fapi::Target & i_target_mba)
+{
+ fapi::ReturnCode rc;
+ uint8_t MAX_PORT = 2;
+ uint8_t max_ddr4_vrefs1 = 50;
+ shmoo_type_t i_shmoo_type_valid = MCBIST;
+ ecmdDataBufferBase l_data_buffer_64(64);
+ ecmdDataBufferBase refresh_reg(64);
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t vrefdq_train_range[2][2][4];
+ uint8_t num_ranks_per_dimm[2][2];
+ uint8_t l_MAX_RANKS[2];
+ uint32_t rc_num = 0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t base_percent = 60;
+ uint32_t pda_nibble_table[2][2][16][2];
+ uint32_t best_pda_nibble_table[2][2][16][2];
+ float index_mul_print = 0.65;
+ uint8_t l_attr_schmoo_test_type_u8 = 1;
+ float vref_val_print = 0;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target_mba, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, num_ranks_per_dimm); if(rc) return rc;
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target_mba, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ if(vrefdq_train_range[0][0][0] == 1)
+ {
+ base_percent = 45;
+ }
+
+ l_MAX_RANKS[0]=num_ranks_per_dimm[0][0]+num_ranks_per_dimm[0][1];
+ l_MAX_RANKS[1]=num_ranks_per_dimm[1][0]+num_ranks_per_dimm[1][1];
+ FAPI_INF("\n ** l_max_rank 0 = %d Base Percent = %d",l_MAX_RANKS[0],base_percent);
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
+ {
+ l_SCHMOO_NIBBLES=20;
+ }else{
+ l_SCHMOO_NIBBLES=18;
+ }
+ ///// ddr4 vref //////
+ fapi::Target l_target_centaur=i_target_mba;
+ uint8_t vrefdq_train_value[2][2][4];
+ uint8_t vrefdq_train_enable[2][2][4];
+ uint32_t best_vref[50][1];
+ uint32_t vref_val=0;
+ uint8_t index = 0;
+ uint8_t i=0;
+ uint8_t j=0;
+ uint8_t k=0;
+ uint8_t a=0;
+ uint8_t c=0;
+ uint8_t l_ranks = 0;
+ uint8_t i_port=0;
+ uint8_t l_vref_mid = 0;
+ vector<PDA_MRS_Storage> pda;
+ pda.clear();
+
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - WR_VREF - Check Sanity only at 500 ddr4 +++++++++++++++++++++++++++");
+ rc = delay_shmoo_ddr4_pda(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ vref_val,pda_nibble_table);
+
+ if(rc) return rc;
+ FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing .....");
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+ i_shmoo_type_valid = WR_EYE;
+ l_attr_schmoo_test_type_u8 = 2;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ //Initialize all to zero
+ for(index = 0; index < max_ddr4_vrefs1;index++)
+ {
+ best_vref[index][0] = 0;
+ }
+
+ //Initialise All to Zero
+ for(int k=0;k< MAX_PORT;k++) // port
+ {
+ for(int j=0;j < l_MAX_RANKS[0];j++) //Rank
+ {
+ for(int i=0;i<16;i++) //Nibble
+ {
+ pda_nibble_table[k][j][i][0] = 0; // Index 0 Are V-refs
+ pda_nibble_table[k][j][i][1] = 0; // Index 1 are Total Margin Values
+ best_pda_nibble_table[k][j][i][0] = 0; // Index 0 Are V-refs
+ best_pda_nibble_table[k][j][i][1] = 0; // Index 1 are Total Margin Values
+ }
+ }
+ }
+ uint8_t imax = 39;
+ uint8_t imin = 13;
+ uint8_t last_known_vref = 0;
+ uint8_t l_loop_count = 0;
+ //for(l_vref_num=0; l_vref_num < max_ddr4_vrefs1; l_vref_num++){
+ //Sweep Right
+ while(imax >= imin){
+
+ if(l_loop_count==0)
+ l_vref_mid = imin;
+ else
+ l_vref_mid = (imax+imin)/2;
+
+ vref_val = l_vref_mid;
+ vref_val_print = base_percent + (l_vref_mid * index_mul_print);
+
+ rc = fapiGetScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ rc_num = rc_num | l_data_buffer_64.clearBit(0); if(rc_num) return rc;
+ rc = fapiPutScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+
+ //system("putscom cen.mba 03010432 0 1 0 -ib -all");
+ FAPI_INF("\n After Clearing Refresh");
+
+ for(i=0;i<MAX_PORT;i++){
+ for(j=0;j<l_MAX_RANKS[0];j++){
+ for(k=0;k<4;k++){
+
+ vrefdq_train_enable[i][j][k]=0x00;
+
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target_mba, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ for(a=0;a < MAX_PORT;a++) //Port
+ {
+ for(l_ranks=0;l_ranks < l_MAX_RANKS[0];l_ranks++){
+ for(c=0;c < 4;c++){
+
+ vrefdq_train_value[a][l_ranks][c]=vref_val;
+
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_VALUE, &i_target_mba, vrefdq_train_value); if(rc) return rc;
+
+
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ FAPI_INF("The Vref value is %d .... The percent voltage bump = %f ",vref_val,vref_val_print);
+
+ for(i=0;i < MAX_PORT;i++){
+ for(j=0;j<l_MAX_RANKS[0];j++){
+ for(k=0;k<4;k++){
+
+ vrefdq_train_enable[i][j][k]=0x01;
+
+ }
+ }
+ }
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ rc = fapiGetScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ rc_num = rc_num | l_data_buffer_64.setBit(0); if(rc_num) return rc;
+ rc = fapiPutScom(i_target_mba,0x03010432,l_data_buffer_64); if(rc) return rc;
+ //system("putscom cen.mba 03010432 0 1 1 -ib -all");
+
+ rc = delay_shmoo_ddr4_pda(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ vref_val,pda_nibble_table);
+ if (rc) return rc;
+
+ FAPI_INF("Wr Vref = %f ; Min Setup time = %d; Min Hold time = %d",
+ vref_val_print,
+ l_left_margin,
+ l_right_margin);
+ best_vref[vref_val][0] = l_right_margin+l_left_margin;
+
+ //Get proper Criteria HERE
+ if(best_vref[vref_val][0] > best_vref[last_known_vref][0])
+ {
+ last_known_vref = vref_val;
+ //if(l_loop_count !=0)
+ imin = l_vref_mid+1;
+ }
+ //imax = l_vref_mid + (imax - l_vref_mid)/2;
+ else
+ {
+ if(l_loop_count ==0)
+ { FAPI_INF("Safety Fuse-1 !! ");
+ imin = l_vref_mid+1;
+ }
+ else
+ imax = ((l_vref_mid + imax )/2)-2;
+ }
+ l_loop_count ++;
+ for(int i_port=0;i_port < MAX_PORT;i_port++){
+ for(int i_rank=0;i_rank < l_MAX_RANKS[0];i_rank++){
+ for(int i_nibble=0;i_nibble < l_SCHMOO_NIBBLES;i_nibble++){
+ if (best_pda_nibble_table[i_port][i_rank][i_nibble][1] < pda_nibble_table[i_port][i_rank][i_nibble][1])
+ {
+ best_pda_nibble_table[i_port][i_rank][i_nibble][1] = pda_nibble_table[i_port][i_rank][i_nibble][1];
+ best_pda_nibble_table[i_port][i_rank][i_nibble][0] = vref_val;
+ }
+ }}}
+
+ }
+
+ //imax = max_ddr4_vrefs1/2;
+ //imin = 0;
+ //Sweep Left
+ /*while(imax >= imin){
+
+l_vref_mid = (imax+imin)/2;
+vref_val = l_vref_mid;
+vref_val_print = base_percent + (l_vref_mid * index_mul_print);
+system("putscom cen.mba 03010432 0 1 0 -ib -all");
+FAPI_INF("\n After Clearing Refresh");
+
+ for(i=0;i<2;i++){
+ for(j=0;j<l_MAX_RANKS[0];j++){
+ for(k=0;k<4;k++){
+
+ vrefdq_train_enable[i][j][k]=0x00;
+
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target_mba, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ for(a=0;a<2;a++){
+ for(l_ranks=0;l_ranks < l_MAX_RANKS[0];l_ranks++){
+ for(c=0;c<4;c++){
+
+ vrefdq_train_value[a][l_ranks][c]=vref_val;
+
+ }
+ }
+ }
+
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_VALUE, &i_target_mba, vrefdq_train_value);
+
+
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ FAPI_INF("The Vref value is %d .... The percent voltage bump = %f ",vref_val,vref_val_print);
+
+ for(i=0;i<2;i++){
+ for(j=0;j<l_MAX_RANKS[0];j++){
+ for(k=0;k<4;k++){
+
+ vrefdq_train_enable[i][j][k]=0x01;
+
+ }
+ }
+ }
+ rc = FAPI_ATTR_SET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target_mba, vrefdq_train_enable);if(rc) return rc;
+ rc = mss_mrs6_DDR4(l_target_centaur);
+ if(rc)
+ {
+ //FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ system("putscom cen.mba 03010432 0 1 1 -ib -all");
+
+ rc = delay_shmoo_ddr4(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ vref_val);
+ if (rc) return rc;
+
+ FAPI_INF("Wr Vref = %f ; Min Setup time = %d; Min Hold time = %d",
+ vref_val_print,
+ l_left_margin,
+ l_right_margin);
+ best_vref[vref_val][0] = l_right_margin+l_left_margin;
+
+ //Get proper Criteria HERE
+ if(best_vref[vref_val][0] > best_vref[last_known_vref][0])
+ {
+ last_known_vref = vref_val;
+ imin = l_vref_mid+1;
+ }
+ //last_known_vref = vref_val;
+ //imax = l_vref_mid + (imax - l_vref_mid)/2;
+ else
+ imax = (l_vref_mid + imax )/2;
+ }
+
+ */
+ vref_val_print = base_percent + (last_known_vref * index_mul_print);
+ FAPI_INF("Best V-Ref - %f ; Total Window = %d",
+ vref_val_print,best_vref[last_known_vref][0]);
+ // What do we do Once we know best V-Ref
+ for(a=0;a<50;a++)
+ {
+ vref_val_print = base_percent + (a * index_mul_print);
+ FAPI_INF("\n V-Ref - %f ; Total Window = %d",vref_val_print,best_vref[a][0]);
+ }
+ rc = fapiGetScom( i_target_mba, 0x03010432, refresh_reg); if(rc) return rc;
+ refresh_reg.clearBit(0);
+ fapiPutScom( i_target_mba, 0x03010432, refresh_reg);if(rc) return rc;
+
+ /*for(int i_port=0;i_port < 2;i_port++){
+ for(int i_rank=0;i_rank < 2;i_rank++){
+ for(int i_nibble=0;i_nibble < 16;i_nibble++){
+ FAPI_INF("\n Port %d Rank:%d Pda_Nibble: %d V-ref:%d Margin:%d",i_port,i_rank,i_nibble,best_pda_nibble_table[i_port][i_rank][i_nibble][0],best_pda_nibble_table[i_port][i_rank][i_nibble][1]);
+ pda.push_back(PDA_MRS_Storage(best_pda_nibble_table[i_port][i_rank][i_nibble][0],ATTR_VREF_DQ_TRAIN_VALUE,i_nibble,i_rank,0,i_port));
+}
+FAPI_INF("FINAL %s PDA STRING: %d %s",i_target_mba.toEcmdString(),pda.size()-1,pda[pda.size()-1].c_str());
+}}
+
+rc = fapiGetScom( i_target_mba, 0x03010432, refresh_reg);
+ refresh_reg.setBit(0);
+ fapiPutScom( i_target_mba, 0x03010432, refresh_reg);
+
+
+ //Read the write vref attributes
+
+
+ rc = mss_ddr4_run_pda((fapi::Target &)i_target_mba,pda);
+*/
+ return rc;
}
@@ -772,122 +1362,122 @@ fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba,
//----------------------------------------------------------------------------------------------
fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba,
- uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid)
+uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid)
{
- fapi::ReturnCode rc;
- uint32_t l_rd_cen_vref[MAX_PORT] = {0};
- uint32_t l_rd_cen_vref_nom[MAX_PORT] = {0};
- uint32_t l_rd_cen_vref_nom_fc = 0;
- uint32_t l_rd_cen_vref_in = 0;
- uint32_t l_rd_cen_vref_schmoo[MAX_PORT] = {0};
- uint8_t index = 0;
- uint8_t count = 0;
- //uint8_t shmoo_param_count = 0;
- //i_shmoo_type_valid = RD_EYE; // Hard coded - Temporary
-
- uint32_t l_left_margin = 0;
- uint32_t l_right_margin = 0;
- uint32_t l_left_margin_rd_vref_array[MAX_RD_VREF] = {0};
- uint32_t l_right_margin_rd_vref_array[MAX_RD_VREF] = {0};
-
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF, &i_target_mba, l_rd_cen_vref_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF_SCHMOO, &i_target_mba, l_rd_cen_vref_schmoo);
- if (rc) return rc;
+ fapi::ReturnCode rc;
+ uint32_t l_rd_cen_vref[MAX_PORT] = {0};
+ uint32_t l_rd_cen_vref_nom[MAX_PORT] = {0};
+ uint32_t l_rd_cen_vref_nom_fc = 0;
+ uint32_t l_rd_cen_vref_in = 0;
+ uint32_t l_rd_cen_vref_schmoo[MAX_PORT] = {0};
+ uint8_t index = 0;
+ uint8_t count = 0;
+ //uint8_t shmoo_param_count = 0;
+ //i_shmoo_type_valid = RD_EYE; // Hard coded - Temporary
+
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint32_t l_left_margin_rd_vref_array[MAX_RD_VREF] = {0};
+ uint32_t l_right_margin_rd_vref_array[MAX_RD_VREF] = {0};
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF, &i_target_mba, l_rd_cen_vref_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF_SCHMOO, &i_target_mba, l_rd_cen_vref_schmoo);
+ if (rc) return rc;
i_shmoo_type_valid = MCBIST;
FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF - Check Sanity only at 500000 +++++++++++++++++++++++++++");
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_rd_cen_vref_in);
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_rd_cen_vref_in);
if(rc) return rc;
FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing .....");
- rc = set_attribute(i_target_mba);
- if (rc) return rc;
-
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+
i_shmoo_type_valid = RD_EYE;
- FAPI_INF("+++++++++++++++++CENTAUR VREF Read Shmoo Attributes values+++++++++++++++");
- FAPI_INF("CEN_RD_VREF[0] = %d CEN_RD_VREF[1] = %d on %s",
- l_rd_cen_vref_nom[0],
- l_rd_cen_vref_nom[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_RD_VREF_SCHMOO[0] = [%x], CEN_RD_VREF_SCHMOO[1] = [%x] on %s",
- l_rd_cen_vref_schmoo[0],
- l_rd_cen_vref_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF +++++++++++++++++++++++++++");
-
- if (l_rd_cen_vref_schmoo[i_port] == 0)
- {
- FAPI_INF("FAST Shmoo Mode: This function will not change any Read Centaur VREF settings");
- }
- else
- {
- for (index = 0; index < MAX_RD_VREF; index += 1)
- {
- if ((l_rd_cen_vref_schmoo[i_port] & MASK) == 1)
- {
- l_rd_cen_vref[i_port] = rd_cen_vref_array[index];
- FAPI_INF("Current Read Vref Multiplier value is %d",
- rd_cen_vref_array[index]);
- FAPI_INF("Configuring Read Vref Registers:");
- rc = config_rd_cen_vref(i_target_mba, i_port,
- l_rd_cen_vref[i_port]);
- if (rc) return rc;
- l_rd_cen_vref_in = l_rd_cen_vref[i_port];
- //FAPI_INF(" Calling Shmoo function to find out Timing Margin:");
-
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_rd_cen_vref_in);
- if (rc) return rc;
- l_left_margin_rd_vref_array[index] = l_left_margin;
- l_right_margin_rd_vref_array[index] = l_right_margin;
-
- FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d",
- rd_cen_vref_array[index],
- l_left_margin_rd_vref_array[index],
- l_right_margin_rd_vref_array[index]);
- }
- else
- {
- l_left_margin_rd_vref_array[index] = 0;
- l_right_margin_rd_vref_array[index] = 0;
- }
- l_rd_cen_vref_schmoo[i_port] = (l_rd_cen_vref_schmoo[i_port] >> 1);
- /* FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d", rd_cen_vref_array[index],l_left_margin_rd_vref_array[index], l_right_margin_rd_vref_array[index]); */
- }
- l_rd_cen_vref_nom_fc = l_rd_cen_vref_nom[i_port];
- find_best_margin(RD_VREF, l_left_margin_rd_vref_array,
- l_right_margin_rd_vref_array, MAX_RD_VREF,
- l_rd_cen_vref_nom_fc, count);
- if (count >= MAX_RD_VREF)
- {
- FAPI_ERR("Read vref new input(%d) out of bounds, (>= %d)", count,
- MAX_RD_VREF);
- const uint8_t & COUNT_DATA = count;
- FAPI_SET_HWP_ERROR(rc, RC_RD_VREF_SHMOO_INVALID_MARGIN_DATA);
- return rc;
- }
- else
- {
- // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
- FAPI_INF("Restoring Nominal values!");
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_RD_VREF, &i_target_mba,
- l_rd_cen_vref_nom);
- if (rc) return rc;
- rc = config_rd_cen_vref(i_target_mba, i_port,
- l_rd_cen_vref_nom[i_port]);
- if (rc) return rc;
- }
-
+ FAPI_INF("+++++++++++++++++CENTAUR VREF Read Shmoo Attributes values+++++++++++++++");
+ FAPI_INF("CEN_RD_VREF[0] = %d CEN_RD_VREF[1] = %d on %s",
+ l_rd_cen_vref_nom[0],
+ l_rd_cen_vref_nom[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_RD_VREF_SCHMOO[0] = [%x], CEN_RD_VREF_SCHMOO[1] = [%x] on %s",
+ l_rd_cen_vref_schmoo[0],
+ l_rd_cen_vref_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF +++++++++++++++++++++++++++");
+
+ if (l_rd_cen_vref_schmoo[i_port] == 0)
+ {
+ FAPI_INF("FAST Shmoo Mode: This function will not change any Read Centaur VREF settings");
+ }
+ else
+ {
+ for (index = 0; index < MAX_RD_VREF; index += 1)
+ {
+ if ((l_rd_cen_vref_schmoo[i_port] & MASK) == 1)
+ {
+ l_rd_cen_vref[i_port] = rd_cen_vref_array[index];
+ FAPI_INF("Current Read Vref Multiplier value is %d",
+ rd_cen_vref_array[index]);
+ FAPI_INF("Configuring Read Vref Registers:");
+ rc = config_rd_cen_vref(i_target_mba, i_port,
+ l_rd_cen_vref[i_port]);
+ if (rc) return rc;
+ l_rd_cen_vref_in = l_rd_cen_vref[i_port];
+ //FAPI_INF(" Calling Shmoo function to find out Timing Margin:");
+
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_rd_cen_vref_in);
+ if (rc) return rc;
+ l_left_margin_rd_vref_array[index] = l_left_margin;
+ l_right_margin_rd_vref_array[index] = l_right_margin;
+
+ FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d",
+ rd_cen_vref_array[index],
+ l_left_margin_rd_vref_array[index],
+ l_right_margin_rd_vref_array[index]);
+ }
+ else
+ {
+ l_left_margin_rd_vref_array[index] = 0;
+ l_right_margin_rd_vref_array[index] = 0;
+ }
+ l_rd_cen_vref_schmoo[i_port] = (l_rd_cen_vref_schmoo[i_port] >> 1);
+ /* FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d", rd_cen_vref_array[index],l_left_margin_rd_vref_array[index], l_right_margin_rd_vref_array[index]); */
+ }
+ l_rd_cen_vref_nom_fc = l_rd_cen_vref_nom[i_port];
+ find_best_margin(RD_VREF, l_left_margin_rd_vref_array,
+ l_right_margin_rd_vref_array, MAX_RD_VREF,
+ l_rd_cen_vref_nom_fc, count);
+ if (count >= MAX_RD_VREF)
+ {
+ FAPI_ERR("Read vref new input(%d) out of bounds, (>= %d)", count,
+ MAX_RD_VREF);
+ const uint8_t & COUNT_DATA = count;
+ FAPI_SET_HWP_ERROR(rc, RC_RD_VREF_SHMOO_INVALID_MARGIN_DATA);
+ return rc;
+ }
+ else
+ {
+ // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
+ FAPI_INF("Restoring Nominal values!");
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_RD_VREF, &i_target_mba,
+ l_rd_cen_vref_nom);
+ if (rc) return rc;
+ rc = config_rd_cen_vref(i_target_mba, i_port,
+ l_rd_cen_vref_nom[i_port]);
+ if (rc) return rc;
+ }
+
FAPI_INF("++++ Centaur Read Vref Shmoo function executed successfully ++++");
- }
- FAPI_INF("Restoring mcbist setup attribute...");
- rc = reset_attribute(i_target_mba);if (rc) return rc;
- return rc;
+ }
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);if (rc) return rc;
+ return rc;
}
//------------------------------------------------------------------------------
@@ -900,109 +1490,109 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba,
// i_pattern, i_test_type : Default = 0, mcbist lab function would use this arg
//------------------------------------------------------------------------------
fapi::ReturnCode rcv_imp_shmoo(const fapi::Target & i_target_mba,
- uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid)
+uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid)
{
- fapi::ReturnCode rc;
- uint8_t l_rcv_imp_dq_dqs[MAX_PORT] = {0};
- uint8_t l_rcv_imp_dq_dqs_nom[MAX_PORT] = {0};
- uint8_t l_rcv_imp_dq_dqs_nom_fc = 0;
- uint8_t l_rcv_imp_dq_dqs_in = 0;
- uint32_t l_rcv_imp_dq_dqs_schmoo[MAX_PORT] = {0};
- uint8_t index = 0;
- uint8_t count = 0;
- uint8_t shmoo_param_count = 0;
- i_shmoo_type_valid = RD_EYE; //Hard coded since no other shmoo is applicable - Temporary
-
- uint32_t l_left_margin = 0;
- uint32_t l_right_margin = 0;
- uint32_t l_left_margin_rcv_imp_array[MAX_RCV_IMP] = {0};
- uint32_t l_right_margin_rcv_imp_array[MAX_RCV_IMP] = {0};
-
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba, l_rcv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_rcv_imp_dq_dqs_schmoo);
- if (rc) return rc;
-
- FAPI_INF("+++++++++++++++++RECIVER IMP Read Shmoo Attributes values+++++++++++++++");
- FAPI_INF("CEN_RCV_IMP_DQ_DQS[0] = %d , CEN_RCV_IMP_DQ_DQS[1] = %d on %s",
- l_rcv_imp_dq_dqs_nom[0],
- l_rcv_imp_dq_dqs_nom[1],
- i_target_mba.toEcmdString());
- FAPI_INF("CEN_RCV_IMP_DQ_DQS_SCHMOO[0] = [%d], CEN_RCV_IMP_DQ_DQS_SCHMOO[1] = [%d], on %s",
- l_rcv_imp_dq_dqs_schmoo[0],
- l_rcv_imp_dq_dqs_schmoo[1],
- i_target_mba.toEcmdString());
- FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
-
- if (l_rcv_imp_dq_dqs_schmoo[i_port] == 0)
- {
- FAPI_INF("FAST Shmoo Mode: This function will not change any Write DRAM VREF settings");
- }
- else
- {
- for (index = 0; index < MAX_RCV_IMP; index += 1)
- {
- if ((l_rcv_imp_dq_dqs_schmoo[i_port] & MASK) == 1)
- {
- l_rcv_imp_dq_dqs[i_port] = rcv_imp_array[index];
- FAPI_INF("Current Receiver Impedance: %d Ohms ",
- rcv_imp_array[index]);
- FAPI_INF("Configuring Receiver impedance registers:");
- rc = config_rcv_imp(i_target_mba, i_port,
- l_rcv_imp_dq_dqs[i_port]);
- if (rc) return rc;
- l_rcv_imp_dq_dqs_in = l_rcv_imp_dq_dqs[i_port];
- //FAPI_INF("Calling Shmoo function to find out timing margin:");
- if (shmoo_param_count)
- {
- rc = set_attribute(i_target_mba);
- if (rc) return rc;
- }
- rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
- &l_left_margin, &l_right_margin,
- l_rcv_imp_dq_dqs_in);
- if (rc) return rc;
- l_left_margin_rcv_imp_array[index] = l_left_margin;
- l_right_margin_rcv_imp_array[index] = l_right_margin;
- shmoo_param_count++;
- }
- else
- {
- l_left_margin_rcv_imp_array[index] = 0;
- l_right_margin_rcv_imp_array[index] = 0;
- }
- l_rcv_imp_dq_dqs_schmoo[i_port] = (l_rcv_imp_dq_dqs_schmoo[i_port] >> 1);
- }
- l_rcv_imp_dq_dqs_nom_fc = l_rcv_imp_dq_dqs_nom[i_port];
- find_best_margin(RCV_IMP, l_left_margin_rcv_imp_array,
- l_right_margin_rcv_imp_array, MAX_RCV_IMP,
- l_rcv_imp_dq_dqs_nom_fc, count);
- if (count >= MAX_RCV_IMP)
- {
- FAPI_ERR("Receiver Imp new input(%d) out of bounds, (>= %d)",
- count, MAX_RCV_IMP);
- const uint8_t & COUNT_DATA = count;
- FAPI_SET_HWP_ERROR(rc, RC_RCV_IMP_SHMOO_INVALID_MARGIN_DATA);
- return rc;
- }
- else
- {
- // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
- FAPI_INF("Restoring the nominal values!");
- rc = FAPI_ATTR_SET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba,
- l_rcv_imp_dq_dqs_nom);
- if (rc) return rc;
- rc = config_rcv_imp(i_target_mba, i_port,
- l_rcv_imp_dq_dqs_nom[i_port]);
- if (rc) return rc;
- }
- FAPI_INF("Restoring mcbist setup attribute...");
- rc = reset_attribute(i_target_mba);
- if (rc) return rc;
- FAPI_INF("++++ Receiver Impdeance Shmoo function executed successfully ++++");
- }
- return rc;
+ fapi::ReturnCode rc;
+ uint8_t l_rcv_imp_dq_dqs[MAX_PORT] = {0};
+ uint8_t l_rcv_imp_dq_dqs_nom[MAX_PORT] = {0};
+ uint8_t l_rcv_imp_dq_dqs_nom_fc = 0;
+ uint8_t l_rcv_imp_dq_dqs_in = 0;
+ uint32_t l_rcv_imp_dq_dqs_schmoo[MAX_PORT] = {0};
+ uint8_t index = 0;
+ uint8_t count = 0;
+ uint8_t shmoo_param_count = 0;
+ i_shmoo_type_valid = RD_EYE; //Hard coded since no other shmoo is applicable - Temporary
+
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint32_t l_left_margin_rcv_imp_array[MAX_RCV_IMP] = {0};
+ uint32_t l_right_margin_rcv_imp_array[MAX_RCV_IMP] = {0};
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba, l_rcv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_rcv_imp_dq_dqs_schmoo);
+ if (rc) return rc;
+
+ FAPI_INF("+++++++++++++++++RECIVER IMP Read Shmoo Attributes values+++++++++++++++");
+ FAPI_INF("CEN_RCV_IMP_DQ_DQS[0] = %d , CEN_RCV_IMP_DQ_DQS[1] = %d on %s",
+ l_rcv_imp_dq_dqs_nom[0],
+ l_rcv_imp_dq_dqs_nom[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("CEN_RCV_IMP_DQ_DQS_SCHMOO[0] = [%d], CEN_RCV_IMP_DQ_DQS_SCHMOO[1] = [%d], on %s",
+ l_rcv_imp_dq_dqs_schmoo[0],
+ l_rcv_imp_dq_dqs_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+
+ if (l_rcv_imp_dq_dqs_schmoo[i_port] == 0)
+ {
+ FAPI_INF("FAST Shmoo Mode: This function will not change any Write DRAM VREF settings");
+ }
+ else
+ {
+ for (index = 0; index < MAX_RCV_IMP; index += 1)
+ {
+ if ((l_rcv_imp_dq_dqs_schmoo[i_port] & MASK) == 1)
+ {
+ l_rcv_imp_dq_dqs[i_port] = rcv_imp_array[index];
+ FAPI_INF("Current Receiver Impedance: %d Ohms ",
+ rcv_imp_array[index]);
+ FAPI_INF("Configuring Receiver impedance registers:");
+ rc = config_rcv_imp(i_target_mba, i_port,
+ l_rcv_imp_dq_dqs[i_port]);
+ if (rc) return rc;
+ l_rcv_imp_dq_dqs_in = l_rcv_imp_dq_dqs[i_port];
+ //FAPI_INF("Calling Shmoo function to find out timing margin:");
+ if (shmoo_param_count)
+ {
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+ }
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_rcv_imp_dq_dqs_in);
+ if (rc) return rc;
+ l_left_margin_rcv_imp_array[index] = l_left_margin;
+ l_right_margin_rcv_imp_array[index] = l_right_margin;
+ shmoo_param_count++;
+ }
+ else
+ {
+ l_left_margin_rcv_imp_array[index] = 0;
+ l_right_margin_rcv_imp_array[index] = 0;
+ }
+ l_rcv_imp_dq_dqs_schmoo[i_port] = (l_rcv_imp_dq_dqs_schmoo[i_port] >> 1);
+ }
+ l_rcv_imp_dq_dqs_nom_fc = l_rcv_imp_dq_dqs_nom[i_port];
+ find_best_margin(RCV_IMP, l_left_margin_rcv_imp_array,
+ l_right_margin_rcv_imp_array, MAX_RCV_IMP,
+ l_rcv_imp_dq_dqs_nom_fc, count);
+ if (count >= MAX_RCV_IMP)
+ {
+ FAPI_ERR("Receiver Imp new input(%d) out of bounds, (>= %d)",
+ count, MAX_RCV_IMP);
+ const uint8_t & COUNT_DATA = count;
+ FAPI_SET_HWP_ERROR(rc, RC_RCV_IMP_SHMOO_INVALID_MARGIN_DATA);
+ return rc;
+ }
+ else
+ {
+ // FAPI_INF("Nominal value will not be changed!- Restoring the original values!");
+ FAPI_INF("Restoring the nominal values!");
+ rc = FAPI_ATTR_SET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba,
+ l_rcv_imp_dq_dqs_nom);
+ if (rc) return rc;
+ rc = config_rcv_imp(i_target_mba, i_port,
+ l_rcv_imp_dq_dqs_nom[i_port]);
+ if (rc) return rc;
+ }
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);
+ if (rc) return rc;
+ FAPI_INF("++++ Receiver Impdeance Shmoo function executed successfully ++++");
+ }
+ return rc;
}
//------------------------------------------------------------------------------
@@ -1017,26 +1607,72 @@ fapi::ReturnCode rcv_imp_shmoo(const fapi::Target & i_target_mba,
//------------------------------------------------------------------------------
fapi::ReturnCode delay_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
- shmoo_type_t i_shmoo_type_valid,
- uint32_t *o_left_margin,
- uint32_t *o_right_margin,
- uint32_t i_shmoo_param)
+shmoo_type_t i_shmoo_type_valid,
+uint32_t *o_left_margin,
+uint32_t *o_right_margin,
+uint32_t i_shmoo_param)
{
- fapi::ReturnCode rc;
- //FAPI_INF(" Inside before the delay shmoo " );
- //Constructor CALL: generic_shmoo::generic_shmoo(uint8_t i_port, uint32_t shmoo_mask,shmoo_algorithm_t shmoo_algorithm)
- //generic_shmoo mss_shmoo=generic_shmoo(i_port,2,SEQ_LIN);
+ fapi::ReturnCode rc;
+ //FAPI_INF(" Inside before the delay shmoo " );
+ //Constructor CALL: generic_shmoo::generic_shmoo(uint8_t i_port, uint32_t shmoo_mask,shmoo_algorithm_t shmoo_algorithm)
+ //generic_shmoo mss_shmoo=generic_shmoo(i_port,2,SEQ_LIN);
generic_shmoo * l_pShmoo = new generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN);
- //generic_shmoo mss_shmoo=generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN);
+ //generic_shmoo mss_shmoo=generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN);
rc = l_pShmoo->run(i_target_mba, o_left_margin, o_right_margin,i_shmoo_param);
- if(rc)
- {
- FAPI_ERR("Delay Schmoo Function is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
- }
- delete l_pShmoo;
- return rc;
+ if(rc)
+ {
+ FAPI_ERR("Delay Schmoo Function is Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ }
+ delete l_pShmoo;
+ return rc;
}
+//------------------------------------------------------------------------------
+// Function name:delay_shmoo()
+// Calls Delay shmoo function varies delay values of each dq and returns timing margin
+// Input param: const fapi::Target MBA, port = 0,1
+// Shmoo type: MCBIST, WR_EYE, RD_EYE, WR_DQS, RD_DQS
+// Shmoo Mode: FEW_ADDR, QUARTER_ADDR, HALF_ADDR, FULL_ADDR
+// i_pattern, i_test_type : Default = 0, mcbist lab function would use this arg
+// Output param: l_left_margin = Left Margin(Setup time),
+// l_right_margin = Right Margin (Hold time) in ps
+//------------------------------------------------------------------------------
+
+fapi::ReturnCode delay_shmoo_ddr4(const fapi::Target & i_target_mba, uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid,
+uint32_t *o_left_margin,
+uint32_t *o_right_margin,
+uint32_t i_shmoo_param,uint32_t pda_nibble_table[2][2][16][2])
+{
+ fapi::ReturnCode rc;
+
+ generic_shmoo * l_pShmoo = new generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN);
+
+ rc = l_pShmoo->run(i_target_mba, o_left_margin, o_right_margin,i_shmoo_param); if (rc) return rc;
+
+
+
+ delete l_pShmoo;
+ return rc;
+}
+
+fapi::ReturnCode delay_shmoo_ddr4_pda(const fapi::Target & i_target_mba, uint8_t i_port,
+shmoo_type_t i_shmoo_type_valid,
+uint32_t *o_left_margin,
+uint32_t *o_right_margin,
+uint32_t i_shmoo_param,uint32_t pda_nibble_table[2][2][16][2])
+{
+ fapi::ReturnCode rc;
+
+ generic_shmoo * l_pShmoo = new generic_shmoo(i_port,i_shmoo_type_valid,SEQ_LIN);
+
+ rc = l_pShmoo->run(i_target_mba, o_left_margin, o_right_margin,i_shmoo_param); if (rc) return rc;
+
+ rc = l_pShmoo->get_nibble_pda(i_target_mba,pda_nibble_table); if (rc) return rc;
+
+ delete l_pShmoo;
+ return rc;
+}
//------------------------------------------------------------------------------
//Function name: set_attributes()
@@ -1045,10 +1681,229 @@ fapi::ReturnCode delay_shmoo(const fapi::Target & i_target_mba, uint8_t i_port,
fapi::ReturnCode set_attribute(const fapi::Target & i_target_mba)
{
- fapi::ReturnCode rc;
- uint8_t l_mcbist_setup_multiple_set = 1; //Hard coded it wont change
- rc = FAPI_ATTR_SET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target_mba, l_mcbist_setup_multiple_set);
- return rc;
+ fapi::ReturnCode rc;
+ uint8_t l_mcbist_setup_multiple_set = 1; //Hard coded it wont change
+ rc = FAPI_ATTR_SET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target_mba, l_mcbist_setup_multiple_set);
+ return rc;
+}
+
+fapi::ReturnCode rd_vref_shmoo_ddr4(const fapi::Target & i_target_mba)
+{
+ fapi::ReturnCode rc;
+ shmoo_type_t i_shmoo_type_valid = MCBIST; // Hard coded - Temporary
+ ecmdDataBufferBase l_data_buffer_64(64);
+ ecmdDataBufferBase data_buffer(64);
+ uint32_t l_rd_cen_vref_schmoo[MAX_PORT] = {0};
+ uint32_t l_left_margin = 0;
+ uint32_t l_right_margin = 0;
+ uint32_t l_rd_cen_vref_in = 0;
+ uint8_t l_attr_schmoo_test_type_u8 = 1;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ uint8_t i_port=0;
+ uint32_t diff_value = 1375;
+ uint32_t base = 70000;
+ uint32_t vref_value_print = 0;
+ uint32_t l_left_margin_rd_vref_array[16] = {0};
+ uint32_t l_right_margin_rd_vref_array[16] = {0};
+ uint32_t rc_num = 0;
+ uint8_t l_vref_num = 0;
+
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF - Check Sanity only - DDR4 +++++++++++++++++++++++++++");
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,
+ &l_left_margin, &l_right_margin,
+ l_rd_cen_vref_in);
+ if(rc) return rc;
+ FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing .....");
+ rc = set_attribute(i_target_mba);
+ if (rc) return rc;
+
+ i_shmoo_type_valid = RD_EYE;
+ l_attr_schmoo_test_type_u8 = 4;
+ rc = FAPI_ATTR_SET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target_mba, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ //rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF, &i_target_mba, l_rd_cen_vref_nom);if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF_SCHMOO, &i_target_mba, l_rd_cen_vref_schmoo);if (rc) return rc;
+
+
+ FAPI_INF("CEN_RD_VREF_SCHMOO[0] = [%x], CEN_RD_VREF_SCHMOO[1] = [%x] on %s",
+ l_rd_cen_vref_schmoo[0],
+ l_rd_cen_vref_schmoo[1],
+ i_target_mba.toEcmdString());
+ FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF DDR4 +++++++++++++++++++++++++++");
+
+ //For DDR3 - DDR4 Range
+ if (l_rd_cen_vref_schmoo[i_port] == 1)
+ {
+ FAPI_INF("\n Testing Range - DDR3 to DDR4 - Vrefs");
+ base = 50000;
+ }
+ else
+ {
+ FAPI_INF("\n Testing Range - DDR4 Range Only - Vrefs");
+
+ for(l_vref_num = 7; l_vref_num > 0 ; l_vref_num--)
+ {
+ l_rd_cen_vref_in = l_vref_num;
+ vref_value_print = base - (l_vref_num*diff_value);
+ FAPI_INF("Current Vref value is %d",vref_value_print);
+ FAPI_INF("Configuring Read Vref Registers:");
+ rc = fapiGetScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_0_0x800000060301143F,
+ data_buffer); if(rc) return rc;
+ rc_num = rc_num | data_buffer.insertFromRight(l_rd_cen_vref_in,56,4);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc_num = data_buffer.setBit(60);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_0_0x800000060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_1_0x800004060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_2_0x800008060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_3_0x80000c060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_4_0x800010060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiGetScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_0_0x800100060301143F,
+ data_buffer); if(rc) return rc;
+ rc_num = rc_num | data_buffer.insertFromRight(l_rd_cen_vref_in,56,4);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc_num = data_buffer.setBit(60);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_0_0x800100060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_1_0x800104060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_2_0x800108060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_3_0x80010c060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_4_0x800110060301143F,
+ data_buffer); if(rc) return rc;
+
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,&l_left_margin, &l_right_margin,l_rd_cen_vref_in);if (rc) return rc;
+ l_left_margin_rd_vref_array[l_vref_num] = l_left_margin;
+ l_right_margin_rd_vref_array[l_vref_num] = l_right_margin;
+
+ FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d",vref_value_print, l_left_margin_rd_vref_array[l_vref_num],l_right_margin_rd_vref_array[l_vref_num]);
+ }
+ // For base + values
+
+ for(l_vref_num = 0; l_vref_num < 9; l_vref_num++)
+ {
+
+ l_rd_cen_vref_in = l_vref_num;
+ vref_value_print = base + (l_vref_num*diff_value);
+ FAPI_INF("Current Vref value is %d",vref_value_print);
+ FAPI_INF("Configuring Read Vref Registers:");
+ rc = fapiGetScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_0_0x800000060301143F,
+ data_buffer); if(rc) return rc;
+ rc_num = rc_num | data_buffer.insertFromRight(l_rd_cen_vref_in,56,4);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc_num = data_buffer.setBit(60);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_0_0x800000060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_1_0x800004060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_2_0x800008060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_3_0x80000c060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P0_4_0x800010060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiGetScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_0_0x800100060301143F,
+ data_buffer); if(rc) return rc;
+ rc_num = rc_num | data_buffer.insertFromRight(l_rd_cen_vref_in,56,4);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc_num = data_buffer.setBit(60);
+ if (rc_num)
+ {
+ FAPI_ERR( "config_rd_vref: Error in setting up buffer ");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_0_0x800100060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_1_0x800104060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_2_0x800108060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_3_0x80010c060301143F,
+ data_buffer); if(rc) return rc;
+ rc = fapiPutScom(i_target_mba,
+ DPHY01_DDRPHY_DP18_RX_PEAK_AMP_P1_4_0x800110060301143F,
+ data_buffer); if(rc) return rc;
+
+ rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid,&l_left_margin, &l_right_margin,l_rd_cen_vref_in);if (rc) return rc;
+ l_left_margin_rd_vref_array[l_vref_num] = l_left_margin;
+ l_right_margin_rd_vref_array[l_vref_num] = l_right_margin;
+
+ FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d",vref_value_print, l_left_margin_rd_vref_array[l_vref_num],l_right_margin_rd_vref_array[l_vref_num]);
+ }
+
+
+ }
+ FAPI_INF("++++ Centaur Read Vref Shmoo function DDR4 done ! ++++");
+ FAPI_INF("Restoring mcbist setup attribute...");
+ rc = reset_attribute(i_target_mba);
+ return rc;
}
//------------------------------------------------------------------------------
@@ -1058,10 +1913,10 @@ fapi::ReturnCode set_attribute(const fapi::Target & i_target_mba)
fapi::ReturnCode reset_attribute(const fapi::Target & i_target_mba)
{
- fapi::ReturnCode rc;
- uint8_t l_mcbist_setup_multiple_reset = 0; //Hard coded it wont change
- rc = FAPI_ATTR_SET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target_mba, l_mcbist_setup_multiple_reset);
- return rc;
+ fapi::ReturnCode rc;
+ uint8_t l_mcbist_setup_multiple_reset = 0; //Hard coded it wont change
+ rc = FAPI_ATTR_SET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target_mba, l_mcbist_setup_multiple_reset);
+ return rc;
}
//------------------------------------------------------------------------------
@@ -1076,106 +1931,106 @@ fapi::ReturnCode reset_attribute(const fapi::Target & i_target_mba)
void find_best_margin(shmoo_param i_shmoo_param_valid,
- uint32_t i_left[],
- uint32_t i_right[],
- const uint8_t i_max,
- uint32_t i_param_nom,
- uint8_t& o_index)
+uint32_t i_left[],
+uint32_t i_right[],
+const uint8_t i_max,
+uint32_t i_param_nom,
+uint8_t& o_index)
{
- uint32_t left_margin = 0;
- uint32_t right_margin = 0;
- uint32_t left_margin_nom = 0;
- uint32_t right_margin_nom = 0;
- uint32_t diff_margin_nom = 0;
- //uint32_t total_margin = 0;
- uint32_t diff_margin = 0;
- uint8_t index = 0;
- uint8_t index2 = 0;
-
- for (index = 0; index < i_max; index += 1) //send max from top function
- {
- if (i_shmoo_param_valid & DRV_IMP)
- {
- if (drv_imp_array[index] == i_param_nom)
- {
- left_margin_nom = i_left[index];
- right_margin_nom = i_right[index];
- diff_margin_nom = (i_left[index] >= i_right[index]) ?
- (i_left[index]- i_right[index]) :
- (i_right[index] - i_left[index]);
- //FAPI_INF("Driver impedance value (NOM): %d Ohms Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
- break;
- }
- }
- else if (i_shmoo_param_valid & SLEW_RATE)
- {
- if (slew_rate_array[index] == i_param_nom)
- {
- left_margin_nom = i_left[index];
- right_margin_nom = i_right[index];
- diff_margin_nom = (i_left[index] >= i_right[index]) ?
- (i_left[index] - i_right[index]) :
- (i_right[index] - i_left[index]);
- //FAPI_INF("Slew rate value (NOM): %d V/ns Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
- break;
- }
- }
- else if (i_shmoo_param_valid & WR_VREF)
- {
- if (wr_vref_array_fitness[index] == i_param_nom)
- {
- left_margin_nom = i_left[index];
- right_margin_nom = i_right[index];
- diff_margin_nom = (i_left[index] >= i_right[index]) ?
- (i_left[index] - i_right[index]) :
- (i_right[index] - i_left[index]);
- //FAPI_INF("Write DRAM Vref Multiplier value (NOM): %d Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
- break;
- }
- }
- else if (i_shmoo_param_valid & RD_VREF)
- {
- if (rd_cen_vref_array_fitness[index] == i_param_nom)
- {
- left_margin_nom = i_left[index];
- right_margin_nom = i_right[index];
- diff_margin_nom = (i_left[index] >= i_right[index]) ?
- (i_left[index] - i_right[index]) :
- (i_right[index] - i_left[index]);
- //FAPI_INF("Centaur Read Vref Multiplier value (NOM): %d Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
- break;
- }
- }
- else if (i_shmoo_param_valid & RCV_IMP)
- {
- if (rcv_imp_array[index] == i_param_nom)
- {
- left_margin_nom = i_left[index];
- right_margin_nom = i_right[index];
- diff_margin_nom = (i_left[index] >= i_right[index]) ?
- (i_left[index] - i_right[index]) :
- (i_right[index] - i_left[index]);
- // FAPI_INF("Receiver Impedance value (NOM): %d Ohms Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
- break;
- }
- }
- }
- for (index2 = 0; index2 < i_max; index2 += 1)
- {
- left_margin = i_left[index2];
- right_margin = i_right[index2];
- //total_margin = i_left[index2] + i_right[index2];
- diff_margin = (i_left[index2] >= i_right[index2]) ? (i_left[index2]
- - i_right[index2]) : (i_right[index2] - i_left[index2]);
- if ((left_margin > 0 && right_margin > 0))
- {
- if ((left_margin >= left_margin_nom) && (right_margin
- >= right_margin_nom) && (diff_margin <= diff_margin_nom))
- {
- o_index = index2;
- //wont break this loop, since the purpose is to find the best parameter value & best timing margin The enum is constructed to do that
- // FAPI_INF("Index value %d, Min Setup Margin: %d, Min Hold Margin: %d", o_index, i_left[index2], i_right[index2]);
- }
- }
- }
+ uint32_t left_margin = 0;
+ uint32_t right_margin = 0;
+ uint32_t left_margin_nom = 0;
+ uint32_t right_margin_nom = 0;
+ uint32_t diff_margin_nom = 0;
+ //uint32_t total_margin = 0;
+ uint32_t diff_margin = 0;
+ uint8_t index = 0;
+ uint8_t index2 = 0;
+
+ for (index = 0; index < i_max; index += 1) //send max from top function
+ {
+ if (i_shmoo_param_valid & DRV_IMP)
+ {
+ if (drv_imp_array[index] == i_param_nom)
+ {
+ left_margin_nom = i_left[index];
+ right_margin_nom = i_right[index];
+ diff_margin_nom = (i_left[index] >= i_right[index]) ?
+ (i_left[index]- i_right[index]) :
+ (i_right[index] - i_left[index]);
+ //FAPI_INF("Driver impedance value (NOM): %d Ohms Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
+ break;
+ }
+ }
+ else if (i_shmoo_param_valid & SLEW_RATE)
+ {
+ if (slew_rate_array[index] == i_param_nom)
+ {
+ left_margin_nom = i_left[index];
+ right_margin_nom = i_right[index];
+ diff_margin_nom = (i_left[index] >= i_right[index]) ?
+ (i_left[index] - i_right[index]) :
+ (i_right[index] - i_left[index]);
+ //FAPI_INF("Slew rate value (NOM): %d V/ns Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
+ break;
+ }
+ }
+ else if (i_shmoo_param_valid & WR_VREF)
+ {
+ if (wr_vref_array_fitness[index] == i_param_nom)
+ {
+ left_margin_nom = i_left[index];
+ right_margin_nom = i_right[index];
+ diff_margin_nom = (i_left[index] >= i_right[index]) ?
+ (i_left[index] - i_right[index]) :
+ (i_right[index] - i_left[index]);
+ //FAPI_INF("Write DRAM Vref Multiplier value (NOM): %d Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
+ break;
+ }
+ }
+ else if (i_shmoo_param_valid & RD_VREF)
+ {
+ if (rd_cen_vref_array_fitness[index] == i_param_nom)
+ {
+ left_margin_nom = i_left[index];
+ right_margin_nom = i_right[index];
+ diff_margin_nom = (i_left[index] >= i_right[index]) ?
+ (i_left[index] - i_right[index]) :
+ (i_right[index] - i_left[index]);
+ //FAPI_INF("Centaur Read Vref Multiplier value (NOM): %d Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
+ break;
+ }
+ }
+ else if (i_shmoo_param_valid & RCV_IMP)
+ {
+ if (rcv_imp_array[index] == i_param_nom)
+ {
+ left_margin_nom = i_left[index];
+ right_margin_nom = i_right[index];
+ diff_margin_nom = (i_left[index] >= i_right[index]) ?
+ (i_left[index] - i_right[index]) :
+ (i_right[index] - i_left[index]);
+ // FAPI_INF("Receiver Impedance value (NOM): %d Ohms Setup Margin: %d Hold Margin: %d", i_param_nom, i_left[index], i_right[index]);
+ break;
+ }
+ }
+ }
+ for (index2 = 0; index2 < i_max; index2 += 1)
+ {
+ left_margin = i_left[index2];
+ right_margin = i_right[index2];
+ //total_margin = i_left[index2] + i_right[index2];
+ diff_margin = (i_left[index2] >= i_right[index2]) ? (i_left[index2]
+ - i_right[index2]) : (i_right[index2] - i_left[index2]);
+ if ((left_margin > 0 && right_margin > 0))
+ {
+ if ((left_margin >= left_margin_nom) && (right_margin
+ >= right_margin_nom) && (diff_margin <= diff_margin_nom))
+ {
+ o_index = index2;
+ //wont break this loop, since the purpose is to find the best parameter value & best timing margin The enum is constructed to do that
+ // FAPI_INF("Index value %d, Min Setup Margin: %d, Min Hold Margin: %d", o_index, i_left[index2], i_right[index2]);
+ }
+ }
+ }
}
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C
index 3d3be8347..7ec5efbab 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C
@@ -22,8 +22,8 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-
-// $Id: mss_generic_shmoo.C,v 1.93 2015/02/16 19:59:13 sglancy Exp $
+// $Id: mss_generic_shmoo.C,v 1.100 2015/08/26 16:18:49 sasethur Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_generic_shmoo.C,v $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -34,14 +34,21 @@
// *! DESCRIPTION : Memory Subsystem Generic Shmoo -- abstraction for HB
// *! CONTEXT : To make all shmoos share a common abstraction layer
// *!
-// *! OWNER NAME : Abhijit Saurabh Email: abhijit.saurabh@in.ibm.com
-// *! BACKUP NAME : Siddharth Vijay Email: sidvijay@in.ibm.com
+// *! OWNER NAME : Preetham Hosmane Email: preeragh@in.ibm.com
+// *! BACKUP NAME : Saravanan Sethuraman
// *!
// *!***************************************************************************
// CHANGE HISTORY:
//------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|---------|--------------------------------------------------
+// 2.00 |preeragh|25-Aug-15| More FW Review Comments
+// 1.99 |preeragh|25-Aug-15| More FW Review Comments
+// 1.98 |preeragh|19-Aug-15| FW Review Comments
+// 1.97 |preeragh|11-Aug-15| Removed -composite/bin dependency for WRT_DQS
+// 1.96 |preeragh|05-Aug-15| Optimized for Linear / Comp / Bin Schmoos
+// 1.95 |preeragh|22-Jul-15| 64bit compile fix
+// 1.94 |preeragh|22-Jun-15| DDR4 Enhancements and Optimizations
// 1.93 |sglancy |16-Feb-15| Merged FW comments with lab needs
// 1.92 |preeragh|15-Dec-14| Reverted Changes to v.1.87
// 1.88 |rwheeler|10-Nov-14| Updated setup_mcbist for added variable.
@@ -64,38 +71,7 @@
// 1.69 |abhijit |12-sep-13| Fixed binary debug prints
// 1.68 |abhijit |11-sep-13| Added Binary Schmoo algorithm
// 1.67 |abhijit |4-sep-13 | fixed fw comment
-// 1.65 |abhijit |8-aug-13 | added binary schmoo first phase and modified training call
-// 1.64 |abhijit |17-jul-13| added rd dqs phase 2
-// 1.63 |abhijit |19-jun-13| fixed warnings in schmoo
-// 1.61 |abhijit |11-jun-13| added read dqs and removed prints and single mcbist setup
-// 1.59 |abhijit |26-may-13| removed unnecessary prints
-// 1.57 |abhijit |21-may-13| fixed DQS report printing
-// 1.56 |abhijit |14-may-13| Updated call to setup_mcbist
-// 1.55 |abhijit |10-may-13| fixed firmware review comments
-// 1.51 |abhijit |10-may-13| optimized write dqs schmoo
-// 1.49 |abhijit |8-may-13 | Changed Write dqs reporting and optimized schmoo for running faster
-// 1.48 |sauchadh|7-may-13 | Added ping pong for wr_dqs shmoo
-// 1.45 |abhijit |04/25/13 | added test type SIMPLE_FIX_RF and SHMOO_STRESS
-// 1.40 |abhijit |03/22/13 | Fixed boundary checks
-// 1.38 |abhijit |03/19/13 | included spare byte and ECC and fixed printing for RD_EYE
-// 1.36 |abhijit |03/19/13 | changed mcbist call position
-// 1.35 |abhijit |03/16/13 | fixed clearing of error map regs for mba23
-// 1.32 |abhijit |03/12/13 | new parallel schmoo under dev
-// 1.27 |abhijit |01/21/13 | fixed ISDIMM mapping need some workaround
-// 1.26 |abhijit |01/21/13 | fixed fw comments
-// 1.25 |abhijit |01/21/13 | fixed the constructor definition
-// 1.21 |sasethur|01/17/13 | Updated for sanity mcbist function
-// 1.20 |abhijit |01/11/13 | Updated for change in setup_mcbist function
-// 1.19 |aditya |01/07/13 | Updated for change in setup_mcbist function
-// 1.18 |sasethur|14-DEC-12| Updated for change in access delay function
-// 1.16 |sasethur|14-DEC-12| Updated for Warning
-// 1.15 |abhijit |13-DEC-12| Updated for FW review comments
-// 1.14 |abhijit |06-DEC-12| Fixed more FW review comments
-// 1.12 |abhijit |15-Nov-12| Fixed FW review comments
-// 1.11 |abhijit |29-Oct-12| added change for ISDIMM checker DQS.
-// 1.9 |abhijit |22-Oct-12| added Write and read DQS.
-// 1.8 |abhijit |15-Oct-12| Updated multiple changes
-// 1.0 |varkeykv|27-Sep-11| Initial check in
+// - - - -
//------------------------------------------------------------------------------
#include <fapi.H>
#include "mss_generic_shmoo.H"
@@ -108,4239 +84,4231 @@
extern "C"
{
-using namespace fapi;
-
-// START IMPLEMENTATION OF generic_shmoo CLASS METHODS
-//! shmoo_mask - What shmoos do you want to run ... encoded as Hex 0x2,0x4,0x8,0x16
-/*------------------------------------------------------------------------------
- * constructor: generic_shmoo
- * Description :Constructor used to initialize variables and do the initial settings
- *
- * Parameters: i_target: mba; iv_port: 0, 1
- * ---------------------------------------------------------------------------*/
-generic_shmoo::generic_shmoo(uint8_t addr,
- shmoo_type_t shmoo_mask,
- shmoo_algorithm_t shmoo_algorithm)
-{
- this->shmoo_mask = shmoo_mask; //! Sets what Shmoos the caller wants to run
- this->algorithm = shmoo_algorithm;
- this->iv_addr = addr;
-
- //iv_MAX_RANKS=8;
- iv_MAX_BYTES = 10;
- iv_SHMOO_ON = 0;
- iv_pattern = 0;
- iv_test_type = 0;
- iv_dmm_type = 0;
- iv_shmoo_param = 0;
- iv_binary_diff = 2;
- iv_vref_mul = 0;
-
- for (int i = 0; i < MAX_RANK; ++i)
- {
- valid_rank[i] = 0;
- }
-
- for (int p = 0; p < MAX_PORT; ++p)
- {
- iv_MAX_RANKS[p] = 4;
- }
-
- FAPI_DBG("mss_generic_shmoo : constructor running for shmoo type %d", shmoo_mask);
- iv_shmoo_type = 0;
-
- if (shmoo_mask == TEST_NONE)
- {
- FAPI_INF("mss_generic_shmoo : NONE selected %d", shmoo_mask);
- }
-
- if (shmoo_mask == WR_EYE)
- {
- FAPI_INF("mss_generic_shmoo : WR_EYE selected %d", shmoo_mask);
- iv_shmoo_type = 0;
- }
- if (shmoo_mask == RD_EYE)
- {
- FAPI_INF("mss_generic_shmoo : RD_EYE selected %d", shmoo_mask);
- iv_shmoo_type = 1;
- }
- if (shmoo_mask == WRT_DQS)
- {
- FAPI_INF("mss_generic_shmoo : WRT_DQS selected %d", shmoo_mask);
- iv_shmoo_type = 3;
- }
-
- for (int k = 0; k < MAX_SHMOO; ++k)
- {
- for (int i = 0; i < MAX_PORT; ++i)
- {
- for (int j = 0; j < iv_MAX_RANKS[i]; ++j)
- {
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.nom_val, 250);
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.lb_regval, 0);
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.rb_regval, 512);
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.last_pass, 0);
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.last_fail, 0);
- init_multi_array(SHMOO[k].MBA.P[i].S[j].K.curr_val, 0);
- }
- }
- }
-}
-
-/*------------------------------------------------------------------------------
- * Function: run
- * Description : ! Delegator function that runs shmoo using other functions
- *
- * Parameters: i_target: mba; iv_port: 0, 1
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::run(const fapi::Target & i_target,
- uint32_t *o_right_min_margin,
- uint32_t *o_left_min_margin,
- uint32_t i_vref_mul)
-{
- fapi::ReturnCode rc;
- uint8_t num_ranks_per_dimm[2][2];
- uint8_t l_attr_eff_dimm_type_u8 = 0;
- uint8_t l_attr_schmoo_test_type_u8 = 0;
- uint8_t l_attr_schmoo_multiple_setup_call_u8 = 0;
- uint8_t l_mcbist_prnt_off = 0;
-
- uint64_t i_content_array[10];
- uint8_t l_rankpgrp0[2] = { 0 };
- uint8_t l_rankpgrp1[2] = { 0 };
- uint8_t l_rankpgrp2[2] = { 0 };
- uint8_t l_rankpgrp3[2] = { 0 };
- uint8_t l_totrg_0 = 0;
- uint8_t l_totrg_1 = 0;
- uint8_t l_pp = 0;
- uint8_t l_shmoo_param = 0;
-
- rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_MODE, &i_target, l_shmoo_param);
- if (rc) return rc;
- iv_shmoo_param = l_shmoo_param;
- iv_vref_mul = i_vref_mul;
-
- ecmdDataBufferBase l_data_buffer1_64(64);
- uint8_t l_dram_width = 0;
-
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_dram_width);
- if (rc) return rc;
-
- rc = FAPI_ATTR_SET(ATTR_MCBIST_PRINTING_DISABLE, &i_target, l_mcbist_prnt_off);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target, num_ranks_per_dimm);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target, l_attr_schmoo_test_type_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target, l_attr_schmoo_multiple_setup_call_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP0, &i_target, l_rankpgrp0);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP1, &i_target, l_rankpgrp1);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP2, &i_target, l_rankpgrp2);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP3, &i_target, l_rankpgrp3);
- if (rc) return rc;
-
- iv_MAX_RANKS[0] = num_ranks_per_dimm[0][0] + num_ranks_per_dimm[0][1];
- iv_MAX_RANKS[1] = num_ranks_per_dimm[1][0] + num_ranks_per_dimm[1][1];
-
- iv_pattern = 0;
- iv_test_type = 0;
-
- if (l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
- {
- iv_MAX_BYTES = 10;
- }
- else
- {
- iv_dmm_type = 1;
- iv_MAX_BYTES = 9;
- }
-
- //FAPI_INF(" Abhijit iv_dimm_type=%d and attribute=%d ",iv_dmm_type,l_attr_eff_dimm_type_u8);
- FAPI_DBG("mss_generic_shmoo : run() for shmoo type %d", shmoo_mask);
- // Check if all bytes/bits are in a pass condition initially .Otherwise quit
- if (l_attr_schmoo_test_type_u8 == 0)
- {
- FAPI_INF("%s:This procedure wont change any delay settings",
- i_target.toEcmdString());
- return rc;
- }
- if (l_attr_schmoo_test_type_u8 == 1)
- {
- rc = sanity_check(i_target); // Run MCBIST only when ATTR_EFF_SCHMOO_TEST_VALID is mcbist only
-
- if (!rc.ok())
- {
- FAPI_ERR("generic_shmoo::run MSS Generic Shmoo failed initial Sanity Check. Memory not in an all pass Condition");
- return rc;
- }
- }
- else if (l_attr_schmoo_test_type_u8 == 8)
- {
- if (l_rankpgrp0[0] != 255)
- {
- l_totrg_0++;
- }
- if (l_rankpgrp1[0] != 255)
- {
- l_totrg_0++;
- }
- if (l_rankpgrp2[0] != 255)
- {
- l_totrg_0++;
- }
- if (l_rankpgrp3[0] != 255)
- {
- l_totrg_0++;
- }
- if (l_rankpgrp0[1] != 255)
- {
- l_totrg_1++;
- }
- if (l_rankpgrp1[1] != 255)
- {
- l_totrg_1++;
- }
- if (l_rankpgrp2[1] != 255)
- {
- l_totrg_1++;
- }
- if (l_rankpgrp3[1] != 255)
- {
- l_totrg_1++;
- }
- if ((l_totrg_0 == 1) || (l_totrg_1 == 1))
- {
- shmoo_save_rest(i_target, i_content_array, 0);
- l_pp = 1;
- }
-
- if (l_pp == 1)
- {
- FAPI_INF("%s:Ping pong is disabled", i_target.toEcmdString());
- }
- else
- {
- FAPI_INF("%s:Ping pong is enabled", i_target.toEcmdString());
- }
-
- if ((l_pp = 1) && ((l_totrg_0 == 1) || (l_totrg_1 == 1)))
- {
- FAPI_INF("%s:Rank group is not good with ping pong. Hope you have set W2W gap to 10",
- i_target.toEcmdString());
- }
+ using namespace fapi;
+
+ // START IMPLEMENTATION OF generic_shmoo CLASS METHODS
+ //! shmoo_mask - What shmoos do you want to run ... encoded as Hex 0x2,0x4,0x8,0x16
+ /*------------------------------------------------------------------------------
+* constructor: generic_shmoo
+* Description :Constructor used to initialize variables and do the initial settings
+*
+@param uint8_t addr:
+@param shmoo_type_t shmoo_mask:
+@param shmoo_algorithm_t shmoo_algorithm:
+* ---------------------------------------------------------------------------*/
+ generic_shmoo::generic_shmoo(uint8_t addr,shmoo_type_t shmoo_mask,shmoo_algorithm_t shmoo_algorithm)
+ {
+ this->shmoo_mask=shmoo_mask; //! Sets what Shmoos the caller wants to run
+ this->algorithm=shmoo_algorithm ;
+ this->iv_shmoo_type = shmoo_mask;
+ this->iv_addr=addr;
+ iv_MAX_BYTES=10;
+ iv_DQS_ON=0;
+ iv_pattern=0;
+ iv_test_type=0;
+ iv_dmm_type=0;
+ iv_shmoo_param=0;
+ iv_binary_diff=2;
+ iv_vref_mul=0;
+ iv_SHMOO_ON = 0;
+
+ for(int p=0;p<MAX_PORT;p++)
+ {
+ for(int i=0;i<MAX_RANK;i++)
+ {
+ valid_rank1[p][i]=0;
+ valid_rank[i]=0;
+ }
+ }
+ iv_MAX_RANKS[0]=4;
+ iv_MAX_RANKS[1]=4;
- rc = get_all_noms_dqs(i_target);
- if (rc) return rc;
+ if (shmoo_mask & TEST_NONE)
+ {
+ FAPI_INF("mss_generic_shmoo : NONE selected %d", shmoo_mask);
+ }
- rc = get_all_noms(i_target);
- if (rc) return rc;
- rc = schmoo_setup_mcb(i_target);
- if (rc) return rc;
+ if (shmoo_mask & MCBIST)
+ {
+ FAPI_INF("mss_generic_shmoo : MCBIST selected %d", shmoo_mask);
+ iv_shmoo_type = 1;
+ }
+ if (shmoo_mask & WR_EYE)
+ {
+ FAPI_INF("mss_generic_shmoo : WR_EYE selected %d", shmoo_mask);
+ iv_shmoo_type = 2;
+ }
+
+ if (shmoo_mask & RD_EYE)
+ {
+ FAPI_INF("mss_generic_shmoo : RD_EYE selected %d", shmoo_mask);
+ iv_shmoo_type = 8;
+ }
+ if (shmoo_mask & WRT_DQS)
+ {
+ FAPI_INF("mss_generic_shmoo : WRT_DQS selected %d", shmoo_mask);
+ iv_shmoo_type = 4;
+ iv_DQS_ON = 1;
+ }
- //sanity check
- //rc = sanity_check(i_target);
- //if (rc) return rc;
+ if(iv_DQS_ON==1){
+ for (int k = 0; k < MAX_SHMOO;k++)
+ {
+ for (int i = 0; i < MAX_PORT;i++)
+ {
+ for (int j = 0; j < iv_MAX_RANKS[i];j++)
+ {
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.nom_val, 250);
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.lb_regval, 0);
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.rb_regval, 512);
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.last_pass, 0);
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.last_fail, 0);
+ init_multi_array(SHMOO[k].MBA.P[i].S[j].K.curr_val, 0);
+ }
+ }
+ }
+ }
+ }
+
+ /*------------------------------------------------------------------------------
+* Function: run
+* Description : ! Delegator function that runs shmoo using other functions
+*
+* Parameters: i_target: mba; iv_port: 0, 1
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::run(const fapi::Target & i_target,
+ uint32_t *o_right_min_margin,
+ uint32_t *o_left_min_margin,
+ uint32_t i_vref_mul)
+ {
+ fapi::ReturnCode rc;
+ uint8_t num_ranks_per_dimm[2][2];
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t l_attr_schmoo_test_type_u8 = 0;
+ uint8_t l_attr_schmoo_multiple_setup_call_u8 = 0;
+ uint8_t l_mcbist_prnt_off = 0;
+ uint64_t i_content_array[10];
+ uint8_t l_rankpgrp0[2] = { 0 };
+ uint8_t l_rankpgrp1[2] = { 0 };
+ uint8_t l_rankpgrp2[2] = { 0 };
+ uint8_t l_rankpgrp3[2] = { 0 };
+ uint8_t l_totrg_0 = 0;
+ uint8_t l_totrg_1 = 0;
+ uint8_t l_pp = 0;
+ uint8_t l_shmoo_param = 0;
+ uint8_t rank_table_port0[8] = {0};
+ uint8_t rank_table_port1[8] = {0};
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_MODE, &i_target, l_shmoo_param);
+ if (rc) return rc;
+ iv_shmoo_param = l_shmoo_param;
+ FAPI_INF(" +++++ The iv_shmoo_param = %d ++++ ",iv_shmoo_param);
+ iv_vref_mul = i_vref_mul;
+
+ ecmdDataBufferBase l_data_buffer1_64(64);
+ uint8_t l_dram_width = 0;
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_dram_width); if(rc) return rc;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_PRINTING_DISABLE, &i_target, l_mcbist_prnt_off); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target, num_ranks_per_dimm); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_TEST_VALID, &i_target, l_attr_schmoo_test_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_SCHMOO_MULTIPLE_SETUP_CALL, &i_target, l_attr_schmoo_multiple_setup_call_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP0, &i_target, l_rankpgrp0);if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP1, &i_target, l_rankpgrp1);if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP2, &i_target, l_rankpgrp2);if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_PRIMARY_RANK_GROUP3, &i_target, l_rankpgrp3);if(rc) return rc;
+
+ iv_MAX_RANKS[0]=num_ranks_per_dimm[0][0]+num_ranks_per_dimm[0][1];
+ iv_MAX_RANKS[1]=num_ranks_per_dimm[1][0]+num_ranks_per_dimm[1][1];
+ iv_pattern=0;
+ iv_test_type=0;
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
+ {
+ iv_MAX_BYTES=10;
+ }
+ else
+ {
- //Find RIGHT BOUND OR SETUP BOUND
- rc = find_bound(i_target, RIGHT);
- if (rc) return rc;
-
- //Find LEFT BOUND OR HOLD BOUND
- rc = find_bound(i_target, LEFT);
- if (rc) return rc;
-
- if (l_dram_width == 4)
- {
- rc = get_margin_dqs_by4(i_target);
- if (rc) return rc;
- }
- else
- {
- rc = get_margin_dqs_by8(i_target);
- if (rc) return rc;
- }
-
- rc = print_report_dqs(i_target);
- if (rc) return rc;
+ iv_dmm_type=1;
+ iv_MAX_BYTES=9;
+ }
+ uint8_t i_rp = 0;
+
+ for (int l_rnk=0;l_rnk< iv_MAX_RANKS[0];l_rnk++)
+ {// Byte loop
+ rc = mss_getrankpair(i_target,0,0,&i_rp,rank_table_port0);if(rc) return rc;
+ }
+
+ for (int l_rnk=0;l_rnk< iv_MAX_RANKS[0];l_rnk++)
+ {// Byte loop
+ rc = mss_getrankpair(i_target,1,0,&i_rp,rank_table_port1);if(rc) return rc;
+ }
+
+ for(int l_p =0; l_p < 2; l_p++)
+ {
+ for (int l_rnk=0;l_rnk < 8;l_rnk++)
+ {// Byte loop
+ if(l_p == 0)
+ valid_rank1[l_p][l_rnk] = rank_table_port0[l_rnk];
+ else
+ valid_rank1[l_p][l_rnk] = rank_table_port1[l_rnk];
+
+ FAPI_INF("PORT - %d - RANK %d\n",l_p,valid_rank1[l_p][l_rnk]);
+ }
+ }
+ FAPI_DBG("mss_generic_shmoo : run() for shmoo type %d", shmoo_mask);
+ // Check if all bytes/bits are in a pass condition initially .Otherwise quit
+
+ //Value of l_attr_schmoo_test_type_u8 are 0x01, 0x02, 0x04, 0x08, 0x10 ===
+ // "MCBIST","WR_EYE","RD_EYE","WRT_DQS","RD_DQS" resp.
+
+ if (l_attr_schmoo_test_type_u8 == 0)
+ {
+ FAPI_INF("%s:This procedure wont change any delay settings",
+ i_target.toEcmdString());
+ return rc;
+ }
+ if (l_attr_schmoo_test_type_u8 == 1)
+ {
+ rc = sanity_check(i_target); // Run MCBIST only when ATTR_EFF_SCHMOO_TEST_VALID is mcbist only
+
+ if (!rc.ok())
+ {
+ FAPI_ERR("generic_shmoo::run MSS Generic Shmoo failed initial Sanity Check. Memory not in an all pass Condition");
+ return rc;
+ }
+ }
+ else if (l_attr_schmoo_test_type_u8 == 8)
+ {
+ if (l_rankpgrp0[0] != 255)
+ {
+ l_totrg_0++;
+ }
+ if (l_rankpgrp1[0] != 255)
+ {
+ l_totrg_0++;
+ }
+ if (l_rankpgrp2[0] != 255)
+ {
+ l_totrg_0++;
+ }
+ if (l_rankpgrp3[0] != 255)
+ {
+ l_totrg_0++;
+ }
+ if (l_rankpgrp0[1] != 255)
+ {
+ l_totrg_1++;
+ }
+ if (l_rankpgrp1[1] != 255)
+ {
+ l_totrg_1++;
+ }
+ if (l_rankpgrp2[1] != 255)
+ {
+ l_totrg_1++;
+ }
+ if (l_rankpgrp3[1] != 255)
+ {
+ l_totrg_1++;
+ }
+ if ((l_totrg_0 == 1) || (l_totrg_1 == 1))
+ {
+ rc = shmoo_save_rest(i_target, i_content_array, 0); if(rc) return rc;
+ l_pp = 1;
+ }
- rc = get_min_margin_dqs(i_target, o_right_min_margin,
- o_left_min_margin);
- if (rc) return rc;
+ if (l_pp == 1)
+ {
+ FAPI_INF("%s:Ping pong is disabled", i_target.toEcmdString());
+ }
+ else
+ {
+ FAPI_INF("%s:Ping pong is enabled", i_target.toEcmdString());
+ }
- if ((l_totrg_0 == 1) || (l_totrg_1 == 1))
- {
- shmoo_save_rest(i_target, i_content_array, 1);
- }
+ if ((l_pp = 1) && ((l_totrg_0 == 1) || (l_totrg_1 == 1)))
+ {
+ FAPI_INF("%s:Rank group is not good with ping pong. Hope you have set W2W gap to 10",
+ i_target.toEcmdString());
+ }
- FAPI_INF("%s: Least tDQSSmin(ps)=%d ps and Least tDQSSmax=%d ps",
- i_target.toEcmdString(), *o_left_min_margin,
- *o_right_min_margin);
- }
- else
- {
- rc = get_all_noms(i_target);
- if (rc) return rc;
- if (l_attr_schmoo_multiple_setup_call_u8 == 0)
- {
- rc = schmoo_setup_mcb(i_target);
- if (rc) return rc;
+ iv_shmoo_type=4; //for Gate Delays
+ rc=get_all_noms_dqs(i_target);if(rc) return rc;
+
+ iv_shmoo_type=2; // For Access delays
+ rc=get_all_noms(i_target);if(rc) return rc;
+
+ rc=schmoo_setup_mcb(i_target);if(rc) return rc;
+ //Find RIGHT BOUND OR SETUP BOUND
+ rc=find_bound(i_target,RIGHT);if(rc) return rc;
+
+ //Find LEFT BOUND OR HOLD BOUND
+ rc=find_bound(i_target,LEFT);if(rc) return rc;
+ iv_shmoo_type=4;
- rc = sanity_check(i_target);
- if (rc) return rc;
-
- }
- rc = set_all_binary(i_target, RIGHT);
- if (rc) return rc;
- //Find RIGHT BOUND OR SETUP BOUND
-
- rc = find_bound(i_target, RIGHT);
- if (rc) return rc;
-
- rc = set_all_binary(i_target, LEFT);
- if (rc) return rc;
- //Find LEFT BOUND OR HOLD BOUND
- rc = find_bound(i_target, LEFT);
- if (rc) return rc;
- //Find the margins in Ps i.e setup margin ,hold margin,Eye width
- rc = get_margin(i_target);
- if (rc) return rc;
- //It is used to find the lowest of setup and hold margin
- rc = get_min_margin(i_target, o_right_min_margin, o_left_min_margin);
- if (rc) return rc;
- // It is used to print the schmoo report
- rc = print_report(i_target);
- if (rc) return rc;
-
- FAPI_INF("%s:Minimum hold margin=%d ps and setup margin=%d ps",
- i_target.toEcmdString(), *o_left_min_margin,
- *o_right_min_margin);
- }
- l_mcbist_prnt_off = 0;
- rc = FAPI_ATTR_SET(ATTR_MCBIST_PRINTING_DISABLE, &i_target,
- l_mcbist_prnt_off);
- if (rc) return rc;
- return rc;
-}
-
-fapi::ReturnCode generic_shmoo::shmoo_save_rest(const fapi::Target & i_target,
- uint64_t i_content_array[],
- uint8_t i_mode)
-{
- ReturnCode rc;
- uint32_t rc_num;
- uint8_t l_index = 0;
- uint64_t l_value = 0;
- uint64_t l_val_u64 = 0;
- ecmdDataBufferBase l_shmoo1ab(64);
- uint64_t l_Databitdir[10] = { 0x800000030301143full, 0x800004030301143full,
- 0x800008030301143full, 0x80000c030301143full, 0x800010030301143full,
- 0x800100030301143full, 0x800104030301143full, 0x800108030301143full,
- 0x80010c030301143full, 0x800110030301143full };
- if (i_mode == 0)
- {
- FAPI_INF("%s: Saving DP18 data bit direction register contents",
- i_target.toEcmdString());
- for (l_index = 0; l_index < MAX_BYTE; l_index++)
- {
- l_value = l_Databitdir[l_index];
- rc = fapiGetScom(i_target, l_value, l_shmoo1ab);
- if (rc) return rc;
- rc_num = l_shmoo1ab.setBit(57);
- rc = fapiPutScom(i_target, l_value, l_shmoo1ab);
- if (rc) return rc;
- i_content_array[l_index] = l_shmoo1ab.getDoubleWord(0);
- }
- }
- else if (i_mode == 1)
- {
- FAPI_INF("%s: Restoring DP18 data bit direction register contents",
- i_target.toEcmdString());
- for (l_index = 0; l_index < MAX_BYTE; l_index++)
- {
- l_val_u64 = i_content_array[l_index];
- l_value = l_Databitdir[l_index];
- rc_num = l_shmoo1ab.setDoubleWord(0, l_val_u64);
- if (rc_num)
- {
- FAPI_ERR("Error in function shmoo_save_rest:");
- rc.setEcmdError(rc_num);
- return rc;
- }
- rc = fapiPutScom(i_target, l_value, l_shmoo1ab);
- if (rc) return rc;
- }
- }
- else
- {
- FAPI_INF("%s:Invalid value of MODE", i_target.toEcmdString());
- }
- return rc;
-}
-
-/*------------------------------------------------------------------------------
- * Function: sanity_check
- * Description : do intial mcbist check in nominal and report spd if any bad bit found
- *
- * Parameters: i_target: mba;
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::sanity_check(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- mcbist_mode = QUARTER_SLOW;
+ if (l_dram_width == 4)
+ {
+ rc = get_margin_dqs_by4(i_target);
+ if (rc) return rc;
+ }
+ else
+ {
+ rc = get_margin_dqs_by8(i_target);
+ if (rc) return rc;
+ }
- uint8_t l_mcb_status = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- uint8_t l_byte, l_rnk;
- uint8_t l_nibble;
- uint8_t l_n = 0;
- uint8_t l_p = 0;
- uint8_t i_rp = 0;
- uint8_t rank = 0;
- uint8_t l_faulted_rank = 255;
- uint8_t l_faulted_port = 255;
- uint8_t l_faulted_dimm = 255;
- uint8_t l_memory_health = 0;
- uint8_t l_max_byte = 10;
- //uint8_t l_max_nibble = 20;
+ rc = print_report_dqs(i_target);
+ if (rc) return rc;
- struct Subtest_info l_sub_info[30];
+ rc = get_min_margin_dqs(i_target, o_right_min_margin,o_left_min_margin);
+ if (rc) return rc;
- rc = schmoo_setup_mcb(i_target);
- if (rc) return rc;
- //FAPI_INF("%s: starting mcbist now",i_target.toEcmdString());
- rc = start_mcb(i_target);
- if (rc) return rc;
- //FAPI_INF("%s: polling mcbist now",i_target.toEcmdString());
- rc = poll_mcb(i_target, &l_mcb_status, l_sub_info, 1);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: POLL MCBIST failed !!");
- return rc;
- }
- //FAPI_INF("%s: checking error map ",i_target.toEcmdString());
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc) return rc;
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rnk];
+ if ((l_totrg_0 == 1) || (l_totrg_1 == 1))
+ {
+ rc = shmoo_save_rest(i_target, i_content_array, 1); if(rc) return rc;
+ }
- l_n = 0;
- for (l_byte = 0; l_byte < l_max_byte; ++l_byte)
- {
- //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- if (mcbist_error_map[l_p][l_rnk][l_byte][l_nibble] == 1)
- {
+ FAPI_INF("%s: Least tDQSSmin(ps)=%d ps and Least tDQSSmax=%d ps",i_target.toEcmdString(), *o_left_min_margin,*o_right_min_margin);
+ }
+ else
+ {
+ FAPI_INF("************ ++++++++++++++++++ ***************** +++++++++++++ *****************");
+ rc=get_all_noms(i_target);if(rc) return rc;
+ if(l_attr_schmoo_multiple_setup_call_u8==0){
+ rc=schmoo_setup_mcb(i_target);if(rc) return rc;
+ }
+ rc=set_all_binary(i_target,RIGHT);if(rc) return rc;
+
+ //Find RIGHT BOUND OR SETUP BOUND
+ rc=find_bound(i_target,RIGHT);if(rc) return rc;
+ rc=set_all_binary(i_target,LEFT);if(rc) return rc;
+ //Find LEFT BOUND OR HOLD BOUND
+ rc=find_bound(i_target,LEFT);if(rc) return rc;
+
+ //Find the margins in Ps i.e setup margin ,hold margin,Eye width
+ rc=get_margin2(i_target);if(rc) return rc;
+ //It is used to find the lowest of setup and hold margin
+ if(iv_shmoo_param==6)
+ {
+
+ rc=get_min_margin2(i_target,o_right_min_margin,o_left_min_margin);if(rc) return rc;
+ rc=print_report(i_target);if(rc) return rc;
+ FAPI_INF("%s:Minimum hold margin=%d ps and setup margin=%d ps",i_target.toEcmdString(), *o_left_min_margin,*o_right_min_margin);
+ }
+ else
+ {
+ rc=get_min_margin2(i_target,o_right_min_margin,o_left_min_margin);if(rc) return rc;
+ rc=print_report(i_target);if(rc) return rc;
+ FAPI_INF("%s:Minimum hold margin=%d ps and setup margin=%d ps",i_target.toEcmdString(), *o_left_min_margin,*o_right_min_margin);
+ }
+ }
+ l_mcbist_prnt_off=0;
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_PRINTING_DISABLE, &i_target, l_mcbist_prnt_off); if(rc) return rc;
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::shmoo_save_rest(const fapi::Target & i_target,
+ uint64_t i_content_array[],
+ uint8_t i_mode)
+ {
+ ReturnCode rc;
+ uint32_t rc_num;
+ uint8_t l_index = 0;
+ uint64_t l_value = 0;
+ uint64_t l_val_u64 = 0;
+ ecmdDataBufferBase l_shmoo1ab(64);
+ uint64_t l_Databitdir[10] = { 0x800000030301143full, 0x800004030301143full,
+ 0x800008030301143full, 0x80000c030301143full, 0x800010030301143full,
+ 0x800100030301143full, 0x800104030301143full, 0x800108030301143full,
+ 0x80010c030301143full, 0x800110030301143full };
+ if (i_mode == 0)
+ {
+ FAPI_INF("%s: Saving DP18 data bit direction register contents",
+ i_target.toEcmdString());
+ for (l_index = 0; l_index < MAX_BYTE; l_index++)
+ {
+ l_value = l_Databitdir[l_index];
+ rc = fapiGetScom(i_target, l_value, l_shmoo1ab);
+ if (rc) return rc;
+ rc_num = l_shmoo1ab.setBit(57);
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function shmoo_save_rest:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target, l_value, l_shmoo1ab);
+ if (rc) return rc;
+ i_content_array[l_index] = l_shmoo1ab.getDoubleWord(0);
+ }
+ }
+ else if (i_mode == 1)
+ {
+ FAPI_INF("%s: Restoring DP18 data bit direction register contents",
+ i_target.toEcmdString());
+ for (l_index = 0; l_index < MAX_BYTE; l_index++)
+ {
+ l_val_u64 = i_content_array[l_index];
+ l_value = l_Databitdir[l_index];
+ rc_num = l_shmoo1ab.setDoubleWord(0, l_val_u64);
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function shmoo_save_rest:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target, l_value, l_shmoo1ab);
+ if (rc) return rc;
+ }
+ }
+ else
+ {
+ FAPI_INF("%s:Invalid value of MODE", i_target.toEcmdString());
+ }
+ return rc;
+ }
+
+ /*------------------------------------------------------------------------------
+* Function: sanity_check
+* Description : do intial mcbist check in nominal and report spd if any bad bit found
+*
+* Parameters: i_target: mba;
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::sanity_check(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ mcbist_mode = QUARTER_SLOW;
+ uint8_t l_mcb_status = 0;
+ uint8_t l_CDarray0[80] = { 0 };
+ uint8_t l_CDarray1[80] = { 0 };
+ uint8_t l_byte, l_rnk;
+ uint8_t l_nibble;
+ uint8_t l_n = 0;
+ uint8_t l_p = 0;
+ uint8_t rank = 0;
+ uint8_t l_faulted_rank = 255;
+ uint8_t l_faulted_port = 255;
+ uint8_t l_faulted_dimm = 255;
+ uint8_t l_memory_health = 0;
+ uint8_t l_max_byte = 10;
+
+ struct Subtest_info l_sub_info[30];
+
+ rc = schmoo_setup_mcb(i_target);
+ if (rc) return rc;
+ //FAPI_INF("%s: starting mcbist now",i_target.toEcmdString());
+ rc = start_mcb(i_target);
+ if (rc) return rc;
+ //FAPI_INF("%s: polling mcbist now",i_target.toEcmdString());
+ rc = poll_mcb(i_target, &l_mcb_status, l_sub_info, 1);
+ if (rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: POLL MCBIST failed !!");
+ return rc;
+ }
+ //FAPI_INF("%s: checking error map ",i_target.toEcmdString());
+ rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
+ count_bad_dq);
+ if (rc) return rc;
+
+ for (l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; l_rnk++)
+ {// Byte loop
+ rank = valid_rank1[l_p][l_rnk];
+
+ l_n = 0;
+ for (l_byte = 0; l_byte < l_max_byte; l_byte++)
+ {
+ //Nibble loop
+ for (l_nibble = 0; l_nibble < MAX_NIBBLES; l_nibble++)
+ {
+ if (mcbist_error_map[l_p][rank][l_byte][l_nibble] == 1)
+ {
l_memory_health = 1;
- l_faulted_rank = rank;
- l_faulted_port = l_p;
- if(rank>3){
- l_faulted_dimm = 1;
- }else{
- l_faulted_dimm = 0;
- }
- break;
- }
-
+ l_faulted_rank = rank;
+ l_faulted_port = l_p;
+ if(rank>3){
+ l_faulted_dimm = 1;
+ }else{
+ l_faulted_dimm = 0;
+ }
+ break;
+ }
+
l_n++;
+ }
}
}
+ }
+
+
+ //////////////// changed the check condition ... The error call out need to gard the dimm=l_faulted_dimm(0 or 1) //// port=l_faulted_port(0 or 1) target=i_target ...
+ if (l_memory_health)
+ {
+ FAPI_INF("generic_shmoo:sanity_check failed !! MCBIST failed on intial run , memory is not in good state needs investigation port=%d rank=%d dimm=%d",
+ l_faulted_port, l_faulted_rank, l_faulted_dimm);
+ const fapi::Target & MBA_CHIPLET = i_target;
+ const uint8_t & MBA_PORT_NUMBER = l_faulted_port;
+ const uint8_t & MBA_DIMM_NUMBER = l_faulted_dimm;
+ FAPI_SET_HWP_ERROR(rc, RC_MSS_GENERIC_SHMOO_MCBIST_FAILED);
+ return rc;
}
- }
-
-
- //////////////// changed the check condition ... The error call out need to gard the dimm=l_faulted_dimm(0 or 1) //// port=l_faulted_port(0 or 1) target=i_target ...
- if (l_memory_health)
- {
- FAPI_INF("generic_shmoo:sanity_check failed !! MCBIST failed on intial run , memory is not in good state needs investigation port=%d rank=%d dimm=%d",
- l_faulted_port, l_faulted_rank, l_faulted_dimm);
- const fapi::Target & MBA_CHIPLET = i_target;
- const uint8_t & MBA_PORT_NUMBER = l_faulted_port;
- const uint8_t & MBA_DIMM_NUMBER = l_faulted_dimm;
- FAPI_SET_HWP_ERROR(rc, RC_MSS_GENERIC_SHMOO_MCBIST_FAILED);
- return rc;
- }
-
- return rc;
-}
-/*------------------------------------------------------------------------------
- * Function: do_mcbist_reset
- * Description : do mcbist reset
- *
- * Parameters: i_target: mba,iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::do_mcbist_reset(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- uint32_t rc_num = 0;
-
- Target i_target_centaur;
- rc = fapiGetParentChip(i_target, i_target_centaur);
- if (rc) return rc;
-
- ecmdDataBufferBase l_data_buffer_64(64);
- rc_num = l_data_buffer_64.flushTo0();
- if (rc_num)
- {
- FAPI_ERR("Error in function mcb_reset_trap:");
- rc.setEcmdError(rc_num);
- return rc;
- }
- //PORT - A
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA1Q_0x0201166a, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA2Q_0x0201166b, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA3Q_0x0201166c, l_data_buffer_64);
- if (rc) return (rc);
-
- //PORT - B
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB1Q_0x0201166d, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB2Q_0x0201166e, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB3Q_0x0201166f, l_data_buffer_64);
- if (rc) return (rc);
- // MBS 23
- rc = fapiPutScom(i_target_centaur, 0x0201176a, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, 0x0201176b, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, 0x0201176c, l_data_buffer_64);
- if (rc) return (rc);
-
- //PORT - B
- rc = fapiPutScom(i_target_centaur, 0x0201176d, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, 0x0201176e, l_data_buffer_64);
- if (rc) return (rc);
- rc = fapiPutScom(i_target_centaur, 0x0201176f, l_data_buffer_64);
- if (rc) return (rc);
-
- return rc;
-}
-/*------------------------------------------------------------------------------
- * Function: do_mcbist_test
- * Description : do mcbist check for error on particular nibble
- *
- * Parameters: i_target: mba,iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::do_mcbist_test(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- uint8_t l_mcb_status = 0;
- struct Subtest_info l_sub_info[30];
-
- rc = start_mcb(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: Start MCBIST failed !!");
- return rc;
- }
- rc = poll_mcb(i_target, &l_mcb_status, l_sub_info, 1);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: POLL MCBIST failed !!");
- return rc;
- }
-
- return rc;
-
-}
-/*------------------------------------------------------------------------------
- * Function: check_error_map
- * Description : used by do_mcbist_test to check the error map for particular nibble
- *
- * Parameters: iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::check_error_map(const fapi::Target & i_target,
- uint8_t port,
- uint8_t &pass)
-{
-
- fapi::ReturnCode rc;
- uint8_t l_byte, l_rnk;
- uint8_t l_nibble;
- uint8_t l_byte_is;
- uint8_t l_nibble_is;
- uint8_t l_n = 0;
-
- pass = 1;
- uint8_t l_p = 0;
- input_type l_input_type_e = ISDIMM_DQ;
- uint8_t i_input_index_u8 = 0;
- uint8_t l_val = 0;
- uint8_t i_rp = 0;
- uint8_t rank = 0;
- uint8_t l_max_byte = 10;
- uint8_t l_max_nibble = 20;
- uint8_t l_i = 0;
- uint8_t l_dq = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- if (iv_dmm_type == 1)
- {
- l_max_byte = 9;
- l_max_nibble = 18;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rnk];
-
- l_n = 0;
- for (l_byte = 0; l_byte < l_max_byte; ++l_byte)
- {
- //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- if (iv_dmm_type == 1)
- {
- i_input_index_u8 = 8 * l_byte + 4 * l_nibble;
- //FAPI_INF("\n ISDIMM input byte=%d and nibble=%d and bit returned is %d \n",l_byte,l_nibble,l_val);
- rc = rosetta_map(i_target, l_p, l_input_type_e,
- i_input_index_u8, 0, l_val);
- if (rc) return rc;
- //FAPI_INF("\n ISDIMM input byte=%d and nibble=%d and bit returned is %d \n",l_byte,l_nibble,l_val);
- l_byte_is = l_val / 8;
-
- l_nibble_is = l_val % 8;
- if (l_nibble_is > 3)
- {
- l_nibble_is = 1;
- }
- else
- {
- l_nibble_is = 0;
- }
+ return rc;
+ }
+ /*------------------------------------------------------------------------------
+* Function: do_mcbist_reset
+* Description : do mcbist reset
+*
+* Parameters: i_target: mba,iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::do_mcbist_reset(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint32_t rc_num = 0;
+
+ Target i_target_centaur;
+ rc = fapiGetParentChip(i_target, i_target_centaur);
+ if (rc) return rc;
+
+ ecmdDataBufferBase l_data_buffer_64(64);
+ rc_num = l_data_buffer_64.flushTo0();
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function mcb_reset_trap:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ //PORT - A
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA1Q_0x0201166a, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA2Q_0x0201166b, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMA3Q_0x0201166c, l_data_buffer_64);
+ if (rc) return (rc);
+
+ //PORT - B
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB1Q_0x0201166d, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB2Q_0x0201166e, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, MBS_MCBIST01_MCBEMB3Q_0x0201166f, l_data_buffer_64);
+ if (rc) return (rc);
+
+ // MBS 23
+ rc = fapiPutScom(i_target_centaur, 0x0201176a, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, 0x0201176b, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, 0x0201176c, l_data_buffer_64);
+ if (rc) return (rc);
+
+ //PORT - B
+ rc = fapiPutScom(i_target_centaur, 0x0201176d, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, 0x0201176e, l_data_buffer_64);
+ if (rc) return (rc);
+ rc = fapiPutScom(i_target_centaur, 0x0201176f, l_data_buffer_64);
+ if (rc) return (rc);
+
+ return rc;
+ }
+ /*------------------------------------------------------------------------------
+* Function: do_mcbist_test
+* Description : do mcbist check for error on particular nibble
+*
+* Parameters: i_target: mba,iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::do_mcbist_test(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_mcb_status = 0;
+ struct Subtest_info l_sub_info[30];
+
+ rc = start_mcb(i_target);
+ if (rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: Start MCBIST failed !!");
+ return rc;
+ }
+ rc = poll_mcb(i_target, &l_mcb_status, l_sub_info, 1);
+ if (rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: POLL MCBIST failed !!");
+ return rc;
+ }
- if (mcbist_error_map[l_p][l_rnk][l_byte_is][l_nibble_is] == 1)
- {
- //pass=0;
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- else
- {
- if (iv_shmoo_param == 4)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
- else
- {
- if (mcbist_error_map[l_p][l_rnk][l_byte][l_nibble] == 1)
- {
- //pass=0;
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- else
- {
- if (iv_shmoo_param == 4)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
- l_n++;
- }
- }
- }
- }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rnk];
- for (l_n = 0; l_n < l_max_nibble; l_n++)
- {
+ return rc;
+
+ }
+ /*------------------------------------------------------------------------------
+* Function: check_error_map
+* Description : used by do_mcbist_test to check the error map for particular nibble
+*
+* Parameters: iv_port 0/1 , rank 0-7 , byte 0-7, nibble 0/1, pass;
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::check_error_map(const fapi::Target & i_target,
+ uint8_t l_p,
+ uint8_t &pass)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_byte,l_rnk;
+ uint8_t l_nibble;
+ uint8_t l_byte_is;
+ uint8_t l_nibble_is;
+ uint8_t l_n=0;
+ pass=1;
+ input_type l_input_type_e = ISDIMM_DQ;
+ uint8_t i_input_index_u8=0;
+ uint8_t l_val =0;
+ uint8_t rank=0;
+ uint8_t l_max_byte=10;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+
+ if(iv_dmm_type==1)
+ {
+ l_max_byte=9;
+ //l_max_nibble=18;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- l_dq=4* l_n;
-
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
-
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
-
- }
- }
- }
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- //FAPI_INF("\n the port=%d and nibble=%d and value for error map =%d \n",l_p,l_n,schmoo_error_map[l_p][rank][l_n]);
- pass = 0;
- }
- }
- }
- }
-
- return rc;
-}
-
-/*------------------------------------------------------------------------------
- * Function: init_multi_array
- * Description : This function do the initialization of various schmoo parameters
- *
- * Parameters: the array address and the initial value
- * ---------------------------------------------------------------------------*/
-void generic_shmoo::init_multi_array(uint16_t(&array)[MAX_DQ],
- uint16_t init_val)
-{
-
- uint8_t l_byte, l_nibble, l_bit;
- uint8_t l_dq = 0;
- // Byte loop
-
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- { //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- //Bit loop
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
- array[l_dq] = init_val;
- }
- }
- }
-
-}
-
-fapi::ReturnCode generic_shmoo::set_all_binary(const fapi::Target & i_target,
- bound_t bound)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk, l_byte, l_nibble, l_bit;
- uint8_t l_dq = 0;
- uint8_t l_p = 0;
- uint32_t l_max = 512;
- uint32_t l_max_offset = 64;
-
- if (iv_shmoo_type == 1)
- {
- l_max = 127;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- { //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- //Bit loop
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
-
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_pass[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq];
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq];
- if (bound == RIGHT)
- {
- if ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq]
- + l_max_offset) > l_max)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq] = l_max;
- }
- else
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq]
- + l_max_offset;
- //FAPI_INF("\n the last failure for right %d ",SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq][i_rp]);
- }
- }
- else
- {
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq]
- > 64)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq] - l_max_offset;
- //FAPI_INF("\n the last failure for left %d ",SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq][i_rp]);
- }
- else
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq] = 0;
- //FAPI_INF("\n the last failure for left %d ",SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.last_fail[l_dq][i_rp]);
- }
- }
- }
- }
- }
- }
- }
- return rc;
-}
-/*------------------------------------------------------------------------------
- * Function: get_all_noms
- * Description : This function gets the nominal values for each DQ
- *
- * Parameters: Target:MBA
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::get_all_noms(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
-
- uint8_t l_rnk, l_byte, l_nibble, l_bit;
- uint8_t i_rnk = 0;
- uint8_t i_rp = 0;
- uint16_t val = 0;
- uint8_t l_dq = 0;
- uint8_t l_p = 0;
-
- input_type_t l_input_type_e = WR_DQ;
- access_type_t l_access_type_e = READ;
- FAPI_DBG("mss_generic_shmoo : get_all_noms : Reading in all nominal values");
-
- if (iv_shmoo_type == 1)
- {
- l_input_type_e = RD_DQ;
- }
+ return rc;
+ }
+ // for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+ //////
+ rank=valid_rank1[l_p][l_rnk];
+
+ l_n=0;
+ for(l_byte=0;l_byte<l_max_byte;l_byte++)
+ {
+ //Nibble loop
+ for(l_nibble=0;l_nibble< MAX_NIBBLES;l_nibble++)
+ {
+ if(iv_dmm_type==1)
+ {
+ i_input_index_u8=8*l_byte+4*l_nibble;
+
+ rc=rosetta_map(i_target,l_p,l_input_type_e,i_input_index_u8,0,l_val);if(rc) return rc;
+
+ l_byte_is=l_val/8;
+ l_nibble_is=l_val%8;
+ if(l_nibble_is>3){
+ l_nibble_is=1;
+ }
+ else{
+ l_nibble_is=0;
+ }
+
+ if( mcbist_error_map [l_p][rank][l_byte_is][l_nibble_is] == 1){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ pass = 1;
+ }
+ else
+ {
+
+ schmoo_error_map[l_p][rank][l_n]=0;
+ pass = 0;
+ }
+ }
+ else {
+ if( mcbist_error_map [l_p][rank][l_byte][l_nibble] == 1){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ pass = 1;
+ }
+ else
+ {
+ schmoo_error_map[l_p][rank][l_n]=0;
+ pass = 0;
+ }
+ }
+ l_n++;
+ }//end of nibble loop
+ }//end byte loop
+ }//end rank loop
+ //}//end port loop
+
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::check_error_map2(const fapi::Target & i_target,uint8_t port,uint8_t &pass)
+ {
+
+ fapi::ReturnCode rc;
+ uint8_t l_byte,l_rnk;
+ uint8_t l_nibble;
+ uint8_t l_byte_is;
+ uint8_t l_nibble_is;
+ uint8_t l_n=0;
+ pass=1;
+ uint8_t l_p=0;
+ input_type l_input_type_e = ISDIMM_DQ;
+ uint8_t i_input_index_u8=0;
+ uint8_t l_val =0;
+ uint8_t rank=0;
+ uint8_t l_max_byte=10;
+ uint8_t l_max_nibble=20;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+
+
+
+ if(iv_dmm_type==1)
+ {
+ l_max_byte=9;
+ l_max_nibble=18;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+
+ rank=valid_rank1[l_p][l_rnk];
+
+ l_n=0;
+ for(l_byte=0;l_byte<l_max_byte;l_byte++)
+ {
+ //Nibble loop
+ for(l_nibble=0;l_nibble< MAX_NIBBLES;l_nibble++)
+ {
+ if(iv_dmm_type==1)
+ {
+ i_input_index_u8=8*l_byte+4*l_nibble;
+
+ rc=rosetta_map(i_target,l_p,l_input_type_e,i_input_index_u8,0,l_val);if(rc) return rc;
+
+ l_byte_is=l_val/8;
+ l_nibble_is=l_val%8;
+ if(l_nibble_is>3){
+ l_nibble_is=1;
+ }
+ else{
+ l_nibble_is=0;
+ }
+
+ if( mcbist_error_map [l_p][rank][l_byte_is][l_nibble_is] == 1){
+ //pass=0;
+ schmoo_error_map[l_p][rank][l_n]=1;
+
+ }
+ else
+ {
+
+ schmoo_error_map[l_p][rank][l_n]=0;
+
+
+ }
+
+ } else {
+
+
+ if( mcbist_error_map [l_p][rank][l_byte][l_nibble] == 1){
+ //pass=0;
+ schmoo_error_map[l_p][rank][l_n]=1;
+ //FAPI_INF("We are in error and nibble is %d and rank is %d and port is %d \n",l_n,rank,l_p);
+ }
+ else
+ {
+
+ schmoo_error_map[l_p][rank][l_n]=0;
+
+
+ }
+ }
+ l_n++;
+ }
+ }
+ }
+ }
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+ rank=valid_rank1[l_p][l_rnk];
+ for (l_n=0; l_n<l_max_nibble;l_n++){
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+
+ pass=0;
+ }
+
+ }
+ }
+ }
+
+
+ return rc;
+ }
+
+
+
+ /*------------------------------------------------------------------------------
+* Function: init_multi_array
+* Description : This function do the initialization of various schmoo parameters
+*
+* Parameters: the array address and the initial value
+* ---------------------------------------------------------------------------*/
+ void generic_shmoo::init_multi_array(uint16_t(&array)[MAX_DQ],
+ uint16_t init_val)
+ {
+
+ uint8_t l_byte, l_nibble, l_bit;
+ uint8_t l_dq = 0;
+ // Byte loop
+
+ for (l_byte = 0; l_byte < iv_MAX_BYTES; l_byte++)
+ { //Nibble loop
+ for (l_nibble = 0; l_nibble < MAX_NIBBLES; l_nibble++)
+ {
+ //Bit loop
+ for (l_bit = 0; l_bit < MAX_BITS; l_bit++)
+ {
+ l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
+ array[l_dq] = init_val;
+ }
+ }
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- i_rnk = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rnk, &i_rp, valid_rank);
- if (rc) return rc;
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- { //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- //Bit loop
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
+ }
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, i_rnk,
- l_input_type_e, l_dq, 0, val);
- if (rc) return rc;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq] = val;
- // FAPI_INF("%s:Nominal Value for port=%d rank=%d and rank pair=%d and dq=%d is %d",i_target.toEcmdString(),l_p,i_rnk,i_rp,l_dq,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq]);
- }
- }
- }
- }
- }
+ fapi::ReturnCode generic_shmoo::set_all_binary(const fapi::Target & i_target,bound_t bound)
+ {
- return rc;
-}
+ fapi::ReturnCode rc;
+ uint8_t l_rnk,l_byte,l_nibble,l_bit;
+ uint8_t l_dq=0;
+ uint8_t l_p=0;
+ uint32_t l_max=512;
+ uint32_t l_max_offset=64;
+ uint8_t rank = 0;
-////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ //if RD_EYE
+ if(iv_shmoo_type == 8)
+ {
+ l_max=127;
+ }
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+
+ rank = valid_rank1[l_p][l_rnk];
+
+ for(l_byte=0;l_byte<iv_MAX_BYTES;l_byte++)
+ { //Nibble loop
+ for(l_nibble=0;l_nibble< MAX_NIBBLES;l_nibble++)
+ {
+ //Bit loop
+ for(l_bit=0;l_bit<MAX_BITS;l_bit++)
+ {
+ l_dq=8*l_byte+4*l_nibble+l_bit;
+
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq];
+
+ if(bound==RIGHT)
+ {
+ if((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_max_offset)>l_max){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=l_max;
+ }
+ else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_max_offset;
+
+ }
+ }
+
+ else
+ {
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq] > 64)
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_max_offset;
+
+ }
+ else
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=0;
+
+ }
+ }
+ }
+ }
+ }
+ }
+ }
+ return rc;
+ }
+
+
+ /*------------------------------------------------------------------------------
+* Function: get_all_noms
+* Description : This function gets the nominal values for each DQ
+*
+* Parameters: Target:MBA
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::get_all_noms(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk,l_byte,l_nibble,l_bit;
+ uint8_t i_rnk=0;
+ uint16_t val=0;
+ uint8_t l_dq=0;
+ uint8_t l_p=0;
+ input_type_t l_input_type_e = WR_DQ;
+ access_type_t l_access_type_e = READ;
+ FAPI_DBG("mss_generic_shmoo : get_all_noms : Reading in all nominal values");
+
+ if(iv_shmoo_type == 2)
+ {l_input_type_e = WR_DQ;}
+ else if(iv_shmoo_type == 8)
+ { l_input_type_e = RD_DQ;}
+ else if(iv_shmoo_type == 16)
+ {l_input_type_e = RD_DQS;}
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+ i_rnk = valid_rank1[l_p][l_rnk];
+ for(l_byte=0;l_byte<iv_MAX_BYTES;l_byte++)
+ { //Nibble loop
+ for(l_nibble=0;l_nibble< MAX_NIBBLES;l_nibble++)
+ {
+ //Bit loop
+ for(l_bit=0;l_bit<MAX_BITS;l_bit++)
+ {
+ l_dq=8*l_byte+4*l_nibble+l_bit;
+ //printf("Before access call");
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,i_rnk,l_input_type_e,l_dq,0,val);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rnk].K.nom_val[l_dq]=val;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rnk].K.rb_regval[l_dq]=val;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rnk].K.lb_regval[l_dq]=val;
+
+ }
+ }
+ }
+ }
+ }
+ return rc;
+ }
-fapi::ReturnCode generic_shmoo::get_all_noms_dqs(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
+ ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ fapi::ReturnCode generic_shmoo::get_all_noms_dqs(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
uint8_t l_rnk;
- uint8_t i_rp = 0;
- uint16_t val = 0;
- uint8_t l_p = 0;
- uint8_t l_max_nibble = 20;
- uint8_t rank = 0;
- uint8_t l_n = 0;
- uint8_t l_dq = 0;
- uint8_t l_i = 0;
- uint8_t l_flag_p0 = 0;
- uint8_t l_flag_p1 = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- FAPI_INF("%s:mss_generic_shmoo : get_all_noms_dqs : Reading in all nominal values and schmoo type=%d \n",
- i_target.toEcmdString(), iv_shmoo_type);
- if (iv_dmm_type == 1)
- {
- l_max_nibble = 18;
- }
-
+ uint32_t val=0;
+ uint8_t l_p=0;
+ uint8_t l_max_nibble=20;
+ uint8_t rank=0;
+ uint8_t l_n=0;
+ FAPI_INF("%s:mss_generic_shmoo : get_all_noms_dqs : Reading in all nominal values and schmoo type=%d \n",i_target.toEcmdString(),1);
+ if(iv_dmm_type==1)
+ {
+
+ l_max_nibble=18;
+ }
+
input_type_t l_input_type_e = WR_DQS;
- access_type_t l_access_type_e = READ;
+ access_type_t l_access_type_e = READ ;
FAPI_DBG("mss_generic_shmoo : get_all_noms : Reading in all nominal values");
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {// Byte loop
+
+ rank=valid_rank1[l_p][l_rnk];
+
+ for (l_n=0; l_n<l_max_nibble;l_n++){
+
+ rc=mss_access_delay_reg(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_n,0,val);if(rc) return rc;
+ SHMOO[1].MBA.P[l_p].S[rank].K.nom_val[l_n]=val;
+
+ }
+ }
+ }
+return rc;
+ }
+
+ /*------------------------------------------------------------------------------
+* Function: knob_update
+* Description : This is a key function is used to find right and left bound using new algorithm -- there is an option u can chose not to use it by setting a flag
+*
+* Parameters: Target:MBA,bound:RIGHT/LEFT,scenario:type of schmoo,iv_port:0/1,rank:0-7,byte:0-7,nibble:0/1,bit:0-3,pass,
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::knob_update(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ input_type_t l_input_type_e = WR_DQ;
+ uint8_t l_dq=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_i=0;
+ uint8_t l_p=0;
+ uint16_t l_delay=0;
+ uint16_t l_max_limit=500;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ //l_SCHMOO_NIBBLES = 2; //temp preet del this
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+
+ FAPI_INF("Linear in Progress FW --> %d",scenario);
+
+ if(iv_shmoo_type == 2)
+ {l_input_type_e = WR_DQ;}
+ else if(iv_shmoo_type == 8)
+ {
+ l_input_type_e = RD_DQ;
+ l_max_limit=127;
+ }
+ else if(iv_shmoo_type == 4)
+ {l_input_type_e = WR_DQS;}
+ //else if(iv_shmoo_type == 16)
+ //{l_input_type_e = RD_DQS;}
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {// Byte loop
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, rank, &i_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_max_nibble; l_n++)
- {
+ for (l_p=0;l_p < 2;l_p++){
+ for(int i=0;i < iv_MAX_RANKS[l_p]; i++){
+
+ rank = valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+
+ if(bound==RIGHT)
+ {
+ for (l_delay=1;((pass==0));l_delay=l_delay+2){
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+
+ }
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+
+ if(l_p == 0){
+
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+
+ if(l_CDarray0[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }
+ else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq] > l_max_limit){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+
+
+ l_dq=l_dq+4;
+
+ } //end of nibble
+ } //end of rank
+ } //end of port loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 35)
+ break;
+ } //end of Delay loop;
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
- l_dq=4* l_n;
- l_flag_p0=0;
- l_flag_p0=0;
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- l_flag_p0 = 1;
-
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- l_flag_p1 = 1;
-
- }
- }
- }
- if(l_flag_p0==1){
- continue;
+
+ }
+
+ if(bound==LEFT)
+ {
+ for (l_delay=1;(pass==0);l_delay+=2){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
}
- if(l_flag_p1==1){
- continue;
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+ if(l_p==0){
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+ if(l_CDarray0[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+ if(l_CDarray1[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
}
- rc = mss_access_delay_reg_schmoo(i_target, l_access_type_e,
- l_p, rank, l_input_type_e,
- l_n, 0, val);
- if (rc) return rc;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_n] = val;
- //FAPI_INF("%s:Nominal Value for port=%d rank=%d and rank pair=%d and dqs=%d is %d",i_target.toEcmdString(),l_p,rank,i_rp,l_n,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_n]);
- }
- }
- }
-
- return rc;
-}
-
-/*------------------------------------------------------------------------------
- * Function: knob_update
- * Description : This is a key function is used to find right and left bound using new algorithm -- there is an option u can chose not to use it by setting a flag
- *
- * Parameters: Target:MBA,bound:RIGHT/LEFT,scenario:type of schmoo,iv_port:0/1,rank:0-7,byte:0-7,nibble:0/1,bit:0-3,pass,
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::knob_update(const fapi::Target & i_target,
- bound_t bound,
- uint8_t scenario,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- input_type_t l_input_type_e = WR_DQ;
- uint8_t l_dq = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
- uint8_t l_i = 0;
-
- uint8_t l_p = 0;
- uint16_t l_delay = 0;
-
- uint16_t l_max_limit = 500;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t i_rp = 0;
-
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- rc = do_mcbist_reset(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
- return rc;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (scenario == 1)
- {
- l_input_type_e = RD_DQ;
- l_max_limit = 127;
- }
-
- if (bound == RIGHT)
- {
- for (l_delay = 1; ((pass == 0)); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
-
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- }
- rc = mcb_error_map(i_target, mcbist_error_map,
- l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc) return rc;
-
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- > l_max_limit)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- l_dq = l_dq + 4;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank, l_input_type_e,
- l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- if (bound == LEFT)
- {
- for (l_delay = 1; (pass == 0); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map,
- l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc) return rc;
-
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
-
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq] == 0)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
-
- l_dq = l_dq + 4;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- return rc;
-}
-////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode generic_shmoo::knob_update_bin(const fapi::Target & i_target,
- bound_t bound,
- uint8_t scenario,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- input_type_t l_input_type_e = WR_DQ;
- uint8_t l_dq = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
- // uint8_t l_i = 0;
- // uint8_t l_flag_p0 = 0;
- // uint8_t l_flag_p1 = 0;
-
- uint8_t l_p = 0;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint16_t l_curr_diff = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t i_rp = 0;
- uint8_t l_status = 1;
- uint8_t l_CDarray0[80];
- uint8_t l_CDarray1[80];
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- rc = do_mcbist_reset(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
- return rc;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- binary_done_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (scenario == 1)
- {
- l_input_type_e = RD_DQ;
- }
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc) return rc;
-
- if (bound == RIGHT)
- {
- if (algorithm == SEQ_LIN)
- {
- do
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp,
- valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_status = 0;
- if (binary_done_map[l_p][rank][l_n] == 0)
- {
- l_status = 1;
- }
- }
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp,
- valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
-
-
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq];
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]
- = (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]) / 2;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]);
- if (rc) return rc;
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq])
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- else
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq];
- }
-
- if (l_curr_diff <= 1)
- {
- binary_done_map[l_p][rank][l_n] = 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- }
- else
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq];
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]
- = (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]) / 2;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]);
- if (rc) return rc;
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq])
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- else
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq];
- }
-
- if (l_curr_diff <= 1)
- {
- binary_done_map[l_p][rank][l_n] = 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- }
-
- l_dq = l_dq + 4;
- }
- }
- }
- rc = do_mcbist_reset(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
- return rc;
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- } while (l_status == 1);
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
- }
-
- if (bound == LEFT)
- {
- if (algorithm == SEQ_LIN)
- {
- do
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_status = 0;
- if (binary_done_map[l_p][rank][l_n] == 0)
- {
- l_status = 1;
- }
- }
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
-
-
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq];
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]
- = (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]) / 2;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]);
- if (rc) return rc;
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq])
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- else
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq];
- }
- if (l_curr_diff <= 1)
- {
- binary_done_map[l_p][rank][l_n] = 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- }
- else
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq];
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]
- = (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]) / 2;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_dq]);
- if (rc) return rc;
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq])
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- else
- {
- l_curr_diff = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_pass[l_dq];
- }
-
-
-
- if (l_curr_diff <= 1)
- {
- binary_done_map[l_p][rank][l_n] = 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.last_fail[l_dq];
- }
- }
-
- l_dq = l_dq + 4;
- }
- }
- }
- rc = do_mcbist_reset(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
- return rc;
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
-
- } while (l_status == 1);
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
- }
-
- return rc;
-}
-
-/*------------------------------------------------------------------------------
- * Function: knob_update_dqs
- * Description : This is a key function is used to find right and left bound using new algorithm -- there is an option u can chose not to use it by setting a flag
- *
- * Parameters: Target:MBA,bound:RIGHT/LEFT,iv_SHMOO_ON:type of schmoo,iv_port:0/1,rank:0-7,byte:0-7,nibble:0/1,bit:0-3,pass,
- * --------------------------------------------------------------------------- */
-fapi::ReturnCode generic_shmoo::knob_update_dqs_by4(const fapi::Target & i_target,
- bound_t bound,
- uint8_t iv_SHMOO_ON,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- uint8_t l_i=0;
- input_type_t l_input_type_e = WR_DQ;
- input_type_t l_input_type_e_dqs = WR_DQS;
- uint8_t l_dq = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
-
- uint8_t l_p = 0;
- uint16_t l_delay = 0;
- uint16_t l_delay_dq = 0;
- uint16_t l_max_limit = 500;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t i_rp = 0;
- uint8_t l_CDarray0[80];
- uint8_t l_CDarray1[80];
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (bound == RIGHT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; ((pass == 0)); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp,
- valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
-
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
-
- if(l_p == 0)
- {
- for(l_i=0;l_i<count_bad_dq[0];l_i++)
- {
- if(l_CDarray0[l_i]==l_dq)
- {
- schmoo_error_map[l_p][rank][l_n]=1;
- }
- }
- }
- else
- {
- for(l_i=0;l_i<count_bad_dq[1];l_i++)
- {
- if(l_CDarray1[l_i]==l_dq)
- {
- schmoo_error_map[l_p][rank][l_n]=1;
- }
- }
- }
-
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
-
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n]
- > l_max_limit)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp,
- valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p,rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- //FAPI_INF("\n ######################### The Right Bound is over ################################ ");
- }
-
- if (bound == LEFT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; (pass == 0); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
-
- if(l_p == 0)
- {
- for(l_i=0;l_i<count_bad_dq[0];l_i++)
- {
- if(l_CDarray0[l_i]==l_dq)
- {
- schmoo_error_map[l_p][rank][l_n]=1;
- }
- }
- }
- else
- {
- for(l_i=0;l_i<count_bad_dq[1];l_i++)
- {
- if(l_CDarray1[l_i]==l_dq)
- {
- schmoo_error_map[l_p][rank][l_n]=1;
- }
- }
- }
-
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n] - l_delay;
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]
- - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n] == 0)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- //FAPI_INF("\n ######################### The Left Bound is over ################################ ");
- }
-
- return rc;
-}
-
-fapi::ReturnCode generic_shmoo::knob_update_dqs_by4_isdimm(const fapi::Target & i_target,
- bound_t bound,
- uint8_t scenario,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- input_type_t l_input_type_e = WR_DQ;
- input_type_t l_input_type_e_dqs = WR_DQS;
- uint8_t l_dq = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
-
- uint8_t l_my_dqs = 0;
- uint8_t l_CDarray0[80];
- uint8_t l_CDarray1[80];
-
- uint8_t l_p = 0;
- uint16_t l_delay = 0;
- uint16_t l_delay_dq = 0;
- uint16_t l_max_limit = 500;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t i_rp = 0;
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
- uint8_t l_dqs_arr[18] = { 0, 9, 1, 10, 2, 11, 3, 12, 4, 13, 5, 14, 6, 15, 7, 16, 8, 17 };
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (bound == RIGHT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; ((pass == 0)); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_my_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
-
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- l_my_dqs = l_dqs_arr[l_n];
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
-
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_my_dqs]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_my_dqs] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_my_dqs, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_my_dqs]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
-
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_my_dqs] > l_max_limit)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- }
-
- if (bound == LEFT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; (pass == 0); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_my_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc)
- return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- l_my_dqs = l_dqs_arr[l_n];
-
- if (schmoo_error_map[l_p][rank][l_n] == 0)
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_my_dqs]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_my_dqs] - l_delay;
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_my_dqs, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_my_dqs]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_my_dqs] == 0)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- }
-
- return rc;
-}
-
-fapi::ReturnCode generic_shmoo::knob_update_dqs_by8(const fapi::Target & i_target,
- bound_t bound,
- uint8_t iv_SHMOO_ON,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- input_type_t l_input_type_e = WR_DQ;
- input_type_t l_input_type_e_dqs = WR_DQS;
- uint8_t l_dq = 0;
- uint8_t l_dqs = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
- uint8_t l_CDarray0[80];
- uint8_t l_CDarray1[80];
- uint16_t l_delay_dq = 0;
-
- uint8_t l_p = 0;
- uint16_t l_delay = 0;
- uint16_t l_max_limit = 500;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
-
- uint8_t i_rp = 0;
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &i_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (bound == RIGHT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; ((pass == 0)); l_delay++)
- {
- //for (l_p=0;l_p<MAX_PORT;l_p++){
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
-
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- if ((schmoo_error_map[l_p][rank][l_n] == 0)
- && (schmoo_error_map[l_p][rank][l_n + 1] == 0))
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
-
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_n] > l_max_limit)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
- if ((schmoo_error_map[l_p][rank][l_n] == 1)
- || (schmoo_error_map[l_p][rank][l_n + 1] == 1))
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- l_n = l_n + 1;
- l_dqs = l_dqs + 1;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp,
- valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- //FAPI_INF("\n ######################### The Right Bound is over ################################ ");
- }
-
- if (bound == LEFT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; (pass == 0); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- if ((schmoo_error_map[l_p][rank][l_n] == 0)
- && (schmoo_error_map[l_p][rank][l_n + 1] == 0))
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n] - l_delay;
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n]);
- if (rc) return rc;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e,l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- l_dq = l_dq + 1;
- l_delay_dq = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0, l_delay_dq);
- if (rc) return rc;
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_n] == 0)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- if ((schmoo_error_map[l_p][rank][l_n] == 1)
- || (schmoo_error_map[l_p][rank][l_n + 1] == 1))
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- l_n = l_n + 1;
- l_dqs = l_dq + 1;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound check_error_map failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.curr_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
-
- //FAPI_INF("\n ######################### The Left Bound is over ################################ ");
- }
-
- return rc;
-}
-
-///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode generic_shmoo::knob_update_dqs_by8_isdimm(const fapi::Target & i_target,
- bound_t bound,
- uint8_t scenario,
- uint8_t bit,
- uint8_t pass,
- bool &flag)
-{
- fapi::ReturnCode rc;
- ecmdDataBufferBase data_buffer_64(64);
- ecmdDataBufferBase data_buffer_64_1(64);
-
- uint8_t l_rp = 0;
- input_type_t l_input_type_e = WR_DQ;
- input_type_t l_input_type_e_dqs = WR_DQS;
- uint8_t l_dq = 0;
- uint8_t l_dqs = 0;
- access_type_t l_access_type_e = WRITE;
- uint8_t l_n = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- uint8_t l_p = 0;
- uint16_t l_delay = 0;
- uint16_t l_max_limit = 500;
- uint8_t rank = 0;
- uint8_t l_rank = 0;
- uint8_t l_SCHMOO_NIBBLES = 20;
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (int i = 0; i < iv_MAX_RANKS[l_p]; i++)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[i];
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- schmoo_error_map[l_p][rank][l_n] = 0;
- }
- }
- }
-
- if (bound == RIGHT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; ((pass == 0)); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
-
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- l_dqs = l_n / 2;
-
- if ((schmoo_error_map[l_p][rank][l_n] == 0)
- && (schmoo_error_map[l_p][rank][l_n + 1] == 0))
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dqs]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dqs] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_dqs, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dqs]);
- if (rc) return rc;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e,l_dq,0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] + l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dq]);
- if (rc) return rc;
- }
-
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.rb_regval[l_dqs] > l_max_limit)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- if ((schmoo_error_map[l_p][rank][l_n] == 1)
- || (schmoo_error_map[l_p][rank][l_n + 1] == 1))
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- l_n = l_n + 1;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
- }
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_n]);
- if (rc) return rc;
- }
- }
- }
-
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
-
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- }
-
- if (bound == LEFT)
- {
- if (algorithm == SEQ_LIN)
- {
- for (l_delay = 1; (pass == 0); l_delay++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = 0;
- l_dqs = 0;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- l_dq = 4 * l_n;
- l_dqs = l_n / 2;
-
- if ((schmoo_error_map[l_p][rank][l_n] == 0)
- && (schmoo_error_map[l_p][rank][l_n + 1] == 0))
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dqs]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dqs] - l_delay;
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_dqs, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dqs]);
- if (rc) return rc;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq] - l_delay;
-
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dq]);
- if (rc) return rc;
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.lb_regval[l_dqs] == 0)
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- if ((schmoo_error_map[l_p][rank][l_n] == 1)
- || (schmoo_error_map[l_p][rank][l_n + 1] == 1))
- {
- schmoo_error_map[l_p][rank][l_n] = 1;
- schmoo_error_map[l_p][rank][l_n + 1] = 1;
- }
-
- l_n = l_n + 1;
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
-
- rc = check_error_map(i_target, l_p, pass);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
- }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq] == 0){
+ schmoo_error_map[l_p][rank][l_n] = 1;
+ }
+
+ l_dq=l_dq+4;
+
+ }
+ }
+
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ if (l_delay > 35)
+ break;
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+
+
+
+ }
+
+ return rc;
+ }
+
+
+ fapi::ReturnCode generic_shmoo::knob_update_bin(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ input_type_t l_input_type_e = WR_DQ;
+ uint8_t l_dq=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_i=0;
+ uint8_t l_flag_p0=0;
+ uint8_t l_flag_p1=0;
+ FAPI_INF("Inside - Binary Schmoo FW - %d",scenario);
+ uint8_t l_p=0;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t l_status=1;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ if(iv_shmoo_type == 2)
+ {l_input_type_e = WR_DQ;}
+ else if(iv_shmoo_type == 8)
+ { l_input_type_e = RD_DQ;}
+ else if(iv_shmoo_type == 4)
+ {l_input_type_e = WR_DQS;}
+ else if(iv_shmoo_type == 16)
+ {l_input_type_e = RD_DQS;}
+
+
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e_dqs, l_n, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_n]);
- if (rc) return rc;
- }
- }
- }
+
+ //Reset schmoo_error_map
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n < l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ binary_done_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+ int count_cycle = 0;
+
+ if(bound==RIGHT)
+ {
+
+ //FAPI_INF("Algorithm is %d vs seq_lin %d\n",algorithm,SEQ_LIN);
+ //FAPI_INF("\n.....Inside Right Bound \n");
+ for(l_p = 0; l_p < MAX_PORT; l_p++){
+ do{
+
+
+ l_status=0;
+ ////////////////////////////////////////////
+ //FAPI_INF("\n +++ Cycle %d +++ ",count_cycle);
+ //FAPI_INF(" . . . . .");
+
+ ////////////////////////////////////////////
+
+
+ //FAPI_INF("\nMBA = %d",l_mba);
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ //FAPI_INF ("Current Rank : %d",rank );
+
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ if(binary_done_map[l_p][rank][l_n]==0){
+ l_status=1;
+ }
+ l_flag_p0=0;
+ l_flag_p1=0;
+ if(l_p == 0){
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+ if(l_CDarray0[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p0=1;
+ //FAPI_INF(" \n I port=%d am the culprit %d ",l_p,l_dq);
+ //SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+1;
+ }
+ }
+ }else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p1=1;
+
+ }
+ }
+ }
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+ }
+ else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq];
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+ // FAPI_INF("\n the right bound for port=%d rank=%d dq=%d is %d \n",l_p,rank,l_dq,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]);
+ }
+ }
+ else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq];
+ }
+ if(l_p==0){
+ if(l_flag_p0==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=1;
+ }
+ }
+ else{
+ if(l_flag_p1==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=1;
+ }
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+
+ }
+ }
+ l_dq=l_dq+4;
+ }
+ }
+
+
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ //printf("\n the status =%d \n",l_status);
+ count_cycle++;
+ }while(l_status==1);
+ }
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+
+
+
+
+ }
+ count_cycle = 0;
+ if(bound==LEFT)
+ {
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ l_status = 1;
+
+ while(l_status==1)
+ {
+ l_status=0;
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++){
+ l_dq=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+ if(binary_done_map[l_p][rank][l_n]==0){
+ l_status=1;}
+
+ l_flag_p0=0;
+ l_flag_p1=0;
+ if(l_p == 0){
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+ if(l_CDarray0[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p0=1;
+
+ }
+ }
+ }
+ else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p1=1;
+
+ }
+ }
+ }
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq];
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+
+ }
+ }else{
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq];
+ }
+
+
+ if(l_p==0){
+ if(l_flag_p0==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=1;
+ }
+ }
+ else{
+ if(l_flag_p1==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]=1;
+ }
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq];
+
+ }
+ }
+ l_dq=l_dq+4;
+ }
+ }
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ count_cycle++;
+ }
+ }
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ //printf("Valid rank of %d %d %d %d %d %d %d %d",valid_rank1[0],valid_rank1[1],valid_rank1[2],valid_rank1[3],valid_rank1[4],valid_rank1[5],valid_rank1[6],valid_rank1[7]);
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+
+ } // End of LEFT
+
+
+ return rc;
+ }
+
+ /*------------------------------------------------------------------------------
+* Function: knob_update_dqs
+* Description : This is a key function is used to find right and left bound using new algorithm -- there is an option u can chose not to use it by setting a flag
+*
+* Parameters: Target:MBA,bound:RIGHT/LEFT,iv_SHMOO_ON:type of schmoo,iv_port:0/1,rank:0-7,byte:0-7,nibble:0/1,bit:0-3,pass,
+* --------------------------------------------------------------------------- */
+ fapi::ReturnCode generic_shmoo::knob_update_dqs_by4(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+
+ input_type_t l_input_type_e = WR_DQ;
+ input_type_t l_input_type_e_dqs = WR_DQS;
+ uint8_t l_dq=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_dqs=1;
+ uint8_t l_p=0;
+ uint8_t l_i=0;
+ uint16_t l_delay=0;
+ //uint32_t l_max=0;
+ uint16_t l_max_limit=500;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+ FAPI_INF("\nWRT_DQS --- > CDIMM X4 - Scenario = %d",scenario);
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+
+ if(bound==RIGHT)
+ {
+
+ for (l_delay=1;((pass==0));l_delay++){
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+ if(l_p == 0){
+
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+
+ if(l_CDarray0[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+
+ SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_n]=SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_n]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ }
+
+ if(SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_dq] > l_max_limit){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+
+ }
+
+
+ }
+
+ }
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+ } //end of delay
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
- for (int l_bit = 0; l_bit < 4; l_bit++)
- {
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rank = 0; l_rank < iv_MAX_RANKS[l_p]; ++l_rank)
- {
- l_dq = l_bit;
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- rank = valid_rank[l_rank];
- rc = mss_getrankpair(i_target, l_p, rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_n = 0; l_n < l_SCHMOO_NIBBLES; l_n++)
- {
- rc = mss_access_delay_reg_schmoo(
- i_target, l_access_type_e, l_p, rank,
- l_input_type_e, l_dq, 0,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rank].K.nom_val[l_dq]);
- if (rc) return rc;
- l_dq = l_dq + 4;
- }
- }
- }
- }
- rc = do_mcbist_test(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
- return rc;
- }
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+
+ }
+ }
+ }
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+
+
+ }
+
+ if(bound==LEFT)
+ {
+
+
+ for (l_delay=1;(pass==0);l_delay++){
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+
+ if(l_p == 0){
+
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+
+ if(l_CDarray0[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ }
+ }
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_n]=SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]-l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_n]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ }
+ if(SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_n] == 0){
+ schmoo_error_map[l_p][rank][l_n] = 1;
+ }
+
+
+
+ }
+ }
+
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+ }
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+ return rc;
+ }
+ }
+ return rc;
+ }
+ fapi::ReturnCode generic_shmoo::knob_update_dqs_by4_isdimm(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ //uint8_t l_rp=0;
+ input_type_t l_input_type_e = WR_DQ;
+ input_type_t l_input_type_e_dqs = WR_DQS;
+ uint8_t l_dq=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_dqs=1;
+ uint8_t l_my_dqs=0;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+ uint8_t l_p=0;
+ uint16_t l_delay=0;
+ uint16_t l_max_limit=500;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ //uint8_t i_rp=0;
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+ uint8_t l_dqs_arr[18]={0,9,1,10,2,11,3,12,4,13,5,14,6,15,7,16,8,17};
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+
+
+
+ if(bound==RIGHT)
+ {
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0,
- l_CDarray1, count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
- return rc;
- }
- }
- }
- return rc;
-}
+ for (l_delay=1;((pass==0));l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_my_dqs=0;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+ l_my_dqs=l_dqs_arr[l_n];
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+
+ SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_my_dqs]=SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_my_dqs]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_my_dqs,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_my_dqs]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ }
+
+ if(SHMOO[l_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_dq]>l_max_limit){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ }
+ } //end of nibble loop
+ } //end of rank
+ } //end of port
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+
+ } //end of delay loop
+
+ //////////////////////////////////////////////////////////////
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ } //end of rank
+ } //end of port
+ } //end of bit
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+ }
+
+ if(bound==LEFT)
+ {
+ for (l_delay=1;(pass==0);l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_my_dqs=0;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+ l_my_dqs=l_dqs_arr[l_n];
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_my_dqs]=SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_my_dqs]-l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_my_dqs,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_my_dqs]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ }
+
+ if(SHMOO[l_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_dq] == 0){
+ schmoo_error_map[l_p][rank][l_n] = 1;
+ }
+ }
+ }
+ }
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+ } //end of delay loop
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ } //end of nibble
+ } //end of rank
+ } //port loop
+ } //bit loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+ } //end of Left
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::knob_update_dqs_by8(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ //uint8_t l_rp=0;
+ input_type_t l_input_type_e = WR_DQ;
+ input_type_t l_input_type_e_dqs = WR_DQS;
+ uint8_t l_dq=0;
+ uint8_t l_dqs=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_scen_dqs=1;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+ uint8_t l_p=0;
+ uint16_t l_delay=0;
+ uint16_t l_max_limit=500;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+
+ FAPI_INF("\nWRT_DQS --- > CDIMM X8 - Scenario = %d",scenario);
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+ return rc;
+ }
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ } //end of nib
+ } //end of rank
+ } //end of port loop
+
+ if(bound==RIGHT)
+ {
+ for (l_delay=1;((pass==0));l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_dqs=0;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+ if((schmoo_error_map[l_p][rank][l_n]==0)&&(schmoo_error_map[l_p][rank][l_n+1]==0)){
+ //Increase delay of DQS
+ SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_n]=SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]+l_delay;
+ //Write it to register DQS delay
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_n]);if(rc) return rc;
+
+ //Increase Delay of DQ
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+
+ l_dq=l_dq+1;
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq] > l_max_limit){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+
+ if((schmoo_error_map[l_p][rank][l_n]==1)||(schmoo_error_map[l_p][rank][l_n+1]==1)){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+ l_n=l_n+1;
+ l_dqs=l_dqs+1;
+
+ } //end of nibble loop
+ } //end of rank loop
+ } //end of port loop
+
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+ } //end of delay loop
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ { rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+
+ } //end of nib
+ } //end of rank
+ } //end of port loop
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ } //end of nib
+ } //end of rank
+ } //end of port loop
+ } //end of bit loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+ }
+
+ if(bound==LEFT)
+ {
+ for (l_delay=1;(pass==0);l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_dqs=0;
+
+ rank=valid_rank1[l_p][l_rank];
+
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+
+
+
+ if((schmoo_error_map[l_p][rank][l_n]==0)&&(schmoo_error_map[l_p][rank][l_n+1]==0)){
+ SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_n]=SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]-l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_n]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq] == 0){
+ schmoo_error_map[l_p][rank][l_n] = 1;
+ schmoo_error_map[l_p][rank][l_n+1] = 1;
+ }
+
+ if((schmoo_error_map[l_p][rank][l_n]==1)||(schmoo_error_map[l_p][rank][l_n+1]==1)){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+
+ l_n=l_n+1;
+ l_dqs=l_dq+1;
+
+ } //nibble loop
+ } //rank loop
+ } //port loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+
+ } //end of l delay loop
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+ }
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+ } //end of bound Left
+
+ return rc;
+ }
+ fapi::ReturnCode generic_shmoo::knob_update_dqs_by8_isdimm(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ //uint8_t l_rp=0;
+ input_type_t l_input_type_e = WR_DQ;
+ input_type_t l_input_type_e_dqs = WR_DQS;
+ uint8_t l_dq=0;
+ uint8_t l_dqs=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_n=0;
+ uint8_t l_scen_dqs=1;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+ uint8_t l_p=0;
+ uint16_t l_delay=0;
+ uint16_t l_max_limit=500;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ //uint8_t i_rp=0;
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+ if(iv_dmm_type==1)
+ {
+
+ l_SCHMOO_NIBBLES=18;
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+
+ if(bound==RIGHT)
+ {
+
+ for (l_delay=1;((pass==0));l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_dqs=0;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+ l_dqs=l_n/2;
+
+ if((schmoo_error_map[l_p][rank][l_n]==0)&&(schmoo_error_map[l_p][rank][l_n+1]==0)){
+
+ SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_dqs]=SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_dqs]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_dqs,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_dqs]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]+l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq]);if(rc) return rc;
+
+ }
+
+ if(SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.rb_regval[l_dqs]>l_max_limit){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+
+ if((schmoo_error_map[l_p][rank][l_n]==1)||(schmoo_error_map[l_p][rank][l_n+1]==1)){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+
+ l_n=l_n+1;
+
+ }
+
+
+ }
+
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ }
+ }
+ }
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+ }
+
+ if(bound==LEFT)
+ {
-/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-/*------------------------------------------------------------------------------
- * Function: find_bound
- * Description : This function calls the knob_update for each DQ which is used to find bound that is left/right according to schmoo type
- *
- * Parameters: Target:MBA,bound:RIGHT/LEFT,
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::find_bound(const fapi::Target & i_target,
- bound_t bound)
+ for (l_delay=1;(pass==0);l_delay++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=0;
+ l_dqs=0;
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ l_dq=4*l_n;
+
+ l_dqs=l_n/2;
+
+ if((schmoo_error_map[l_p][rank][l_n]==0)&&(schmoo_error_map[l_p][rank][l_n+1]==0)){
+ SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_dqs]=SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_dqs]-l_delay;
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_dqs,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_dqs]);if(rc) return rc;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ l_dq=l_dq+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]-l_delay;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq]);if(rc) return rc;
+ }
+ if(SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.lb_regval[l_dqs] == 0){
+ schmoo_error_map[l_p][rank][l_n] = 1;
+ schmoo_error_map[l_p][rank][l_n+1] = 1;
+ }
+
+ if((schmoo_error_map[l_p][rank][l_n]==1)||(schmoo_error_map[l_p][rank][l_n+1]==1)){
+
+ schmoo_error_map[l_p][rank][l_n]=1;
+ schmoo_error_map[l_p][rank][l_n+1]=1;
+ }
+
+ l_n=l_n+1;
+
+ } //nibble loop
+ } //rank loop
+ } //port loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map2(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ if (l_delay > 70)
+ break;
+
+ }
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ rank=valid_rank[l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e_dqs,l_n,0,SHMOO[l_scen_dqs].MBA.P[l_p].S[rank].K.nom_val[l_n]);if(rc) return rc;
+
+ }
+ }
+ }
+
+ for(int l_bit=0;l_bit<4;l_bit++){
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ l_dq=l_bit;
+
+ rank=valid_rank1[l_p][l_rank];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq]);if(rc) return rc;
+ l_dq=l_dq+4;
+ }
+ } //rank loop
+ } //port loop
+ } //bit loop
+
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::do_mcbist_test: mcb_error_map failed!!");
+
+ return rc;
+ }
+
+ } //end of LEFT
+
+ return rc;
+ }
+
+ /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ /*------------------------------------------------------------------------------
+* Function: find_bound
+* Description : This function calls the knob_update for each DQ which is used to find bound that is left/right according to schmoo type
+*
+* Parameters: Target:MBA,bound:RIGHT/LEFT,
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::find_bound(const fapi::Target & i_target,
+ bound_t bound)
+ {
+ uint8_t l_bit = 0;
+ fapi::ReturnCode rc;
+ uint8_t l_comp = 0;
+ uint8_t pass = 0;
+ uint8_t l_dram_width = 0;
+ bool flag = false;
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_dram_width);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_MODE, &i_target, l_comp); if(rc) return rc;
+
+ FAPI_INF("%s:\n SCHMOO IS IN PROGRESS ...... \n", i_target.toEcmdString());
+
+ //WRT_DQS Portion
+ if(iv_DQS_ON == 1)
{
- uint8_t l_bit = 0;
- fapi::ReturnCode rc;
-
- uint8_t pass = 0;
- uint8_t l_dram_width = 0;
- bool flag = false;
-
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_dram_width);
- if (rc) return rc;
-
- FAPI_INF("%s:\n SCHMOO IS IN PROGRESS ...... \n", i_target.toEcmdString());
-
- if (iv_shmoo_type == 3)
- {
- rc = do_mcbist_reset(i_target);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
- return rc;
- }
- pass = 0;
- if (l_dram_width == 4)
- {
- if (iv_dmm_type == 1)
- {
- rc = knob_update_dqs_by4_isdimm(i_target, bound, iv_SHMOO_ON, l_bit, pass, flag);
- if (rc) return rc;
- }
- else
- {
- pass = 0;
-
- rc = knob_update_dqs_by4(i_target, bound, iv_SHMOO_ON, l_bit, pass, flag);
- if (rc) return rc;
- }
- }
- else
- {
- if (iv_dmm_type == 1)
- {
- rc=knob_update_dqs_by8_isdimm(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
- }
- else
- {
- rc = knob_update_dqs_by4(i_target, bound, iv_SHMOO_ON, l_bit, pass, flag);
- if (rc) return rc;
- }
- }
- }
- else
- {
- //Bit loop
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- // preetham function here
- pass = 0;
-
- ////////////////////////////////////////////////////////////////////////////////////
- if (iv_shmoo_param == 4)
- {
- rc = knob_update_bin(i_target, bound, iv_shmoo_type, l_bit, pass, flag);
- if (rc) return rc;
- }
- else
- {
-
- //rc=knob_update_rd_eye_pwrfix(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
- rc = knob_update(i_target, bound, iv_shmoo_type, l_bit, pass, flag);
- if (rc) return rc;
- }
- }
- }
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_ERR("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+ pass=0;
+if(l_dram_width == 4){
+ if(iv_dmm_type==1)
+ {
+ rc=knob_update_dqs_by4_isdimm(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
+ }
+ else{
+ rc=knob_update_dqs_by4(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
+ }
+ } //end of if dram_width 4
+else{
+ if(iv_dmm_type==1)
+ {
+ rc=knob_update_dqs_by8_isdimm(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
+ }
+ else{
+ rc=knob_update_dqs_by8(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
+ }
+ }
+} //end of if iv_DQS_ON 1 or WRT_DQS
- return rc;
-}
-/*------------------------------------------------------------------------------
- * Function: print_report
- * Description : This function is used to print the information needed such as freq,voltage etc, and also the right,left and total margin
- *
- * Parameters: Target:MBA
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::print_report(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
+ else if(l_comp == 6){
+ pass=0;
+ rc=knob_update_bin_composite(i_target,bound,iv_shmoo_type,l_bit,pass,flag); if(rc) return rc;
+ }
+ else
+ {
+ //Bit loop
+ for (l_bit = 0; l_bit < MAX_BITS; l_bit++)
+ {
+ // preetham function here
+ pass = 0;
+
+ ////////////////////////////////////////////////////////////////////////////////////
+ if (l_comp == 4)
+ {
+ FAPI_INF("Calling Binary - %d",iv_shmoo_type);
+ rc = knob_update_bin(i_target, bound, iv_shmoo_type, l_bit, pass, flag);
+ if (rc) return rc;
+ }
+ else
+ {
- uint8_t l_rnk, l_byte, l_nibble, l_bit;
- //uint8_t l_dq = 0;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t i_rank = 0;
- uint8_t l_mbapos = 0;
- uint32_t l_attr_mss_freq_u32 = 0;
- uint32_t l_attr_mss_volt_u32 = 0;
- uint8_t l_attr_eff_dimm_type_u8 = 0;
- uint8_t l_attr_eff_num_drops_per_port_u8 = 0;
- uint8_t l_attr_eff_dram_width_u8 = 0;
- uint16_t l_total_margin = 0;
- uint8_t l_i = 0;
- uint8_t l_dq = 0;
- uint8_t l_flag = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
+
+ rc = knob_update(i_target, bound, iv_shmoo_type, l_bit, pass, flag);
+ if (rc) return rc;
+ }
+ }
+ }
- char * l_pMike = new char[128];
- char * l_str = new char[128];
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::print report: mcb_error_map failed!!");
- return rc;
- }
+ return rc;
+ }
+ /*------------------------------------------------------------------------------
+* Function: print_report
+* Description : This function is used to print the information needed such as freq,voltage etc, and also the right,left and total margin
+*
+* Parameters: Target:MBA
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::print_report(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+
+ uint8_t l_rnk,l_byte,l_nibble,l_bit;
+ uint8_t l_dq=0;
+ //uint8_t l_rp=0;
+ uint8_t l_p=0;
+ uint8_t i_rank=0;
+ uint8_t l_mbapos = 0;
+ uint32_t l_attr_mss_freq_u32 = 0;
+ uint32_t l_attr_mss_volt_u32 = 0;
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t l_attr_eff_num_drops_per_port_u8 = 0;
+ uint8_t l_attr_eff_dram_width_u8 = 0;
+
+ fapi::Target l_target_centaur;
+
+
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target, l_attr_eff_num_drops_per_port_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_attr_eff_dram_width_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);if(rc) return rc;
+
- fapi::Target l_target_centaur;
- rc = fapiGetParentChip(i_target, l_target_centaur);
- if (rc) return rc;
+ FAPI_INF("%s:freq = %d on %s.",i_target.toEcmdString(),l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s: volt = %d on %s.",i_target.toEcmdString(), l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s: dimm_type = %d on %s.",i_target.toEcmdString(), l_attr_eff_dimm_type_u8, i_target.toEcmdString());
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
+ {
+ FAPI_INF("%s: It is a CDIMM",i_target.toEcmdString());
+ }
+ else
+ {
+ FAPI_INF("%s: It is an ISDIMM",i_target.toEcmdString());
+ }
+ FAPI_INF("%s: \n Number of ranks on port = 0 is %d ",i_target.toEcmdString(),iv_MAX_RANKS[0]);
+ FAPI_INF("%s: \n Number of ranks on port = 1 is %d \n \n",i_target.toEcmdString(),iv_MAX_RANKS[1]);
+ FAPI_INF("%s:+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++",i_target.toEcmdString());
+ //// Based on schmoo param the print will change eventually
+ if(iv_shmoo_type==2)
+ {
+ FAPI_INF("%s:Schmoo POS\tPort\tRank\tByte\tnibble\tbit\tNominal\t\tSetup_Limit\tHold_Limit\tWrD_Setup(ps)\tWrD_Hold(ps)\tEye_Width(ps)\tBitRate\tVref_Multiplier ",i_target.toEcmdString());
+ }
+ else{
+ FAPI_INF("%s:Schmoo POS\tPort\tRank\tByte\tnibble\tbit\tNominal\t\tSetup_Limit\tHold_Limit\tRdD_Setup(ps)\tRdD_Hold(ps)\tEye_Width(ps)\tBitRate\tVref_Multiplier ",i_target.toEcmdString());
+ }
+
+
+ for (l_p=0;l_p < 2;l_p++){
+ for (l_rnk=0;l_rnk < iv_MAX_RANKS[l_p];l_rnk++)
+ { i_rank = valid_rank1[l_p][l_rnk];
+ for(l_byte=0;l_byte < 10;l_byte++)
+ {
+
+ //Nibble loop
+ for(l_nibble=0;l_nibble< 2;l_nibble++)
+ {
+ for(l_bit=0;l_bit< 4;l_bit++)
+ {
+ l_dq=8*l_byte+4*l_nibble+l_bit;
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target,
- l_attr_eff_num_drops_per_port_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target,
- l_attr_eff_dram_width_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);
- if (rc) return rc;
+ if(iv_shmoo_type==2)
+ {
+ FAPI_INF("%s:WR_EYE %d\t%d\t%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\n ",i_target.toEcmdString(),l_mbapos,l_p,i_rank,l_byte,l_nibble,l_bit,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_dq],l_attr_mss_freq_u32,iv_vref_mul);
+ }
+ if(iv_shmoo_type==8)
+ {
+ FAPI_INF("%s:RD_EYE %d\t%d\t%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\n ",i_target.toEcmdString(),l_mbapos,l_p,i_rank,l_byte,l_nibble,l_bit,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_dq],l_attr_mss_freq_u32,iv_vref_mul);
+ }
+
+ }
+ }
+ }
+ }
+ }
+
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::print_report_dqs(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+
+ uint8_t l_rnk, l_nibble;
+ uint8_t l_p = 0;
+ uint8_t i_rank = 0;
+ uint8_t l_mbapos = 0;
+ uint16_t l_total_margin = 0;
+ uint32_t l_attr_mss_freq_u32 = 0;
+ uint32_t l_attr_mss_volt_u32 = 0;
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t l_attr_eff_num_drops_per_port_u8 = 0;
+ uint8_t l_attr_eff_dram_width_u8 = 0;
+ fapi::Target l_target_centaur;
+ uint8_t l_SCHMOO_NIBBLES = 20;
+ uint8_t l_by8_dqs = 0;
+ char * l_pMike = new char[128];
+ char * l_str = new char[128];
+
+ uint8_t l_i = 0;
+ uint8_t l_dq = 0;
+ uint8_t l_flag = 0;
+ uint8_t l_CDarray0[80] = { 0 };
+ uint8_t l_CDarray1[80] = { 0 };
+
+ rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
+ count_bad_dq);
+ if (rc)
+ {
+ FAPI_ERR("generic_shmoo::print report: mcb_error_map failed!!");
+ return rc;
+ }
- FAPI_INF("%s: freq = %d on %s.", i_target.toEcmdString(),
- l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
- FAPI_INF("%s: volt = %d on %s.", i_target.toEcmdString(),
- l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
- FAPI_INF("%s: dimm_type = %d on %s.", i_target.toEcmdString(),
- l_attr_eff_dimm_type_u8, i_target.toEcmdString());
- if (l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
- {
- FAPI_INF("%s: It is a CDIMM", i_target.toEcmdString());
- }
- else
- {
- FAPI_INF("%s: It is an ISDIMM", i_target.toEcmdString());
- }
- FAPI_INF("%s: \n Number of ranks on port = 0 is %d ",
- i_target.toEcmdString(), iv_MAX_RANKS[0]);
- FAPI_INF("%s: \n Number of ranks on port = 1 is %d \n \n",
- i_target.toEcmdString(), iv_MAX_RANKS[1]);
+ if (iv_dmm_type == 1)
+ {
+ l_SCHMOO_NIBBLES = 18;
+ }
- //FAPI_INF("%s:num_drops_per_port = %d on %s.", l_attr_eff_num_drops_per_port_u8, i_target.toEcmdString());
- //FAPI_INF("%s:num_ranks = %d on %s.", iv_MAX_RANKS,i_target.toEcmdString());
- FAPI_INF("dram_width = %d \n\n", l_attr_eff_dram_width_u8);
- FAPI_INF("%s:+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++",
- i_target.toEcmdString());
- //// Based on schmoo param the print will change eventually
+ rc = fapiGetParentChip(i_target, l_target_centaur);
+ if (rc) return rc;
+
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target,
+ l_attr_eff_num_drops_per_port_u8);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target,
+ l_attr_eff_dram_width_u8);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);
+ if (rc) return rc;
+
+ if (l_attr_eff_dram_width_u8 == 8)
+ {
+ l_SCHMOO_NIBBLES = 10;
+ if (iv_dmm_type == 1)
+ {
+ l_SCHMOO_NIBBLES = 9;
+ }
+ }
- if (iv_shmoo_type == 0)
- {
- sprintf(l_pMike, "Schmoo POS\tPort\tRank\tByte\tnibble\t\tSetup_Limit\tHold_Limit\tWrD_Setup(ps)\tWrD_Hold(ps)\tEye_Width(ps)\tBitRate\tVref_Multiplier ");
- }
- else
- {
- sprintf(l_pMike, "Schmoo POS\tPort\tRank\tByte\tnibble\t\tSetup_Limit\tHold_Limit\tRdD_Setup(ps)\tRdD_Hold(ps)\tEye_Width(ps)\tBitRate\tVref_Multiplier ");
- }
- //FAPI_INF("Schmoo POS\tPort\tRank\tByte\tnibble\tbit\tNominal\t\tSetup_Limit\tHold_Limit \n");
- FAPI_INF("%s", l_pMike);
- delete[] l_pMike;
+ //FAPI_INF("%s:Shmoonibbles val is=%d",l_SCHMOO_NIBBLES);
+
+ FAPI_INF("%s: freq = %d on %s.", i_target.toEcmdString(),
+ l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s:volt = %d on %s.", i_target.toEcmdString(),
+ l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s:dimm_type = %d on %s.", i_target.toEcmdString(),
+ l_attr_eff_dimm_type_u8, i_target.toEcmdString());
+ FAPI_INF("%s:\n Number of ranks on port=0 is %d ", i_target.toEcmdString(),
+ iv_MAX_RANKS[0]);
+ FAPI_INF("%s:\n Number of ranks on port=1 is %d ", i_target.toEcmdString(),
+ iv_MAX_RANKS[1]);
+
+ if (l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
+ {
+ FAPI_INF("%s:It is a CDIMM", i_target.toEcmdString());
+ }
+ else
+ {
+ FAPI_INF("%s:It is an ISDIMM", i_target.toEcmdString());
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- {
- //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
-
- l_dq=8 * l_byte + 4 * l_nibble;
- l_flag=0;
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
+ FAPI_INF("%s:\n Number of ranks on port=0 is %d ", i_target.toEcmdString(),
+ iv_MAX_RANKS[0]);
+ FAPI_INF("%s:\n Number of ranks on port=1 is %d \n \n",
+ i_target.toEcmdString(), iv_MAX_RANKS[1]);
+
+ FAPI_INF(
+ "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
+ sprintf(l_pMike, "Schmoo POS\tPort\tRank\tDQS\tNominal\t\ttDQSSmin_PR_limit\ttDQSSmax_PR_limit\ttDQSSmin(ps)\ttDQSSmax(ps)\ttDQSS_Window(ps)\tBitRate ");
+ FAPI_INF("%s", l_pMike);
+ delete[] l_pMike;
+
+ for (l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; l_rnk++)
+ {
+ ////
+ i_rank = valid_rank1[l_p][l_rnk];
+ //
+ if (rc) return rc;
+
+ for (l_nibble = 0; l_nibble < l_SCHMOO_NIBBLES; l_nibble++)
+ {
+ l_by8_dqs = l_nibble;
+ if (iv_dmm_type == 0)
+ {
+ if (l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble = l_nibble * 2;
+ }
+ }
+ l_dq=4* l_nibble;
+ l_flag=0;
+ if (l_p == 0)
+ {
+ for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
+ {
+ if (l_CDarray0[l_i] == l_dq)
+ {
+ l_flag=1;
+
+ }
+ }
+ }
+ else
+ {
+ for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
+ {
+ if (l_CDarray1[l_i] == l_dq)
+ {
+ l_flag=1;
+
+ }
+ }
+ }
+
if(l_flag==1)
{
continue;
}
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
- l_total_margin
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq];
- sprintf(l_str, "%d\t%d\t%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d",
- l_mbapos, l_p, i_rank, l_byte, l_nibble, l_bit,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq],
- l_total_margin, l_attr_mss_freq_u32, iv_vref_mul);
- if (iv_shmoo_type == 0)
- {
- FAPI_INF("WR_EYE %s ", l_str);
- //FAPI_INF("WR_EYE %s %4d%4d%4d%4d%4d%4d ",l_str,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq],l_total_margin);
- }
- if (iv_shmoo_type == 1)
- {
- FAPI_INF("RD_EYE %s ", l_str);
- //FAPI_INF("RD_EYE %s %4d%4d%4d%4d%4d%4d ",l_str,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq],l_total_margin);
- }
- }
- }
- }
- }
- }
+
+ l_total_margin
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble]
+ + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble];
+ sprintf(l_str, "%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d",
+ l_mbapos, l_p, i_rank, l_nibble,
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.curr_val[l_nibble],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble],
+ l_total_margin, l_attr_mss_freq_u32);
+
+ FAPI_INF("WR_DQS %s", l_str);
- delete[] l_str;
- return rc;
-}
+ if (iv_dmm_type == 0)
+ {
+ if (l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble = l_by8_dqs;
+ }
+ }
-fapi::ReturnCode generic_shmoo::print_report_dqs(const fapi::Target & i_target)
+ }
+ }
+ }
+ delete[] l_str;
+ return rc;
+ }
+
+
+
+
+ fapi::ReturnCode generic_shmoo::print_report_dqs2(const fapi::Target & i_target)
{
fapi::ReturnCode rc;
-
- uint8_t l_rnk, l_nibble;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t i_rank = 0;
+ uint8_t l_rnk,l_nibble;
+ uint8_t l_p=0;
+ uint8_t i_rank=0;
uint8_t l_mbapos = 0;
- uint16_t l_total_margin = 0;
uint32_t l_attr_mss_freq_u32 = 0;
uint32_t l_attr_mss_volt_u32 = 0;
uint8_t l_attr_eff_dimm_type_u8 = 0;
uint8_t l_attr_eff_num_drops_per_port_u8 = 0;
uint8_t l_attr_eff_dram_width_u8 = 0;
fapi::Target l_target_centaur;
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t l_by8_dqs = 0;
- char * l_pMike = new char[128];
- char * l_str = new char[128];
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t l_by8_dqs=0;
- uint8_t l_i = 0;
- uint8_t l_dq = 0;
- uint8_t l_flag = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::print report: mcb_error_map failed!!");
- return rc;
- }
-
- if (iv_dmm_type == 1)
+
+ if(iv_dmm_type==1)
{
- l_SCHMOO_NIBBLES = 18;
- }
-
- rc = fapiGetParentChip(i_target, l_target_centaur);
- if (rc) return rc;
-
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target,
- l_attr_eff_num_drops_per_port_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target,
- l_attr_eff_dram_width_u8);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);
- if (rc) return rc;
-
- if (l_attr_eff_dram_width_u8 == 8)
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target, l_attr_eff_num_drops_per_port_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_attr_eff_dram_width_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);if(rc) return rc;
+
+ if(l_attr_eff_dram_width_u8 == 8){
+ l_SCHMOO_NIBBLES=10;
+ if(iv_dmm_type==1)
{
- l_SCHMOO_NIBBLES = 10;
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 9;
- }
- }
-
- //FAPI_INF("%s:Shmoonibbles val is=%d",l_SCHMOO_NIBBLES);
-
- FAPI_INF("%s: freq = %d on %s.", i_target.toEcmdString(),
- l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
- FAPI_INF("%s:volt = %d on %s.", i_target.toEcmdString(),
- l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
- FAPI_INF("%s:dimm_type = %d on %s.", i_target.toEcmdString(),
- l_attr_eff_dimm_type_u8, i_target.toEcmdString());
- FAPI_INF("%s:\n Number of ranks on port=0 is %d ", i_target.toEcmdString(),
- iv_MAX_RANKS[0]);
- FAPI_INF("%s:\n Number of ranks on port=1 is %d ", i_target.toEcmdString(),
- iv_MAX_RANKS[1]);
-
- if (l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
+ l_SCHMOO_NIBBLES=9;
+ }
+ }
+ FAPI_INF("%s:freq = %d on %s.",i_target.toEcmdString(), l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s:volt = %d on %s.",i_target.toEcmdString(), l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s:dimm_type = %d on %s.",i_target.toEcmdString(), l_attr_eff_dimm_type_u8, i_target.toEcmdString());
+ FAPI_INF("%s:\n Number of ranks on port=0 is %d ",i_target.toEcmdString(),iv_MAX_RANKS[0]);
+ FAPI_INF("%s:\n Number of ranks on port=1 is %d ",i_target.toEcmdString(),iv_MAX_RANKS[1]);
+
+
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
{
- FAPI_INF("%s:It is a CDIMM", i_target.toEcmdString());
+ FAPI_INF("%s:It is a CDIMM",i_target.toEcmdString());
}
else
{
- FAPI_INF("%s:It is an ISDIMM", i_target.toEcmdString());
+ FAPI_INF("%s:It is an ISDIMM",i_target.toEcmdString());
}
-
- FAPI_INF("%s:\n Number of ranks on port=0 is %d ", i_target.toEcmdString(),
- iv_MAX_RANKS[0]);
- FAPI_INF("%s:\n Number of ranks on port=1 is %d \n \n",
- i_target.toEcmdString(), iv_MAX_RANKS[1]);
- //FAPI_INF("%s:num_drops_per_port = %d on %s.", l_attr_eff_num_drops_per_port_u8, i_target.toEcmdString());
- //FAPI_INF("%s:num_ranks = %d on %s.", iv_MAX_RANKS,i_target.toEcmdString());
- //FAPI_INF("%s:dram_width = %d on %s. \n\n", l_attr_eff_dram_width_u8, i_target.toEcmdString());
- //fprintf(fp, "Schmoo POS\tPort\tRank\tDQS\tNominal\t\tSetup_Limit\tHold_Limit\tWrD_Setup(ps)\tWrD_Hold(ps)\tEye_Width(ps)\tBitRate \n");
- FAPI_INF(
- "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++");
- sprintf(l_pMike, "Schmoo POS\tPort\tRank\tDQS\tNominal\t\ttDQSSmin_PR_limit\ttDQSSmax_PR_limit\ttDQSSmin(ps)\ttDQSSmax(ps)\ttDQSS_Window(ps)\tBitRate ");
- FAPI_INF("%s", l_pMike);
- delete[] l_pMike;
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
-
- for (l_nibble = 0; l_nibble < l_SCHMOO_NIBBLES; ++l_nibble)
- {
- l_by8_dqs = l_nibble;
- if (iv_dmm_type == 0)
- {
- if (l_attr_eff_dram_width_u8 == 8)
- {
- l_nibble = l_nibble * 2;
- }
- }
- l_dq=4* l_nibble;
- l_flag=0;
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
-
- if(l_flag==1)
- {
- continue;
- }
+
+ FAPI_INF("%s:\n Number of ranks on port=0 is %d ",i_target.toEcmdString(),iv_MAX_RANKS[0]);
+ FAPI_INF("%s:\n Number of ranks on port=1 is %d \n \n",i_target.toEcmdString(),iv_MAX_RANKS[1]);
+
+ FAPI_INF("%s:+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++",i_target.toEcmdString());
+ FAPI_INF("%s:Schmoo POS\tPort\tRank\tDQS\tNominal\t\ttDQSSmin_PR_limit\ttDQSSmax_PR_limit\ttDQSSmin(ps)\ttDQSSmax(ps)\ttDQSS_Window(ps)\tBitRate ",i_target.toEcmdString());
+
+ iv_shmoo_type=4;
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ i_rank=valid_rank1[l_p][l_rnk];
+ for(l_nibble=0;l_nibble< l_SCHMOO_NIBBLES;l_nibble++)
+ {
+ l_by8_dqs=l_nibble;
+ if(iv_dmm_type==0)
+ {
+ if(l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble=l_nibble*2;
+ }
+ }
- l_total_margin
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble]
- + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble];
- sprintf(l_str, "%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d",
- l_mbapos, l_p, i_rank, l_nibble,
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble],
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble],
- l_total_margin, l_attr_mss_freq_u32);
- //FAPI_INF("abhijit %s %d %d %d ",l_str,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_by8_dqs]);
- //fprintf(fp,"WR_DQS %d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\n ",l_mbapos,l_p,i_rank,l_nibble,SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.nom_val[l_by8_dqs][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.rb_regval[l_by8_dqs][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.lb_regval[l_by8_dqs][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.right_margin_val[l_by8_dqs][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.left_margin_val[l_by8_dqs][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.total_margin[l_by8_dqs][l_rp],l_attr_mss_freq_u32);
- //FAPI_INF("WR_DQS %s %4d%4d%4d ",l_mbapos,l_p,i_rank,l_nibble,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble],);
- FAPI_INF("WR_DQS %s", l_str);
-
- if (iv_dmm_type == 0)
- {
- if (l_attr_eff_dram_width_u8 == 8)
- {
- l_nibble = l_by8_dqs;
- }
- }
-
- }
- }
- }
- delete[] l_str;
- return rc;
-}
-
-/*------------------------------------------------------------------------------
- * Function: get_margin
- * Description : This function is used to get margin for setup,hold and total eye width in Ps by using frequency
- *
- * Parameters: Target:MBA
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::get_margin(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk, l_byte, l_nibble, l_bit;
- uint32_t l_attr_mss_freq_margin_u32 = 0;
- uint32_t l_freq = 0;
- uint64_t l_cyc = 1000000000000000ULL;
- uint8_t l_dq = 0;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t i_rank = 0;
- uint64_t l_factor = 0;
- uint64_t l_factor_ps = 1000000000;
-
- //FAPI_INF(" the factor is % llu ",l_cyc);
-
- fapi::Target l_target_centaur;
- rc = fapiGetParentChip(i_target, l_target_centaur);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur,
- l_attr_mss_freq_margin_u32);
- if (rc) return rc;
- l_freq = l_attr_mss_freq_margin_u32 / 2;
- l_cyc = l_cyc / l_freq;// converting to zepto to get more accurate data
- l_factor = l_cyc / 128;
- //FAPI_INF("l_factor is % llu ",l_factor);
-
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- {
- //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
- //FAPI_INF(" the right bound = %d and nominal = %d",SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.nom_val[l_dq][l_rp]);
- if (iv_shmoo_type == 1)
- {
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq] == 0)
- {
- //FAPI_INF("\n abhijit saurabh is here and dq=%d \n",l_dq);
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq] = 0;
- if (iv_shmoo_param != 4)
- {
- //SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]-1;
- }
- else
- {
- //SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]-1;
- }
- //FAPI_INF("\n the value of left bound after is %d \n",SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq][l_rp]);
- }
- }
-
- if (iv_shmoo_param == 4)
- {
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq]
- > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq])
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq] - 1;
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]
- < SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq])
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq] + 1;
- }
- }
- else
- {
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq]- 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq] + 1;
- }
-
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq])
- * l_factor) / l_factor_ps;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.nom_val[l_dq]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_dq])
- * l_factor) / l_factor_ps;//((1/uint32_t_freq*1000000)/128);
- }
- }
- }
- }
- }
-
+ FAPI_INF("%s:WR_DQS %d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\n ",i_target.toEcmdString(),l_mbapos,l_p,i_rank,l_nibble,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble],SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_nibble],l_attr_mss_freq_u32);
+
+ if(iv_dmm_type==0)
+ {
+ if(l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble=l_by8_dqs;
+ }
+ }
+
+
+ }
+ }
+ }
+
+ //fclose(fp);
return rc;
-}
-
-fapi::ReturnCode generic_shmoo::get_margin_dqs_by4(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk;
- uint32_t l_attr_mss_freq_margin_u32 = 0;
- uint32_t l_freq = 0;
- uint64_t l_cyc = 1000000000000000ULL;
- uint8_t l_nibble = 0;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t i_rank = 0;
- uint64_t l_factor = 0;
- uint64_t l_factor_ps = 1000000000;
- uint8_t l_SCHMOO_NIBBLES = 20;
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- //FAPI_INF(" the factor is % llu ",l_cyc);
-
- fapi::Target l_target_centaur;
- rc = fapiGetParentChip(i_target, l_target_centaur);
- if (rc)
- return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur,
- l_attr_mss_freq_margin_u32);
- if (rc)
- return rc;
- l_freq = l_attr_mss_freq_margin_u32 / 2;
- l_cyc = l_cyc / l_freq;// converting to zepto to get more accurate data
- l_factor = l_cyc / 128;
- //FAPI_INF("l_factor is % llu ",l_factor);
+ }
+ ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+ /*------------------------------------------------------------------------------
+* Function: get_margin
+* Description : This function is used to get margin for setup,hold and total eye width in Ps by using frequency
+*
+* Parameters: Target:MBA
+* ---------------------------------------------------------------------------*/
+ fapi::ReturnCode generic_shmoo::get_margin(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk, l_byte, l_nibble, l_bit;
+ uint32_t l_attr_mss_freq_margin_u32 = 0;
+ uint32_t l_freq = 0;
+ uint64_t l_cyc = 1000000000000000ULL;
+ uint8_t l_dq = 0;
+ uint8_t l_p = 0;
+ uint8_t i_rank = 0;
+ uint64_t l_factor = 0;
+ uint64_t l_factor_ps = 1000000000;
+ fapi::Target l_target_centaur;
+ rc = fapiGetParentChip(i_target, l_target_centaur);
+ if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur,
+ l_attr_mss_freq_margin_u32);
+ if (rc) return rc;
+ l_freq = l_attr_mss_freq_margin_u32 / 2;
+ l_cyc = l_cyc / l_freq;// converting to zepto to get more accurate data
+ l_factor = l_cyc / 128;
+ //FAPI_INF("l_factor is % llu ",l_factor);
+
+ for (l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; l_rnk++)
+ {
+ ////
+
+ i_rank = valid_rank1[l_p][l_rnk];
+ //
+ if (rc) return rc;
+ for (l_byte = 0; l_byte < iv_MAX_BYTES; l_byte++)
+ {
+ //Nibble loop
+ for (l_nibble = 0; l_nibble < MAX_NIBBLES; l_nibble++)
+ {
+ for (l_bit = 0; l_bit < MAX_BITS; l_bit++)
+ {
+ l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
+
+ if (iv_shmoo_type == 1)
+ {
+ if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq] == 0)
+ {
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq] = 0;
+
+
+ }
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- //FAPI_INF("\n Abhijit is here before %d \n",l_p);
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc)
- return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
+ if (iv_shmoo_param == 4)
+ {
+ if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]
+ > SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq])
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq] - 1;
+ }
+ if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]
+ < SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq])
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq] + 1;
+ }
+ }
+ else
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]- 1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq] + 1;
+ }
- //Nibble loop
- // FAPI_INF("\n Abhijit is outside %d \n",l_p);
- for (l_nibble = 0; l_nibble < l_SCHMOO_NIBBLES; l_nibble++)
- {
- //FAPI_INF("\n Abhijit 11111 is here after schmoo type=%d and port=%d \n",iv_shmoo_type,l_p);
- //FAPI_INF(" the right bound = %d and nominal = %d",SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble][l_rp]);
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble] - 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble] + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble])
- * l_factor) / l_factor_ps;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble])
- * l_factor) / l_factor_ps;//((1/uint32_t_freq*1000000)/128);
- //FAPI_INF("\n Abhijit is here after %d and port=%d \n",l_nibble,l_p);
- //FAPI_INF("\n Abhijit is here after 2 %d \n",l_rnk);
- }
- }
- }
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq]
+ = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]
+ - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq])
+ * l_factor) / l_factor_ps;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq]
+ = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq]
+ - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq])
+ * l_factor) / l_factor_ps;
+ }
+ }
+ }
+ }
+ }
- return rc;
-}
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::get_margin2(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk,l_byte,l_nibble,l_bit;
+ uint32_t l_attr_mss_freq_margin_u32 = 0;
+ uint32_t l_freq=0;
+ uint64_t l_cyc = 1000000000000000ULL;
+ uint8_t l_dq=0;
+ uint8_t l_p=0;
+ uint8_t i_rank=0;
+ uint64_t l_factor=0;
+ uint64_t l_factor_ps=1000000000;
+ fapi::Target l_target_centaur;
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_margin_u32); if(rc) return rc;
+ l_freq=l_attr_mss_freq_margin_u32/2;
+ l_cyc=l_cyc/l_freq;// converting to zepto to get more accurate data
+ l_factor=l_cyc/128;
+
+ for (l_p=0;l_p< 2;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ //////
+ i_rank=valid_rank1[l_p][l_rnk];
+ //////
+ for(l_byte=0;l_byte< 10;l_byte++)
+ {
+
+ //Nibble loop
+ for(l_nibble=0;l_nibble< 2;l_nibble++)
+ {
+ for(l_bit=0;l_bit< 4;l_bit++)
+ {
+ l_dq=8*l_byte+4*l_nibble+l_bit;
+
+ if(iv_shmoo_type==8)
+ {
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq] == 0){
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]=0;
+ if((iv_shmoo_param==4)||(iv_shmoo_param==6)){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]-1;
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]-2;
+ }
+ //FAPI_INF("\n the value of left bound after is %d \n",SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]);
+ }
+ }
+
+ if((iv_shmoo_param==4)||(iv_shmoo_param==6)){
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]-1;
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]<SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]+1;
+ }
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]-1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq]+1;
+ }
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq]=((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq])*l_factor)/l_factor_ps;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq]= ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq])*l_factor)/l_factor_ps;//((1/uint32_t_freq*1000000)/128);
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_dq]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq];
+ }
+ }
+ }
+ }
+ }
+
+ return rc;
+ }
+
+/*
+ fapi::ReturnCode generic_shmoo::print_report2(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ FAPI_INF("\nIn print report!!!\n");
+ uint8_t l_rnk, l_nibble;
+ uint8_t l_p = 0;
+ uint8_t i_rank = 0;
+ uint8_t l_mbapos = 0;
+ uint16_t l_total_margin = 0;
+ //uint8_t l_SCHMOO_NIBBLES = 20;
+ char * l_pMike = new char[128];
+ char * l_str = new char[128];
+ uint8_t l_i = 0;
+ uint8_t l_dq = 0;
+ uint8_t l_byte = 0;
+ uint8_t l_bit = 0;
+ uint8_t l_flag = 0;
+ uint8_t l_CDarray0[80] = { 0 };
+ uint8_t l_CDarray1[80] = { 0 };
+ uint8_t vrefdq_train_range[2][2][4];
+ uint32_t l_attr_mss_freq_u32 = 0;
+ uint32_t l_attr_mss_volt_u32 = 0;
+ uint8_t l_attr_eff_dimm_type_u8 = 0;
+ uint8_t l_attr_eff_num_drops_per_port_u8 = 0;
+ uint8_t l_attr_eff_dram_width_u8 = 0;
+ fapi::Target l_target_centaur;
+ uint8_t l_dram_gen = 1;
+ uint8_t base_percent = 60;
+ float index_mul_print = 0.65;
+ float vref_val_print = 0;
+
-fapi::ReturnCode generic_shmoo::get_margin_dqs_by8(const fapi::Target & i_target)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk;
- uint32_t l_attr_mss_freq_margin_u32 = 0;
- uint32_t l_freq = 0;
- uint64_t l_cyc = 1000000000000000ULL;
- uint8_t l_nibble = 0;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t i_rank = 0;
- uint64_t l_factor = 0;
- uint64_t l_factor_ps = 1000000000;
- uint8_t l_SCHMOO_NIBBLES = 20;
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target, vrefdq_train_range);if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &l_target_centaur, l_attr_mss_volt_u32); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target, l_attr_eff_dimm_type_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target, l_attr_eff_num_drops_per_port_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_attr_eff_dram_width_u8); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbapos);if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target, l_dram_gen); if(rc) return rc;
+
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 9;
- }
- //FAPI_INF(" the factor is % llu ",l_cyc);
+ if(vrefdq_train_range[0][0][0] == 1)
+ {
+ base_percent = 45;
+ }
- fapi::Target l_target_centaur;
- rc = fapiGetParentChip(i_target, l_target_centaur);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur,
- l_attr_mss_freq_margin_u32);
- if (rc) return rc;
- l_freq = l_attr_mss_freq_margin_u32 / 2;
- l_cyc = l_cyc / l_freq;// converting to zepto to get more accurate data
- l_factor = l_cyc / 128;
- //FAPI_INF("l_factor is % llu ",l_factor);
+ vref_val_print = base_percent + (iv_vref_mul * index_mul_print);
+ FAPI_INF("%s: freq = %d on %s.",i_target.toEcmdString(),l_attr_mss_freq_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s: volt = %d on %s.",i_target.toEcmdString(), l_attr_mss_volt_u32, l_target_centaur.toEcmdString());
+ FAPI_INF("%s: dimm_type = %d on %s.",i_target.toEcmdString(), l_attr_eff_dimm_type_u8, i_target.toEcmdString());
+ if ( l_attr_eff_dimm_type_u8 == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES )
+ {
+ FAPI_INF("%s: It is a CDIMM",i_target.toEcmdString());
+ }
+ else
+ {
+ FAPI_INF("%s: It is an ISDIMM",i_target.toEcmdString());
+ }
+ FAPI_INF("%s: \n Number of ranks on port = 0 is %d ",i_target.toEcmdString(),iv_MAX_RANKS[0]);
+ FAPI_INF("%s: \n Number of ranks on port = 1 is %d \n \n",i_target.toEcmdString(),iv_MAX_RANKS[1]);
+ if (iv_shmoo_type == 2)
+ {
+ FAPI_INF("\n\n********************* WR_EYE Margins ********************** \n\n");
+ sprintf(l_pMike, "\nSchmoo\tP\tP\tR\tB\tN\tBi\tNom\t\tRb\t\tLb\t\tSetup\t\tHold\t\tTotal\tfreq\tiv_ref_mul ");
+
+ }
+ else
+ {
+ FAPI_INF("\n\n********************* RD_EYE Margins ********************** \n\n");
+ sprintf(l_pMike, "\nSchmoo\tP\tP\tR\tB\tN\tBi\tNom\t\tRb\t\tLb\t\tSetup\t\tHold\t\tTotal\t\tfreq\t\tiv_ref_mul ");
+ }
+ //printf("Schmoo POS\tPort\tRank\tByte\tnibble\tbit\tNominal\t\tSetup_Limit\tHold_Limit \n");
+ FAPI_INF("%s", l_pMike);
+ delete[] l_pMike;
+
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- //FAPI_INF("\n Abhijit is here before %d \n",l_p);
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
- //Nibble loop
- //FAPI_INF("\n Abhijit is outside %d \n",l_p);
- for (l_nibble = 0; l_nibble < l_SCHMOO_NIBBLES; l_nibble++)
- {
- if (iv_dmm_type == 0)
- {
- if ((l_nibble % 2))
- {
- continue;
- }
- }
- //FAPI_INF("\n Abhijit 11111 is here after schmoo type=%d and port=%d \n",iv_shmoo_type,l_p);
- //FAPI_INF(" the port=%d rank=%d byte=%d right bound = %d and nominal = %d",l_p,i_rank,l_nibble,SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble][l_rp]);
- //FAPI_INF(" the port=%d rank=%d byte=%d left bound = %d and nominal = %d",l_p,i_rank,l_nibble,SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble][l_rp],SHMOO[iv_shmoo_type].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble][l_rp]);
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble] - 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble]
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble] + 1;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.rb_regval[l_nibble]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble])
- * l_factor) / l_factor_ps;
- SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble]
- = ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.curr_val[l_nibble]
- - SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.lb_regval[l_nibble])
- * l_factor) / l_factor_ps;
- }
- }
- }
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc)return rc;
- return rc;
-}
-/*------------------------------------------------------------------------------
- * Function: get_min_margin
- * Description : This function is used to get the minimum margin of all the schmoo margins
- *
- * Parameters: Target:MBA,right minimum margin , left minimum margin, pass fail
- * ---------------------------------------------------------------------------*/
-fapi::ReturnCode generic_shmoo::get_min_margin(const fapi::Target & i_target,
- uint32_t *o_right_min_margin,
- uint32_t *o_left_min_margin)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk, l_byte, l_nibble, l_bit, i_rank;
- uint16_t l_temp_right = 4800;
- uint16_t l_temp_left = 4800;
- //uint8_t l_dq = 0;
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t l_i = 0;
- uint8_t l_dq = 0;
- uint8_t l_flag = 0;
- uint8_t l_CDarray0[80] = { 0 };
- uint8_t l_CDarray1[80] = { 0 };
-
- rc = mcb_error_map(i_target, mcbist_error_map, l_CDarray0, l_CDarray1,
- count_bad_dq);
- if (rc)
- {
- FAPI_ERR("generic_shmoo::print report: mcb_error_map failed!!");
- return rc;
- }
+ for (l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; l_rnk++)
+ {
+ //////
+
+ i_rank = valid_rank1[l_p][l_rnk];
+ ////
+
+ for (l_byte = 0; l_byte < iv_MAX_BYTES; l_byte++)
+ {
+ //Nibble loop
+ for (l_nibble = 0; l_nibble < MAX_NIBBLES; l_nibble++)
+ {
+
+ l_dq=8 * l_byte + 4 * l_nibble;
+ l_flag=0;
+ if (l_p == 0)
+ {
+ for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
+ {
+ if (l_CDarray0[l_i] == l_dq)
+ {
+ l_flag=1;
+
+ }
+ }
+ }
+ else
+ {
+ for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
+ {
+ if (l_CDarray1[l_i] == l_dq)
+ {
+ l_flag=1;
+
+ }
+ }
+ }
+
+ if(l_flag==1)
+ {
+ //printf("Would normally skip prints...\n");
+ //continue;
+ }
+ for (l_bit = 0; l_bit < MAX_BITS; l_bit++)
+ {
+ l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
+ l_total_margin
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq]
+ + SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq];
+ if(l_dram_gen ==2)
+ {
+ sprintf(l_str, "%d\t%d\t%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%f",
+ l_mbapos, l_p, i_rank, l_byte, l_nibble, l_bit,
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq],
+ l_total_margin, l_attr_mss_freq_u32, vref_val_print);
+
+ }
+ else
+ {
+ sprintf(l_str, "%d\t%d\t%d\t%d\t%d\t%d\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d\t\t%d",
+ l_mbapos, l_p, i_rank, l_byte, l_nibble, l_bit,
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq],
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq],
+ l_total_margin, l_attr_mss_freq_u32, iv_vref_mul);
+ }
+ if (iv_shmoo_type == 2)
+ {
+ FAPI_INF("\nWR_EYE %s ", l_str);
+
+ }
+ else if (iv_shmoo_type == 8)
+ {
+ FAPI_INF("\nRD_EYE %s ", l_str);
+
+ }
+ }
+ }
+ }
+ }
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
- for (l_byte = 0; l_byte < iv_MAX_BYTES; ++l_byte)
- {
- //Nibble loop
- for (l_nibble = 0; l_nibble < MAX_NIBBLES; ++l_nibble)
- {
- l_dq=8 * l_byte + 4 * l_nibble;
- l_flag=0;
- if (l_p == 0)
- {
- for (l_i = 0; l_i < count_bad_dq[0]; l_i++)
- {
- if (l_CDarray0[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
- else
- {
- for (l_i = 0; l_i < count_bad_dq[1]; l_i++)
- {
- if (l_CDarray1[l_i] == l_dq)
- {
- l_flag=1;
-
- }
- }
- }
+ delete[] l_str;
+
+ return rc;
+ }
+*/ //end of print report test code
+
+ fapi::ReturnCode generic_shmoo::get_margin_dqs_by4(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk;
+ uint32_t l_attr_mss_freq_margin_u32 = 0;
+ uint32_t l_freq=0;
+ uint64_t l_cyc = 1000000000000000ULL;
+ uint8_t l_nibble=0;
+ uint8_t l_p=0;
+ uint8_t i_rank=0;
+ uint64_t l_factor=0;
+ uint64_t l_factor_ps=1000000000;
+ uint8_t l_SCHMOO_NIBBLES=20;
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ //FAPI_INF(" the factor is % llu ",l_cyc);
+
+ fapi::Target l_target_centaur;
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_margin_u32); if(rc) return rc;
+ l_freq=l_attr_mss_freq_margin_u32/2;
+ l_cyc=l_cyc/l_freq;// converting to zepto to get more accurate data
+ l_factor=l_cyc/128;
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ i_rank=valid_rank1[l_p][l_rnk];
+ //Nibble loop
- if(l_flag==1)
+ for(l_nibble=0;l_nibble<l_SCHMOO_NIBBLES;l_nibble++)
+ {
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]-1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble]+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble]=((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble])*l_factor)/l_factor_ps;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble]= ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble])*l_factor)/l_factor_ps;//((1/uint32_t_freq*1000000)/128);
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble];
+
+ }
+ }
+ }
+ return rc;
+ }
+
+ fapi::ReturnCode generic_shmoo::get_margin_dqs_by8(const fapi::Target & i_target)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk;
+ uint32_t l_attr_mss_freq_margin_u32 = 0;
+ uint32_t l_freq=0;
+ uint64_t l_cyc = 1000000000000000ULL;
+ //uint8_t l_dq=0;
+ uint8_t l_nibble=0;
+
+ uint8_t l_p=0;
+ uint8_t i_rank=0;
+ uint64_t l_factor=0;
+ uint64_t l_factor_ps=1000000000;
+ uint8_t l_SCHMOO_NIBBLES=20;
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=9;
+ }
+
+ //FAPI_INF(" the factor is % llu ",l_cyc);
+
+ fapi::Target l_target_centaur;
+ rc = fapiGetParentChip(i_target, l_target_centaur); if(rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &l_target_centaur, l_attr_mss_freq_margin_u32); if(rc) return rc;
+ l_freq=l_attr_mss_freq_margin_u32/2;
+ l_cyc=l_cyc/l_freq;// converting to zepto to get more accurate data
+ l_factor=l_cyc/128;
+ //FAPI_INF("l_factor is % llu ",l_factor);
+
+
+
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ //FAPI_INF("\n Abhijit is here before %d \n",l_p);
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ i_rank=valid_rank1[l_p][l_rnk];
+ //Nibble loop
+ for(l_nibble=0;l_nibble < l_SCHMOO_NIBBLES;l_nibble++)
+ {
+ if(iv_dmm_type==0)
{
- continue;
- }
+ if((l_nibble%2)){
+ continue ;
+ }
+ }
- for (l_bit = 0; l_bit < MAX_BITS; ++l_bit)
- {
- l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq]
- < l_temp_right)
- {
- l_temp_right
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_dq];
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq]
- < l_temp_left)
- {
- l_temp_left
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_dq];
- }
- }
- }
- }
- }
- }
-
- // hacked for now till schmoo is running
- if (iv_shmoo_type == 1)
- {
- *o_right_min_margin = l_temp_left;
- *o_left_min_margin = l_temp_right;
- }
- else
- {
- *o_right_min_margin = l_temp_right;
- *o_left_min_margin = l_temp_left;
- }
- return rc;
-}
-
-fapi::ReturnCode generic_shmoo::get_min_margin_dqs(const fapi::Target & i_target,
- uint32_t *o_right_min_margin,
- uint32_t *o_left_min_margin)
-{
- fapi::ReturnCode rc;
- uint8_t l_rnk, l_nibble, i_rank;
- uint16_t l_temp_right = 4800;
- uint16_t l_temp_left = 4800;
-
- uint8_t l_rp = 0;
- uint8_t l_p = 0;
- uint8_t l_attr_eff_dram_width_u8 = 0;
-
- uint8_t l_SCHMOO_NIBBLES = 20;
- uint8_t l_by8_dqs = 0;
-
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target,
- l_attr_eff_dram_width_u8);
- if (rc) return rc;
-
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 18;
- }
-
- if (l_attr_eff_dram_width_u8 == 8)
- {
- l_SCHMOO_NIBBLES = 10;
- if (iv_dmm_type == 1)
- {
- l_SCHMOO_NIBBLES = 9;
- }
- }
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]-1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble]+1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble]=((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.rb_regval[l_nibble]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble])*l_factor)/l_factor_ps;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble]= ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.nom_val[l_nibble]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.lb_regval[l_nibble])*l_factor)/l_factor_ps;//((1/uint32_t_freq*1000000)/128);
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_nibble]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble];
+ }
+ }
+
+ }
+ return rc;
+ }
- for (l_p = 0; l_p < MAX_PORT; l_p++)
- {
- for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; ++l_rnk)
- {
- rc = mss_getrankpair(i_target, l_p, 0, &l_rp, valid_rank);
- if (rc) return rc;
- i_rank = valid_rank[l_rnk];
- rc = mss_getrankpair(i_target, l_p, i_rank, &l_rp, valid_rank);
- if (rc) return rc;
+ fapi::ReturnCode generic_shmoo::knob_update_bin_composite(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag)
+ {
+
+ fapi::ReturnCode rc;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase data_buffer_64_1(64);
+ input_type_t l_input_type_e = WR_DQ;
+ uint8_t l_n=0;
+ access_type_t l_access_type_e = WRITE;
+ uint8_t l_dq = 0;
+ uint8_t l_i=0;
+ uint8_t l_flag_p0=0;
+ uint8_t l_flag_p1=0;
+ FAPI_INF("SHMOOING VIA COMPOSITE EYE FW !!!!");
+ uint8_t l_p=0;
+ uint8_t rank=0;
+ uint8_t l_rank=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t l_status=1;
+ uint8_t l_CDarray0[80]={0};
+ uint8_t l_CDarray1[80]={0};
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ if(iv_shmoo_type == 2)
+ {l_input_type_e = WR_DQ;}
+ else if(iv_shmoo_type == 8)
+ { l_input_type_e = RD_DQ;}
+ else if(iv_shmoo_type == 4)
+ {l_input_type_e = WR_DQS;}
+ else if(iv_shmoo_type == 16)
+ {l_input_type_e = RD_DQS;}
+
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+
+
+ //Reset schmoo_error_map
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++){
+ for(int i=0;i<iv_MAX_RANKS[l_p];i++){
+
+ rank=valid_rank1[l_p][i];
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ schmoo_error_map[l_p][rank][l_n]=0;
+ binary_done_map[l_p][rank][l_n]=0;
+ }
+ }
+ }
+ int count_cycle = 0;
+
+ if(bound==RIGHT)
+ {
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++){
+ do{
+
+
+ l_status=0;
+
- for (l_nibble = 0; l_nibble < l_SCHMOO_NIBBLES; ++l_nibble)
- {
- l_by8_dqs = l_nibble;
- if (iv_dmm_type == 0)
- {
- if (l_attr_eff_dram_width_u8 == 8)
- {
- l_nibble = l_nibble * 2;
- }
- }
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ //l_dq+l_n*4=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ //printf ("Current Rank : %d",rank );
+
+ for(l_dq = 0; l_dq < 4;l_dq++){
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ if(binary_done_map[l_p][rank][l_n]==0){
+ l_status=1;
+ }
+ l_flag_p0=0;
+ l_flag_p1=0;
+ if(l_p == 0){
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+ if(l_CDarray0[l_i]==l_dq+l_n*4){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p0=1;
+
+ }
+ }
+ }else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq+l_n*4){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p1=1;
+
+ }
+ }
+ }
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+ }
+ else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4];
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+ // printf("\n the right bound for port=%d rank=%d dq=%d is %d \n",l_p,rank,l_dq+l_n*4,FAPI_INF.MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]);
+ }
+ }
+ else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4];
+ }
+ if(l_p==0){
+ if(l_flag_p0==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=1;
+ }
+ }
+ else{
+ if(l_flag_p1==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=1;
+ }
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.rb_regval[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+
+ }
+ }
+ //l_dq+l_n*4=l_dq+l_n*4+4;
+ }
+ }
+ }
+
+
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+ //FAPI_INF("\n the status =%d \n",l_status);
+ count_cycle++;
+ }while(l_status==1);
+ }
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ //l_dq+l_n*4=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ for(l_dq = 0; l_dq < 4;l_dq++){
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq+l_n*4]);if(rc) return rc;
+ //l_dq+l_n*4=l_dq+l_n*4+4;
+ }
+ }
+ }
+ }
+
+
+
+
+ }
+ count_cycle = 0;
+ if(bound==LEFT)
+ {
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ l_status = 1;
+ //printf("\n +++ Inside LEFT bound -- bin ");
+ while(l_status==1)
+ {
+ l_status=0;
+
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble]
- < l_temp_right)
- {
- l_temp_right
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.right_margin_val[l_nibble];
- }
- if (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble]
- < l_temp_left)
- {
- l_temp_left
- = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[l_rnk].K.left_margin_val[l_nibble];
- }
+ rc=mcb_error_map(i_target,mcbist_error_map,l_CDarray0,l_CDarray1,count_bad_dq);if(rc) return rc;
+
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++){
+ //l_dq+l_n*4=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ //printf ("Current Rank : %d",rank );
+
+ for(l_dq = 0; l_dq < 4;l_dq++){
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+
+ if(binary_done_map[l_p][rank][l_n]==0){
+ l_status=1;}
+
+ l_flag_p0=0;
+ l_flag_p1=0;
+ if(l_p == 0){
+ for(l_i=0;l_i<count_bad_dq[0];l_i++){
+ if(l_CDarray0[l_i]==l_dq+l_n*4){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p0=1;
+
+ }
+ }
+ }
+ else{
+ for(l_i=0;l_i<count_bad_dq[1];l_i++){
+
+ if(l_CDarray1[l_i]==l_dq+l_n*4){
+ schmoo_error_map[l_p][rank][l_n]=1;
+ l_flag_p1=1;
+
+ }
+ }
+ }
+
+ if(schmoo_error_map[l_p][rank][l_n]==0){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4];
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+
+ }
+ }else{
+
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4];
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]=(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]+SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4])/2;
+
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_val[l_dq+l_n*4]);if(rc) return rc;
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]>SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+ }else{
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4]-SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_pass[l_dq+l_n*4];
+ }
+
+
+ if(l_p==0){
+ if(l_flag_p0==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=1;
+ }
+ }
+ else{
+ if(l_flag_p1==1){
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]=1;
+ }
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.curr_diff[l_dq+l_n*4]<=1){
+ binary_done_map[l_p][rank][l_n]=1;
+ SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.lb_regval[l_dq+l_n*4]=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.last_fail[l_dq+l_n*4];
+
+ }
+ }
+ //l_dq+l_n*4=l_dq+l_n*4+4;
+ }
+ }
+ }
+ rc=do_mcbist_reset(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_reset failed");
+ return rc;
+ }
+ rc=do_mcbist_test(i_target);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+ rc=check_error_map(i_target,l_p,pass);
+ if(rc)
+ {
+ FAPI_INF("generic_shmoo::find_bound do_mcbist_test failed");
+ return rc;
+ }
+
+
+ //printf("\n the status =%d \n",l_status);
+ count_cycle++;
+ }
+ }
+
+ for(l_p = 0; l_p < MAX_PORT; l_p++)
+ {
+ for (l_rank=0;l_rank<iv_MAX_RANKS[l_p];l_rank++)
+ {
+ //l_dq+l_n*4=bit;
+ //////
+ rank=valid_rank1[l_p][l_rank];
+ //printf("Valid rank of %d %d %d %d %d %d %d %d",valid_rank1[0],valid_rank1[1],valid_rank1[2],valid_rank1[3],valid_rank1[4],valid_rank1[5],valid_rank1[6],valid_rank1[7]);
+ for(l_dq = 0; l_dq < 4;l_dq++){
+ for (l_n=0; l_n<l_SCHMOO_NIBBLES;l_n++){
+ rc=mss_access_delay_reg_schmoo(i_target,l_access_type_e,l_p,rank,l_input_type_e,l_dq+l_n*4,0,SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[rank].K.nom_val[l_dq+l_n*4]);if(rc) return rc;
+ //l_dq+l_n*4=l_dq+l_n*4+4;
+ }
+ }
+ }
+ }
+
+ } // End of LEFT
+
+
+ return rc;
- if (iv_dmm_type == 0)
- {
- if (l_attr_eff_dram_width_u8 == 8)
- {
- l_nibble = l_by8_dqs;
- }
- }
- }
- }
- }
- // hacked for now till schmoo is running
- *o_right_min_margin = l_temp_left;
- *o_left_min_margin = l_temp_right;
+ }
- return rc;
-}
+ fapi::ReturnCode generic_shmoo::get_nibble_pda(const fapi::Target & i_target,uint32_t pda_nibble_table[2][2][16][2])
+ {
+ fapi::ReturnCode rc;
+ uint8_t i_rank = 0;
+
+ for (int l_p=0;l_p < MAX_PORT;l_p++){
+ for (int l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ ////
+ i_rank=valid_rank1[l_p][l_rnk];
+ for(int l_dq = 0; l_dq < 4;l_dq++){
+ for (int l_n=0; l_n < 16;l_n++){
+ // do necessary
+ //if(pda_nibble_table[l_p][i_rank][l_n][1] < FAPI_INF.MBA.P[l_p].S[i_rank].K.total_margin[l_dq+l_n*4])
+ {
+ pda_nibble_table[l_p][i_rank][l_n][0] = iv_vref_mul;
+ pda_nibble_table[l_p][i_rank][l_n][1] = SHMOO[iv_DQS_ON].MBA.P[l_p].S[i_rank].K.total_margin[l_dq+l_n*4];
+ }
+ //FAPI_INF("\n Port %d Rank:%d Pda_Nibble: %d V-ref:%d Margin:%d",l_p,i_rank,l_n,pda_nibble_table[l_p][i_rank][l_n][0],pda_nibble_table[l_p][i_rank][l_n][1]);
+ }
+ }
+
+ }
+ }
+ return rc;
+ }
+ /*------------------------------------------------------------------------------
+* Function: get_min_margin
+* Description : This function is used to get the minimum margin of all the schmoo margins
+*
+* Parameters: Target:MBA,right minimum margin , left minimum margin, pass fail
+* ---------------------------------------------------------------------------*/
+
+ fapi::ReturnCode generic_shmoo::get_min_margin2(const fapi::Target & i_target,uint32_t *o_right_min_margin,uint32_t *o_left_min_margin)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk,l_byte,l_nibble,l_bit,i_rank;
+ uint16_t l_temp_right=4800;
+ uint16_t l_temp_left=4800;
+ uint8_t l_dq=0;
+ uint8_t l_p=0;
+ FAPI_INF("In GET_MIN_MARGIN - iv_shmoo_type = %d",iv_shmoo_type);
+
+ for (l_p = 0; l_p < 2; l_p++)
+ {
+ for (l_rnk = 0; l_rnk < iv_MAX_RANKS[l_p]; l_rnk++)
+ {
+
+ i_rank = valid_rank1[l_p][l_rnk];
+ ////
+ if (rc) return rc;
+ for (l_byte = 0; l_byte < 10; l_byte++)
+ {
+ //Nibble loop
+ for (l_nibble = 0; l_nibble < 2; l_nibble++)
+ {
+ //l_dq=8 * l_byte + 4 * l_nibble;
+
+
+ for (l_bit = 0; l_bit < 4; l_bit++)
+ {
+ l_dq = 8 * l_byte + 4 * l_nibble + l_bit;
+ if ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq]
+ < l_temp_right) && (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq] != 0 ))
+ {
+ l_temp_right
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_dq];
+ }
+ if ((SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq]
+ < l_temp_left) && (SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq] !=0))
+ {
+ l_temp_left
+ = SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_dq];
+ }
+ }
+ }
+ }
+ }
+ }
+
+
+
+ if(iv_shmoo_type==8)
+ {
+ *o_right_min_margin=l_temp_left;
+ *o_left_min_margin=l_temp_right;
+ }else{
+ *o_right_min_margin=l_temp_right;
+ *o_left_min_margin=l_temp_left;
+ }
+ return rc;
+ }
+
+
+ fapi::ReturnCode generic_shmoo::get_min_margin_dqs(const fapi::Target & i_target,uint32_t *o_right_min_margin,uint32_t *o_left_min_margin)
+ {
+ fapi::ReturnCode rc;
+ uint8_t l_rnk,l_nibble,i_rank;
+ uint16_t l_temp_right=4800;
+ uint16_t l_temp_left=4800;
+ uint8_t l_p=0;
+ uint8_t l_attr_eff_dram_width_u8=0;
+ uint8_t l_SCHMOO_NIBBLES=20;
+ uint8_t l_by8_dqs=0;
+
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target, l_attr_eff_dram_width_u8); if(rc) return rc;
+
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=18;
+ }
+
+ if(l_attr_eff_dram_width_u8 == 8){
+ l_SCHMOO_NIBBLES=10;
+ if(iv_dmm_type==1)
+ {
+ l_SCHMOO_NIBBLES=9;
+ }
+ }
+ iv_shmoo_type=4;
+
+ for (l_p=0;l_p<MAX_PORT;l_p++){
+ for (l_rnk=0;l_rnk<iv_MAX_RANKS[l_p];l_rnk++)
+ {
+ i_rank=valid_rank1[l_p][l_rnk];
+
+
+ for(l_nibble=0;l_nibble< l_SCHMOO_NIBBLES;l_nibble++)
+ {
+
+ l_by8_dqs=l_nibble;
+ if(iv_dmm_type==0)
+ {
+ if(l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble=l_nibble*2;
+ }
+ }
+
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble]<l_temp_right)
+ {
+ l_temp_right=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.right_margin_val[l_nibble];
+ }
+ if(SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble]<l_temp_left)
+ {
+ l_temp_left=SHMOO[iv_SHMOO_ON].MBA.P[l_p].S[i_rank].K.left_margin_val[l_nibble];
+ }
+
+ if(iv_dmm_type==0)
+ {
+ if(l_attr_eff_dram_width_u8 == 8)
+ {
+ l_nibble=l_by8_dqs;
+ }
+ }
+ }
+ }
+ }
+
+
+ // hacked for now till schmoo is running
+ if(iv_shmoo_type==8)
+ {
+ *o_right_min_margin=l_temp_left;
+ *o_left_min_margin=l_temp_right;
+ }else{
+ *o_right_min_margin=l_temp_right;
+ *o_left_min_margin=l_temp_left;
+ }
+ return rc;
+ }
+ ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-fapi::ReturnCode generic_shmoo::schmoo_setup_mcb(const fapi::Target & i_target)
-{
+ fapi::ReturnCode generic_shmoo::schmoo_setup_mcb(const fapi::Target & i_target)
+ {
- struct Subtest_info l_sub_info[30];
- uint32_t l_pattern = 0;
- uint32_t l_testtype = 0;
- mcbist_byte_mask i_mcbbytemask1;
- char l_str_cust_addr[] = "ba0,ba1,mr3,mr2,mr1,mr0,ba2,ba3,cl2,cl3,cl4,cl5,cl6,cl7,cl8,cl9,cl11,cl13,r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15,r16,sl2,sl1,sl0";
+ struct Subtest_info l_sub_info[30];
+ uint32_t l_pattern = 0;
+ uint32_t l_testtype = 0;
+ mcbist_byte_mask i_mcbbytemask1;
+ char l_str_cust_addr[] = "ba0,ba1,mr3,mr2,mr1,mr0,ba2,ba3,cl2,cl3,cl4,cl5,cl6,cl7,cl8,cl9,cl11,cl13,r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15,r16,sl2,sl1,sl0";
- i_mcbbytemask1 = UNMASK_ALL;
+ i_mcbbytemask1 = UNMASK_ALL;
- fapi::ReturnCode rc;
+ fapi::ReturnCode rc;
- l_pattern = iv_pattern;
- l_testtype = iv_test_type;
+ l_pattern = iv_pattern;
+ l_testtype = iv_test_type;
- if (iv_shmoo_type == 16)
- {
- FAPI_INF("%s:\n Read DQS is running \n", i_target.toEcmdString());
- if (iv_SHMOO_ON == 1)
- {
- l_testtype = 3;
- }
- if (iv_SHMOO_ON == 2)
- {
- l_testtype = 4;
- }
- }
- //send shmoo mode to vary the address range
- if (iv_shmoo_type == 16)
- {
- rc = FAPI_ATTR_SET(ATTR_MCBIST_PATTERN, &i_target, l_pattern);
- if (rc) return rc;//-----------i_mcbpatt------->run
- rc = FAPI_ATTR_SET(ATTR_MCBIST_TEST_TYPE, &i_target, l_testtype);
- if (rc) return rc;//---------i_mcbtest------->run
- }
+ if (iv_shmoo_type == 16)
+ {
+ FAPI_INF("%s:\n Read DQS is running \n", i_target.toEcmdString());
+ if (iv_SHMOO_ON == 1)
+ {
+ l_testtype = 3;
+ }
+ if (iv_SHMOO_ON == 2)
+ {
+ l_testtype = 4;
+ }
+ }
+ //send shmoo mode to vary the address range
+ if (iv_shmoo_type == 16)
+ {
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_PATTERN, &i_target, l_pattern);
+ if (rc) return rc;//-----------i_mcbpatt------->run
+ rc = FAPI_ATTR_SET(ATTR_MCBIST_TEST_TYPE, &i_target, l_testtype);
+ if (rc) return rc;//---------i_mcbtest------->run
+ }
- rc = setup_mcbist(i_target, i_mcbbytemask1, 0,0x0ull ,l_sub_info,l_str_cust_addr);
- if (rc) return rc;
+ rc = setup_mcbist(i_target, i_mcbbytemask1, 0,0x0ull ,l_sub_info,l_str_cust_addr);
+ if (rc) return rc;
- return rc;
-}
+ return rc;
+ }
}//Extern C
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.H
index 61a383761..f18bb550d 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.H
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2014 */
+/* Contributors Listed Below - COPYRIGHT 2012,2015 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_generic_shmoo.H,v 1.27 2014/01/23 19:41:31 sasethur Exp $
+// $Id: mss_generic_shmoo.H,v 1.29 2015/08/07 11:28:52 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -33,14 +33,16 @@
// *! DESCRIPTION : Memory Subsystem Generic Shmoo -- abstraction for HB
// *! CONTEXT : To make all shmoos share a common abstraction layer
// *!
-// *! OWNER NAME : Abhijit Saurabh Email: abhijit.saurabh@in.ibm.com
-// *! BACKUP NAME :
+// *! OWNER NAME : Preetham Hosmane Email: preeragh@in.ibm.com
+// *! BACKUP NAME : Saravanan Sethuraman
// *!
// *!***************************************************************************
// CHANGE HISTORY:
//------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|--------|--------------------------------------------------
+// 1.29 |preeragh|30/07/15| Optimized for FW Linear/Composite/Bin
+// 1.28 |preeragh|06/22/14|DDR4 Mods
// 1.27 |mjjones |01/24/14|RAS Review Updates
// 1.26 |abhijit |01/17/14|enabled one more function
// 1.24 |abhijit |12/17/13|modified as per to support firmware
@@ -80,17 +82,17 @@ private:
struct RANK
{
shmoo_knob_data_t K; // Set of knobs used by this shmoo
- }S[MAX_RANK_DIMM];
- }P[MAX_PORT];
+ }S[MAX_RANK]; //Max Rank are 8
+ }P[MAX_PORT]; // Max Port 2
}MBA;
shmoo_knob_config_t static_knob; // Static info regarding the knob
- }SHMOO[MAX_SHMOO]; // Denote max shmoo scenarios we have
+ }SHMOO[MAX_SHMOO]; // Denote max shmoo scenarios we have; Have 2; so that one for WR/RD and other Clock.
//! Result Data
uint8_t convergence_gap;
shmoo_algorithm_t algorithm;
shmoo_mode mcbist_mode;
- uint8_t mcbist_error_map[MAX_PORT][MAX_RANK][MAX_BYTE][MAX_NIBBLES];
+ uint8_t mcbist_error_map[MAX_PORT][MAX_RANK][MAX_BYTE][MAX_NIBBLES]; //MAX byte is 10; Max Nibble are 2;
uint8_t count_bad_dq[MAX_PORT];
uint8_t schmoo_error_map[MAX_PORT][MAX_RANK][20];
uint8_t binary_done_map[MAX_PORT][MAX_RANK][20];
@@ -102,11 +104,13 @@ private:
uint32_t iv_test_type;
uint8_t iv_dmm_type;
uint8_t iv_SHMOO_ON;
+ uint8_t iv_DQS_ON;
uint8_t iv_shmoo_type;
uint16_t iv_shmoo_param;
uint16_t iv_binary_diff;
uint16_t iv_vref_mul;
uint8_t valid_rank[MAX_RANK];
+ uint8_t valid_rank1[MAX_PORT][MAX_RANK];
public:
@@ -165,8 +169,10 @@ public:
fapi::ReturnCode print_report(const fapi::Target & i_target);
fapi::ReturnCode print_report_dqs(const fapi::Target & i_target);
+ fapi::ReturnCode print_report_dqs2(const fapi::Target & i_target);
fapi::ReturnCode get_margin(const fapi::Target & i_target);
+ fapi::ReturnCode get_margin2(const fapi::Target & i_target);
fapi::ReturnCode get_margin_dqs_by8(const fapi::Target & i_target);
@@ -175,6 +181,9 @@ public:
fapi::ReturnCode get_min_margin(const fapi::Target & i_target,
uint32_t *o_right_min_margin,
uint32_t *o_left_min_margin);
+ fapi::ReturnCode get_min_margin2(const fapi::Target & i_target,
+ uint32_t *o_right_min_margin,
+ uint32_t *o_left_min_margin);
fapi::ReturnCode get_min_margin_dqs(const fapi::Target & i_target,
uint32_t *o_right_min_margin,
@@ -186,6 +195,8 @@ public:
fapi::ReturnCode check_error_map(const fapi::Target & i_target,
uint8_t port,uint8_t &pass);
+ fapi::ReturnCode check_error_map2(const fapi::Target & i_target,
+ uint8_t port,uint8_t &pass);
fapi::ReturnCode sanity_check(const fapi::Target & i_target);
@@ -213,6 +224,9 @@ public:
fapi::ReturnCode shmoo_save_rest(const fapi::Target & i_target,
uint64_t i_content_array[],
uint8_t i_mode);
+ fapi::ReturnCode get_nibble_pda(const fapi::Target & i_target,uint32_t pda_nibble_table[2][2][16][2]);
+ fapi::ReturnCode knob_update_bin_composite(const fapi::Target & i_target,bound_t bound,uint8_t scenario,uint8_t bit,uint8_t pass,bool &flag);
+ fapi::ReturnCode print_report2(const fapi::Target & i_target);
};
#endif
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C
index 88ddf0108..c70653e08 100755
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_mcbist.C,v 1.55 2015/05/13 19:32:22 sglancy Exp $
+// $Id: mss_mcbist.C,v 1.57 2015/08/26 16:17:41 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -33,16 +33,15 @@
// *! DESCRIPTION : MCBIST Procedures
// *! CONTEXT :
// *!
-// *! OWNER NAME : Hosmane, Preetham Email: preeragh@in.ibm.com
+// *! OWNER NAME : Hosmane, Preetham Email: preeragh@in.ibm.com
// *! BACKUP : Sethuraman, Saravanan Email: saravanans@in.ibm.com
// *!***************************************************************************
// CHANGE HISTORY:
//------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|--------|--------------------------------------------------
-// 1.55 |sglancy |05/13/15| Fixed FW compile issue
-// 1.54 |sglancy |05/05/15| Fixed FW compile issue
-// 1.53 |sglancy |05/05/15| Added #ifdefs around non-FW compliant code
+// 1.57 |preeragh|08/25/15| FW Review Comments MPR
+// 1.53 |preeragh|06/22/15| Added MPR
// 1.52 |sglancy |02/16/15| Merged in FW comments with lab needs
// 1.51 |sglancy |02/09/15| Fixed FW comments and adjusted whitespace
// 1.50 |preeragh|01/16/15| Fixed FW comments
@@ -606,7 +605,42 @@ fapi::ReturnCode cfg_mcb_dgen(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFDSPQ_0x030106c7, l_spare_data_buffer_64);
if (rc) return rc;
}
- else if ((i_datamode == DATA_GEN_DELTA_I) ||
+ else if(i_datamode == MPR)
+ {
+ l_var = 0x0000000000000000ull;
+ l_var1 =0xFFFFFFFFFFFFFFFFull;
+ l_spare = 0x00FF00FF00FF00FFull;
+
+ rc_num = l_spare_data_buffer_64.setDoubleWord(0, l_spare);
+ rc_num |= l_var_data_buffer_64.setDoubleWord(0, l_var);
+ rc_num |= l_var1_data_buffer_64.setDoubleWord(0, l_var1);
+ if (rc_num)
+ {
+ FAPI_ERR("cfg_mcb_dgen:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD0Q_0x030106be, l_var_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD1Q_0x030106bf, l_var1_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD2Q_0x030106c0, l_var_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD3Q_0x030106c1, l_var1_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD4Q_0x030106c2, l_var_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD5Q_0x030106c3, l_var1_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD6Q_0x030106c4, l_var_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFD7Q_0x030106c5, l_var1_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFDQ_0x030106c6 , l_spare_data_buffer_64); if(rc) return rc;
+
+ rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBFDSPQ_0x030106c7 , l_spare_data_buffer_64); if(rc) return rc;
+ }
+ else if ((i_datamode == DATA_GEN_DELTA_I) ||
(i_datamode == MCBIST_2D_CUP_PAT0))
{
l_var = 0xFFFFFFFFFFFFFFFFull;
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H
index c3b54041b..9782c338a 100755
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_mcbist.H,v 1.47 2015/02/16 19:56:22 sglancy Exp $
+// $Id: mss_mcbist.H,v 1.49 2015/08/07 11:09:15 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -40,6 +40,8 @@
//-------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|---------|--------------------------------------------------
+// 1.49 |preeragh|7/26/15 | Added RW infinite
+// 1.48 |lapietra|6/26/15 | Added RMWFIX and RMWFIX_I tests
// 1.47 |sglancy |12/16/14| Merged FW comments with lab debugging needs
// 1.46 |preeragh|12/15/14| Revert back, removed rwheeler changes
// 1.43 |rwheeler|11/19/14|option to pass in rotate data seed
@@ -145,7 +147,11 @@ enum mcbist_test_mem
MCB_2D_CUP_SEQ,
MCB_2D_CUP_RAND,
SHMOO_STRESS_INFINITE,
- HYNIX_1_COL
+ HYNIX_1_COL,
+ RMWFIX,
+ RMWFIX_I,
+ W_INFINITE,
+ R_INFINITE
};
enum mcbist_data_gen
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C
index 0cb18e1f1..2d353e388 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_mcbist_address.C,v 1.21 2015/06/08 16:39:04 lwmulkey Exp $
+// $Id: mss_mcbist_address.C,v 1.26 2015/07/24 08:32:13 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998, 2013
// *! All Rights Reserved -- Property of IBM
@@ -40,6 +40,9 @@
//-------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|---------|--------------------------------------------------
+// 1.26 |preeragh|22-Jul-15| 64bit compile fix
+// 1.25 |preeragh|22-Jun-15| DDR4 - Mods and fixes
+// 1.24 |lwmulkey|15-JUN-15| Add 2H CDIMM support
// 1.20 |lwmulkey|06-JUN-15| Add slave rank support
// 1.17 |sglancy |16-FEB-15| Merged FW comments with lab debugging needs
// 1.17 |preeragh|15-Dec-14| Fix FW Review Comments
@@ -66,28 +69,19 @@ using namespace fapi;
#define DELIMITERS ","
-fapi::ReturnCode address_generation(const fapi::Target & i_target_mba,
- uint8_t i_port,
- mcbist_addr_mode i_addr_type,
- interleave_type i_add_inter_type,
- uint8_t i_rank,
- uint64_t &io_start_address,
- uint64_t &io_end_address,
- char * l_str_cust_addr)
+fapi::ReturnCode address_generation(const fapi:: Target & i_target_mba,uint8_t i_port,mcbist_addr_mode i_addr_type,interleave_type i_add_inter_type,uint8_t i_rank,uint64_t &io_start_address, uint64_t &io_end_address, char * l_str_cust_addr)
{
fapi::ReturnCode rc;
uint8_t l_num_ranks_per_dimm[MAX_VALUE_TWO][MAX_VALUE_TWO];
uint8_t l_num_master_ranks[MAX_VALUE_TWO][MAX_VALUE_TWO];
- uint8_t l_dram_gen = 0;
uint8_t l_dram_banks = 0;
uint8_t l_dram_rows = 0;
uint8_t l_dram_cols = 0;
- uint8_t l_dram_density = 0;
- uint8_t l_dram_width = 0;
+ //uint8_t l_dram_density = 0;
+ //uint8_t l_dram_width = 0;
uint8_t l_addr_inter = 0;
- uint8_t l_num_ranks_p0_dim0, l_num_ranks_p0_dim1, l_num_ranks_p1_dim0,
- l_num_ranks_p1_dim1;
- uint8_t l_master_ranks_p0_dim0;
+ uint8_t l_num_ranks_p0_dim0,l_num_ranks_p0_dim1,l_num_ranks_p1_dim0,l_num_ranks_p1_dim1;
+ uint8_t l_master_ranks_p0_dim0,l_master_ranks_p0_dim1,l_master_ranks_p1_dim0;
uint8_t mr3_valid, mr2_valid, mr1_valid,sl0_valid,sl1_valid,sl2_valid;
uint32_t rc_num;
char S0[] = "b";
@@ -108,10 +102,7 @@ fapi::ReturnCode address_generation(const fapi::Target & i_target_mba,
rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, l_num_ranks_per_dimm);
if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, &i_target_mba,
- l_num_master_ranks);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target_mba, l_dram_gen);
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, &i_target_mba,l_num_master_ranks);
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_BANKS, &i_target_mba, l_dram_banks);
if (rc) return rc;
@@ -119,10 +110,10 @@ fapi::ReturnCode address_generation(const fapi::Target & i_target_mba,
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_COLS, &i_target_mba, l_dram_cols);
if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_DENSITY, &i_target_mba, l_dram_density);
- if (rc) return rc;
- rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target_mba, l_dram_width);
- if (rc) return rc;
+ //rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_DENSITY, &i_target_mba, l_dram_density);
+ //if (rc) return rc;
+ //rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target_mba, l_dram_width);
+ //if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_INTER, &i_target_mba, l_addr_inter);
if (rc) return rc;
@@ -138,76 +129,79 @@ fapi::ReturnCode address_generation(const fapi::Target & i_target_mba,
//FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p1_dim1 is %d ",l_num_master_ranks[1][1]);
//-------------------------------------------------------------------------------
- l_num_ranks_p0_dim0 = l_num_ranks_per_dimm[0][0];
- l_num_ranks_p0_dim1 = l_num_ranks_per_dimm[0][1];
- l_num_ranks_p1_dim0 = l_num_ranks_per_dimm[1][0];
- l_num_ranks_p1_dim1 = l_num_ranks_per_dimm[1][1];
- l_master_ranks_p0_dim0 = l_num_master_ranks[0][0];
-
-
- //Initial all ranks are invalid
- mr3_valid = 0;
- mr2_valid = 0;
- mr1_valid = 0;
- sl2_valid = 0;
- sl1_valid = 0;
- sl0_valid = 0;
+l_num_ranks_p0_dim0 = l_num_ranks_per_dimm[0][0];
+l_num_ranks_p0_dim1 = l_num_ranks_per_dimm[0][1];
+l_num_ranks_p1_dim0 = l_num_ranks_per_dimm[1][0];
+l_num_ranks_p1_dim1 = l_num_ranks_per_dimm[1][1];
+l_master_ranks_p0_dim0 = l_num_master_ranks[0][0];
+l_master_ranks_p0_dim1 = l_num_master_ranks[0][1];
+l_master_ranks_p1_dim0 = l_num_master_ranks[1][0];
+//l_master_ranks_p1_dim1 = l_num_master_ranks[1][1];
+//Initial all ranks are invalid
+mr3_valid = 0;
+mr2_valid = 0;
+mr1_valid = 0;
+sl2_valid = 0;
+sl1_valid = 0;
+sl0_valid = 0;
+
+if( (l_num_ranks_p0_dim0 == 1 && l_num_ranks_p0_dim1 == 0) || (l_num_ranks_p1_dim0 == 1 && l_num_ranks_p1_dim1 == 0) ) //Single Rank case -- default0
+ {
+ //do rank-only stuff for this
+ FAPI_DBG("%s:--- INSIDE 1R",i_target_mba.toEcmdString());
+ l_addr_inter=3;
+ }
+
+else if ( (l_num_ranks_p0_dim0 == 1 && l_num_ranks_p0_dim1 == 1) || (l_num_ranks_p1_dim0 == 1 && l_num_ranks_p1_dim1 == 1) )
+{
+ FAPI_DBG("%s:--- INSIDE p0d0 valid and p0d1 valid --- 0 4---- 2R",i_target_mba.toEcmdString());
+ mr1_valid=1;
+}
- if ((l_num_ranks_p0_dim0 == 1 && l_num_ranks_p0_dim1 == 0) ||
- (l_num_ranks_p1_dim0 == 1 && l_num_ranks_p1_dim1 == 0)) //Single Rank case -- default0
- {
- //do rank-only stuff for this
- //FAPI_INF("--- INSIDE 1R");
- l_addr_inter = 3;
- }
- else if ((l_num_ranks_p0_dim0 == 1 && l_num_ranks_p0_dim1 == 1) ||
- (l_num_ranks_p1_dim0 == 1 && l_num_ranks_p1_dim1 == 1))
- {
- //FAPI_INF("--- INSIDE p0d0 valid and p0d1 valid --- 0 4---- 2R");
- mr1_valid = 1;
- }
- else if ((l_num_ranks_p0_dim0 == 2 && l_num_ranks_p0_dim1 == 0) ||
- (l_num_ranks_p1_dim0 == 2 && l_num_ranks_p1_dim1 == 0))
- {
- //FAPI_INF("--- INSIDE p0d0 valid and p0d1 valid --- 0 1---- 2R");
- mr3_valid = 1;
- }
- else if ((l_num_ranks_p0_dim0 == 2 && l_num_ranks_p0_dim1 == 2) ||
- (l_num_ranks_p1_dim0 == 2 && l_num_ranks_p1_dim1 == 2)) //Rank 01 and 45 case
- {
- //FAPI_INF("--- INSIDE --- 2R 0145");
- mr3_valid = 1;
- mr1_valid = 1;
- }
- else if ((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 0) ||
- (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 0)) //Rank 0123 on single dimm case
- {
- mr3_valid = 1;
- mr2_valid = 1;
- }
- else if ((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 4) ||
- (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 4)) //Rank 0123 and 4567 case
- {
- mr3_valid = 1;
- mr2_valid = 1;
- mr1_valid = 1;
- }
- else if (((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 0) ||
- (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 0)) &&
- l_master_ranks_p0_dim0 == 1) //1r 4h stack
- {
- mr1_valid = 0;
- sl1_valid = 1;
- sl2_valid = 1;
- }
+else if ( (l_num_ranks_p0_dim0 == 2 && l_num_ranks_p0_dim1 == 0) || (l_num_ranks_p1_dim0 == 2 && l_num_ranks_p1_dim1 == 0) )
+{
+ FAPI_DBG("%s:--- INSIDE p0d0 valid and p0d1 valid --- 0 1---- 2R",i_target_mba.toEcmdString());
+ mr3_valid=1;
+}
+else if (((l_num_ranks_p0_dim0 == 2 && l_num_ranks_p0_dim1 == 2)|| (l_num_ranks_p1_dim0 == 2 && l_num_ranks_p1_dim1 == 2)) && (l_master_ranks_p0_dim0 != 1 && l_master_ranks_p0_dim1 != 1)) //Rank 01 and 45 case
+ {
+ FAPI_DBG("%s:--- INSIDE --- 2R 0145",i_target_mba.toEcmdString());
+ mr3_valid = 1;
+ mr1_valid=1;
+ }
+
+else if((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 0 )|| (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 0 )) //Rank 0123 on single dimm case
+ {
+ mr3_valid = 1;mr2_valid = 1;
+ }
+else if (((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 4) || (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 4)) && l_master_ranks_p0_dim0 == 1) //1r 4h stack
+{
+ mr1_valid = 0; //DDC
+ sl1_valid = 1;
+ sl2_valid = 1;
+}
- else if (((l_num_ranks_p0_dim0 == 8 && l_num_ranks_p0_dim1 == 0) ||
- (l_num_ranks_p1_dim0 == 8 && l_num_ranks_p1_dim1 == 0)) &&
- (l_master_ranks_p0_dim0 == 2)) //2rx4 4h ddr4 3ds
+else if (((l_num_ranks_p0_dim0 == 8 && l_num_ranks_p0_dim1 == 0) || (l_num_ranks_p1_dim0 == 8 && l_num_ranks_p1_dim1 == 0)) && ((l_master_ranks_p0_dim0 == 2) || (l_master_ranks_p0_dim1 == 0 && l_master_ranks_p1_dim0 == 2))) //2rx4 4h ddr4 3ds
+{
+ l_addr_inter = 4;
+ //l_str_cust_addr = "sl2,sl1,ba0,mr3,cl3,cl4,cl5,ba1,cl6,cl7,cl8,ba2,r0,r1,r2,ba3,cl2,cl9,cl11,cl13,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15,r16,sl0,mr2,mr1,mr0"; //DDC
+ mr3_valid = 1; //DDC
+ sl1_valid = 1;
+ sl2_valid = 1;
+}
+else if ((l_num_ranks_p0_dim0 == 4 && l_num_ranks_p0_dim1 == 4) || (l_num_ranks_p1_dim0 == 4 && l_num_ranks_p1_dim1 == 4)) //Rank 0123 and 4567 case
+{
+ mr3_valid = 1;
+ mr2_valid = 1;
+ mr1_valid = 1;
+}
+ else if (((l_num_ranks_p0_dim0 == 2 && l_num_ranks_p0_dim1 == 2) ||
+ (l_num_ranks_p1_dim0 == 2 && l_num_ranks_p1_dim1 == 2)) &&
+ (l_master_ranks_p0_dim0 == 1 && l_master_ranks_p0_dim1 == 1)) //1rx4 2h ddr4 3ds 2 dimm, CDIMM
{
- mr3_valid = 1;
- sl1_valid = 1;
+ sl1_valid = 0;
sl2_valid = 1;
+ mr1_valid = 1;
}
else
@@ -269,13 +263,16 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
uint8_t l_attr_addr_mode = 0;
uint8_t l_num_cols = 0;
uint8_t l_num_rows = 0;
-
+ uint8_t l_dram_gen = 0;
+
rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_ADDR_MODE, &i_target_mba, l_attr_addr_mode);
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_NUM_COLS, &i_target_mba, l_num_cols);
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_NUM_ROWS, &i_target_mba, l_num_rows);
if (rc) return rc;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target_mba, l_dram_gen);
+ if (rc) return rc;
if (l_num_cols == 0)
{
@@ -327,42 +324,8 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
i--;
-
- ////FAPI_INF("Inside strcmp ba2");
- l_sbit = 48;
- l_value = i;
- rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
- if (rc) return rc;
- rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
- if (rc_num)
- {
- FAPI_ERR("Error in function parse_addr:");
- rc.setEcmdError(rc_num);
- return rc;
- }
- rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
- if (rc) return rc;
- i--;
-
- ////FAPI_INF("Inside strcmp ba3");
- l_sbit = 42;
- l_value = i;
- //------- Enable these for DDR4 --- for now constant map to zero
- rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
- if (rc) return rc;
- //FAPI_INF("ba3 Invalid");
- rc_num = l_data_buffer_64.insertFromRight(l_value_zero, l_sbit, 6);
- if (rc_num)
- {
- FAPI_ERR("Error in function parse_addr:");
- rc.setEcmdError(rc_num);
- return rc;
- }
- rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
- if (rc) return rc;
-
-
- ////FAPI_INF("Inside strcmp mr3");
+
+ ////FAPI_INF("Inside strcmp mr3");
l_sbit = 18;
l_value = i;
rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
@@ -392,6 +355,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
//FAPI_INF("mr3 Invalid");
+
}
@@ -426,6 +390,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
//FAPI_INF("mr2 Invalid");
+
}
@@ -460,9 +425,61 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
//FAPI_INF("mr1 Invalid");
+
}
+
+ ////FAPI_INF("Inside strcmp ba2");
+ l_sbit = 48;
+ l_value = i;
+ rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
+ if (rc) return rc;
+ rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function parse_addr:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
+ if (rc) return rc;
+ i--;
+
+ ////FAPI_INF("Inside strcmp ba3");
+ l_sbit = 42;
+ l_value = i;
+ //------- Enable these for DDR4 --- for now constant map to zero
+ rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
+ if (rc) return rc;
+ //FAPI_INF("ba3 Invalid");
+ if (l_dram_gen == 2){
+ rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function parse_addr:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
+ if (rc) return rc;
+ i--;
+}
+else
+{
+ rc_num = l_data_buffer_64.insertFromRight(l_value_zero, l_sbit, 6);
+ if (rc_num)
+ {
+ FAPI_ERR("Error in function parse_addr:");
+ rc.setEcmdError(rc_num);
+ return rc;
+ }
+ rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
+ if (rc) return rc;
+
+}
+
+
////FAPI_INF("Inside strcmp mr0");
l_sbit = 0;
l_value = i;
@@ -478,6 +495,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
+
////FAPI_INF("Value of i = %d",i);
//FAPI_INF("mr0 Invalid\n");
@@ -496,6 +514,8 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
+ ///////////////////////////////////////////////////////////////////
//FAPI_INF("col2 Invalid");
////FAPI_INF("Value of i = %d",i);
@@ -528,6 +548,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 3 -- Invalid");
}
@@ -562,6 +583,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 4 -- Invalid");
}
@@ -595,6 +617,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 5 -- Invalid");
}
@@ -629,6 +652,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 6 -- Invalid");
}
@@ -663,6 +687,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 7 -- Invalid");
}
@@ -697,6 +722,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 8 -- Invalid");
}
@@ -731,6 +757,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 9 -- Invalid");
}
@@ -767,6 +794,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
FAPI_DBG("%s:Col 11 -- Invalid", i_target_mba.toEcmdString());
}
@@ -782,6 +810,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 11 -- Invalid");
}
@@ -816,6 +845,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("Col 13 Invalid");
}
@@ -850,6 +880,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 0 -- Invalid");
}
@@ -884,6 +915,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 1 -- Invalid");
}
@@ -918,6 +950,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 2 -- Invalid");
}
@@ -952,6 +985,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 3 -- Invalid");
}
@@ -986,6 +1020,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 4 -- Invalid");
}
@@ -1020,6 +1055,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 5 -- Invalid");
}
@@ -1054,6 +1090,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 6 -- Invalid");
}
@@ -1088,6 +1125,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 7 -- Invalid");
}
@@ -1122,6 +1160,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 8 -- Invalid");
}
@@ -1156,6 +1195,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 9 -- Invalid");
}
@@ -1190,6 +1230,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 10 -- Invalid");
}
@@ -1224,6 +1265,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 11 -- Invalid");
}
@@ -1258,6 +1300,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 12 -- Invalid");
}
@@ -1292,6 +1335,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 13 -- Invalid");
}
@@ -1326,6 +1370,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 14 -- Invalid");
}
@@ -1359,6 +1404,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
//FAPI_INF("row 15 -- Invalid");
}
@@ -1394,6 +1440,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
//FAPI_INF("Row 16 Invalid");
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
+
}
////FAPI_INF("Value of i = %d",i);
@@ -1406,8 +1453,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
if (rc) return rc;
if(sl2_valid==1)
{
-
- rc_num = rc_num| l_data_buffer_64.insertFromRight(l_value,l_sbit ,6);
+ rc_num = rc_num| l_data_buffer_64.insertFromRight(l_value,l_sbit ,6);
if (rc_num)
{
FAPI_ERR( "Error in function parse_addr:");
@@ -1415,7 +1461,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
return rc;
}
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
- if(rc) return rc;
+ i--;
}
else
{
@@ -1428,7 +1474,6 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
if(rc) return rc;
FAPI_DBG("%s:sl2 Invalid",i_target_mba.toEcmdString());
- i--;
//FAPI_DBG("%s:Value of i = %d",i);
}
@@ -1450,6 +1495,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
if(rc) return rc;
+ i--;
}
else
{
@@ -1462,7 +1508,6 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
if(rc) return rc;
FAPI_DBG("%s:sl1 Invalid",i_target_mba.toEcmdString());
- i--;
//FAPI_DBG("%s:Value of i = %d",i);
}
FAPI_INF("Inside strcmp sl0");
@@ -1483,6 +1528,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
if(rc) return rc;
+ i--;
}
else
{
@@ -1495,7 +1541,6 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
rc = fapiPutScom(i_target_mba,0x030106c8,l_data_buffer_64);
if(rc) return rc;
FAPI_DBG("%s:sl0 Invalid",i_target_mba.toEcmdString());
- i--;
//FAPI_DBG("%s:Value of i = %d",i);
}
@@ -1513,7 +1558,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
}
rc = fapiPutScom(i_target_mba, 0x030106d0, l_data_buffer_rd64);
if (rc) return rc;
- l_value = i + 1;
+ l_value = i+1;
FAPI_INF("Setting end_addr Value of i = %d",i);
rc_num = l_data_buffer_rd64.flushTo0();
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
index f7aba241c..a8929723b 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_mcbist_common.C,v 1.73 2015/02/16 19:53:37 sglancy Exp $
+// $Id: mss_mcbist_common.C,v 1.76 2015/08/07 11:08:45 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -40,6 +40,9 @@
//------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
// --------|--------|--------|--------------------------------------------------
+// 1.76 |preeragh|07/15/15|R_W Infinite Added
+// 1.75 |lapietra|06/26/15|added RMWFIX and RMWFIX_I tests
+// 1.74 |preeragh|06/15/15|o_error_map Correction
// 1.73 |sglancy |02/16/15|Merged in lab needs
// 1.72 |sglancy |02/09/15|Fixed FW comments and addressed bugs
// 1.71 |preeragh|01/16/15|Fixed FW comments
@@ -1394,11 +1397,11 @@ fapi::ReturnCode mcb_error_map(const fapi::Target & i_target_mba,
if ((l_mcb_fail_160.isBitSet(l_index1)))
{
- o_error_map[l_port][l_rank][l_byte][l_nibble] = 1;
+ o_error_map[l_port][i_rank][l_byte][l_nibble] = 1;
}
else
{
- o_error_map[l_port][l_rank][l_byte][l_nibble] = 0;
+ o_error_map[l_port][i_rank][l_byte][l_nibble] = 0;
}
}
else if (l_port == 1)
@@ -1409,11 +1412,11 @@ fapi::ReturnCode mcb_error_map(const fapi::Target & i_target_mba,
if ((l_mcb_fail1_160.isBitSet(l_index1)))
{
- o_error_map[l_port][l_rank][l_byte][l_nibble] = 1;
+ o_error_map[l_port][i_rank][l_byte][l_nibble] = 1;
}
else
{
- o_error_map[l_port][l_rank][l_byte][l_nibble] = 0;
+ o_error_map[l_port][i_rank][l_byte][l_nibble] = 0;
}
}
}
@@ -1932,7 +1935,7 @@ fapi::ReturnCode mcb_error_map(const fapi::Target & i_target_mba,
}
else
{
- if (o_error_map[l_port][l_rank][i_byte1][i_nibble1] == 1)
+ if (o_error_map[l_port][i_rank][i_byte1][i_nibble1] == 1)
{
strcat(l_str, "X");
}
@@ -2807,6 +2810,23 @@ fapi::ReturnCode mss_conversion_testtype(const fapi::Target & i_target_mba,
i_mcbtest = HYNIX_1_COL;
FAPI_INF("%s:TESTTYPE :HYNIX_1_COL", i_target_mba.toEcmdString());
break;
+ case 49:
+ i_mcbtest = RMWFIX;
+ FAPI_INF("%s:TESTTYPE :RMWFIX", i_target_mba.toEcmdString());
+ break;
+ case 50:
+ i_mcbtest = RMWFIX_I;
+ FAPI_INF("%s:TESTTYPE :RMWFIX_I", i_target_mba.toEcmdString());
+ break;
+ case 51:
+ i_mcbtest = W_INFINITE;
+ FAPI_INF("%s:TESTTYPE :W_INFINITE", i_target_mba.toEcmdString());
+ break;
+ case 52:
+ i_mcbtest = R_INFINITE;
+ FAPI_INF("%s:TESTTYPE :R_INFINITE", i_target_mba.toEcmdString());
+ break;
+
default:
FAPI_INF("%s:Wrong Test_type,so using default test_type",
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.C
new file mode 100644
index 000000000..b7e0e253c
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.C
@@ -0,0 +1,600 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv//mss_mrs6_DDR4.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_mrs6_DDR4.C,v 1.4 2015/08/05 15:06:03 sglancy Exp $
+
+
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2007
+// *! All Rights Reserved -- Property of IBM
+// *! *** ***
+
+
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:| Author: | Date: | Comment:
+//---------|----------|---------|-----------------------------------------------
+// 1.04 | 08/05/15 | sglancy | Fixed FW compile error
+// 1.03 | 08/04/15 | sglancy | Changed to address FW comments
+// 1.02 | 05/07/15 | sglancy | Fixed enable disable bug and added 3DS support
+// 1.00 | 06/27/14 | abhijsau | Initial Draft
+
+//----------------------------------------------------------------------
+// Includes
+//----------------------------------------------------------------------
+
+#include <fapi.H>
+#include <mss_funcs.H>
+#include <cen_scom_addresses.H>
+#include <mss_mrs6_DDR4.H>
+using namespace fapi;
+
+extern "C"
+{
+
+// loads and runs MRS6 commands on a given MBA
+ReturnCode mss_mrs6_DDR4( fapi::Target& i_target)
+{
+ReturnCode rc;
+uint32_t port_number;
+uint32_t ccs_inst_cnt=0;
+
+for ( port_number = 0; port_number < 2; port_number++)
+ {
+ // Step four: Load MRS Setting
+ FAPI_INF("Loading MRS6 for port %d",port_number);
+ rc = mss_mr6_loader(i_target, port_number, ccs_inst_cnt);
+ if(rc)
+ {
+ FAPI_ERR(" mrs_load Failed rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ }
+
+// Execute the contents of CCS array
+ if (ccs_inst_cnt > 0)
+ {
+ // Set the End bit on the last CCS Instruction
+ rc = mss_ccs_set_end_bit( i_target, ccs_inst_cnt-1);
+ if(rc)
+ {
+ FAPI_ERR("CCS_SET_END_BIT FAILED rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ rc = mss_execute_ccs_inst_array(i_target, 10, 10);
+ if(rc)
+ {
+ FAPI_ERR(" EXECUTE_CCS_INST_ARRAY FAILED rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator());
+ return rc;
+ }
+
+ ccs_inst_cnt = 0;
+ }
+
+ return rc;
+
+}
+
+//Adds a NOP to CCS
+fapi::ReturnCode add_nop_to_ccs(fapi::Target& i_target_mba, ecmdDataBufferBase &addr_16, uint32_t instruction_number,uint8_t rank,uint8_t bank,uint32_t delay,uint8_t port) {
+ fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;
+ fapi::ReturnCode l_rc_buff = fapi::FAPI_RC_SUCCESS;
+ uint32_t l_ecmd_rc = 0;
+
+ //CCS Array 0 buffers
+ ecmdDataBufferBase bank_3(3);
+ ecmdDataBufferBase ddr4_activate_1(1);
+ ecmdDataBufferBase rasn_1(1);
+ ecmdDataBufferBase casn_1(1);
+ ecmdDataBufferBase wen_1(1);
+ ecmdDataBufferBase cke_4(4);
+ ecmdDataBufferBase csn_8(8);
+ ecmdDataBufferBase odt_4(4);
+ ecmdDataBufferBase cal_type_4(4);
+
+ //CCS Array 1 buffers
+ ecmdDataBufferBase idles_16(16);
+ ecmdDataBufferBase repeat_16(16);
+ ecmdDataBufferBase pattern_20(20);
+ ecmdDataBufferBase read_compare_1(1);
+ ecmdDataBufferBase rank_cal_4(4);
+ ecmdDataBufferBase cal_enable_1(1);
+ ecmdDataBufferBase ccs_end_1(1);
+ FAPI_INF("\n Running NO -OP command");
+
+ //CCS Array 0 Setup
+
+ //Buffer conversions from inputs
+ l_ecmd_rc |= addr_16.reverse();
+ l_ecmd_rc |= bank_3.insertFromRight(bank, 0, 3);
+ l_ecmd_rc |= bank_3.reverse(); //Banks are 0:2
+ l_ecmd_rc |= csn_8.flushTo1();
+ l_ecmd_rc |= csn_8.clearBit(rank);
+
+ //Command structure setup
+ l_ecmd_rc |= cke_4.flushTo1();
+ l_ecmd_rc |= rasn_1.setBit(0);
+ l_ecmd_rc |= casn_1.setBit(0);
+ l_ecmd_rc |= wen_1.setBit(0);
+
+ l_ecmd_rc |= read_compare_1.clearBit(0);
+
+ //Final setup
+ l_ecmd_rc |= odt_4.flushTo0();
+ l_ecmd_rc |= cal_type_4.flushTo0();
+ l_ecmd_rc |= ddr4_activate_1.setBit(0);
+
+ if (l_ecmd_rc) {
+ FAPI_ERR( "add_activate_to_ccs: Error setting up buffers");
+ l_rc_buff.setEcmdError(l_ecmd_rc);
+ return l_rc_buff;
+ }
+
+ l_rc = mss_ccs_inst_arry_0(i_target_mba, instruction_number, addr_16, bank_3, ddr4_activate_1, rasn_1, casn_1, wen_1, cke_4, csn_8, odt_4, cal_type_4, port);
+ if (l_rc) return l_rc;
+
+
+ //CCS Array 1 Setup
+ l_ecmd_rc |= idles_16.insertFromRight(delay, 0, 16);
+ l_ecmd_rc |= repeat_16.flushTo0();
+ l_ecmd_rc |= pattern_20.flushTo0();
+ l_ecmd_rc |= read_compare_1.flushTo0();
+ l_ecmd_rc |= rank_cal_4.flushTo0();
+ l_ecmd_rc |= cal_enable_1.flushTo0();
+ l_ecmd_rc |= ccs_end_1.flushTo0();
+
+ if (l_ecmd_rc) {
+ FAPI_ERR( "add_activate_to_ccs: Error setting up buffers");
+ l_rc_buff.setEcmdError(l_ecmd_rc);
+ return l_rc_buff;
+ }
+
+ l_rc = mss_ccs_inst_arry_1(i_target_mba, instruction_number, idles_16, repeat_16, pattern_20, read_compare_1, rank_cal_4, cal_enable_1, ccs_end_1);
+ if (l_rc) return l_rc;
+
+ return l_rc;
+}
+
+//Loads MRS6 commands for a given port into the CCS array
+ReturnCode mss_mr6_loader( fapi::Target& i_target,uint32_t i_port_number,uint32_t& io_ccs_inst_cnt)
+{
+
+ const uint8_t MRS6_BA = 6;
+ uint32_t dimm_number;
+ uint32_t rank_number;
+ ReturnCode rc;
+ ReturnCode rc_buff;
+ uint32_t rc_num = 0;
+ uint8_t tmod_delay = 12;
+ ecmdDataBufferBase data_buffer_64(64);
+ ecmdDataBufferBase address_16(16);
+ ecmdDataBufferBase bank_3(3);
+ ecmdDataBufferBase activate_1(1);
+ rc_num = rc_num | activate_1.setBit(0);
+ ecmdDataBufferBase rasn_1(1);
+ rc_num = rc_num | rasn_1.clearBit(0);
+ ecmdDataBufferBase casn_1(1);
+ rc_num = rc_num | casn_1.clearBit(0);
+ ecmdDataBufferBase wen_1(1);
+ rc_num = rc_num | wen_1.clearBit(0);
+ ecmdDataBufferBase cke_4(4);
+ rc_num = rc_num | cke_4.clearBit(0,4);
+ ecmdDataBufferBase csn_8(8);
+ rc_num = rc_num | csn_8.clearBit(0,8);
+ ecmdDataBufferBase odt_4(4);
+ rc_num = rc_num | odt_4.clearBit(0,4);
+ ecmdDataBufferBase ddr_cal_type_4(4);
+ uint32_t instruction_number;
+ ecmdDataBufferBase num_idles_16(16);
+ ecmdDataBufferBase num_repeat_16(16);
+ ecmdDataBufferBase data_20(20);
+ ecmdDataBufferBase read_compare_1(1);
+ ecmdDataBufferBase rank_cal_4(4);
+ ecmdDataBufferBase ddr_cal_enable_1(1);
+ ecmdDataBufferBase ccs_end_1(1);
+ ecmdDataBufferBase mrs0(16);
+ ecmdDataBufferBase mrs1(16);
+ ecmdDataBufferBase mrs2(16);
+ ecmdDataBufferBase mrs3(16);
+ ecmdDataBufferBase mrs4(16);
+ ecmdDataBufferBase mrs5(16);
+ ecmdDataBufferBase mrs6(16);
+
+ uint16_t MRS6 = 0;
+
+ ecmdDataBufferBase data_buffer(64);
+ instruction_number = 0;
+
+ uint16_t num_ranks = 0;
+
+ FAPI_INF( "+++++++++++++++++++++ LOADING MRS SETTINGS FOR PORT %d +++++++++++++++++++++", i_port_number);
+
+ uint8_t num_ranks_array[2][2]; //[port][dimm]
+ rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target, num_ranks_array);
+ if(rc) return rc;
+
+ uint8_t dimm_type;
+ rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target, dimm_type);
+ if(rc) return rc;
+
+ uint8_t is_sim = 0;
+ rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim);
+ if(rc) return rc;
+
+ uint8_t address_mirror_map[2][2]; //address_mirror_map[port][dimm]
+ rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map);
+ if(rc) return rc;
+
+
+ // WORKAROUNDS
+ rc = fapiGetScom(i_target, CCS_MODEQ_AB_REG_0x030106A7, data_buffer);
+ if(rc) return rc;
+ //Setting up CCS mode
+ rc_num = rc_num | data_buffer.setBit(51);
+ rc = fapiPutScom(i_target, CCS_MODEQ_AB_REG_0x030106A7, data_buffer);
+ if(rc) return rc;
+
+ if(i_port_number==0){
+ rc = fapiGetScom(i_target,DPHY01_DDRPHY_WC_CONFIG3_P0_0x8000CC050301143F, data_buffer);
+ if(rc) return rc;
+ //Setting up CCS mode
+ rc_num = rc_num | data_buffer.clearBit(48);
+ rc = fapiPutScom(i_target,DPHY01_DDRPHY_WC_CONFIG3_P0_0x8000CC050301143F, data_buffer);
+ if(rc) return rc;
+ }else{
+
+ rc = fapiGetScom(i_target,DPHY01_DDRPHY_WC_CONFIG3_P1_0x8001CC050301143F, data_buffer);
+ if(rc) return rc;
+ //Setting up CCS mode
+ rc_num = rc_num | data_buffer.clearBit(48);
+ rc = fapiPutScom(i_target,DPHY01_DDRPHY_WC_CONFIG3_P1_0x8001CC050301143F, data_buffer);
+ if(rc) return rc;
+ }
+
+ //Lines commented out in the following section are waiting for xml attribute adds
+
+ uint8_t dram_stack[2][2];
+ rc = FAPI_ATTR_GET(ATTR_EFF_STACK_TYPE, &i_target, dram_stack);
+ if(rc) return rc;
+
+ FAPI_INF( "Stack Type: %d\n", dram_stack[0][0]);
+
+
+ //MRS6
+ uint8_t vrefdq_train_value[2][2][4]; //vrefdq_train value - NEW
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_VALUE, &i_target, vrefdq_train_value);
+ if(rc) return rc;
+ uint8_t vrefdq_train_range[2][2][4]; //vrefdq_train range - NEW
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_RANGE, &i_target, vrefdq_train_range);
+ if(rc) return rc;
+ uint8_t vrefdq_train_enable[2][2][4]; //vrefdq_train enable - NEW
+ rc = FAPI_ATTR_GET( ATTR_VREF_DQ_TRAIN_ENABLE, &i_target, vrefdq_train_enable);
+ if(rc) return rc;
+
+ FAPI_INF("enable attribute %d",vrefdq_train_enable[0][0][0]);
+
+
+
+ uint8_t tccd_l; //tccd_l - NEW
+ rc = FAPI_ATTR_GET( ATTR_TCCD_L, &i_target, tccd_l);
+ if(rc) return rc;
+ if (tccd_l == 4)
+ {
+ tccd_l = 0x00;
+ }
+ else if (tccd_l == 5)
+ {
+ tccd_l = 0x80;
+ }
+ else if (tccd_l == 6)
+ {
+ tccd_l = 0x40;
+ }
+ else if (tccd_l == 7)
+ {
+ tccd_l = 0xC0;
+ }
+ else if (tccd_l == 8)
+ {
+ tccd_l = 0x20;
+ }
+
+ // Raise CKE high with NOPS, waiting min Reset CKE exit time (tXPR) - 400 cycles
+ rc_num = rc_num | cke_4.setBit(0,4);
+ rc_num = rc_num | csn_8.setBit(0,8);
+ rc_num = rc_num | address_16.clearBit(0, 16);
+ rc_num = rc_num | odt_4.clearBit(0,4);
+ rc_num = rc_num | num_idles_16.insertFromRight((uint32_t) 400, 0, 16);
+ rc = mss_ccs_inst_arry_0( i_target,
+ io_ccs_inst_cnt,
+ address_16,
+ bank_3,
+ activate_1,
+ rasn_1,
+ casn_1,
+ wen_1,
+ cke_4,
+ csn_8,
+ odt_4,
+ ddr_cal_type_4,
+ i_port_number);
+ if(rc) return rc;
+ rc = mss_ccs_inst_arry_1( i_target,
+ io_ccs_inst_cnt,
+ num_idles_16,
+ num_repeat_16,
+ data_20,
+ read_compare_1,
+ rank_cal_4,
+ ddr_cal_enable_1,
+ ccs_end_1);
+ if(rc) return rc;
+ io_ccs_inst_cnt ++;
+
+ // Dimm 0-1
+ for ( dimm_number = 0; dimm_number < 2; dimm_number++)
+ {
+ num_ranks = num_ranks_array[i_port_number][dimm_number];
+
+ if (num_ranks == 0)
+ {
+ FAPI_INF( "PORT%d DIMM%d not configured. Num_ranks: %d ", i_port_number, dimm_number, num_ranks);
+ }
+ else
+ {
+ // Rank 0-3
+ for ( rank_number = 0; rank_number < num_ranks; rank_number++)
+ {
+ FAPI_INF( "MRS SETTINGS FOR PORT%d DIMM%d RANK%d", i_port_number, dimm_number, rank_number);
+
+ rc_num = rc_num | csn_8.setBit(0,8);
+ rc_num = rc_num | address_16.clearBit(0, 16);
+
+ //MRS6
+
+ vrefdq_train_value[i_port_number][dimm_number][rank_number] = mss_reverse_8bits(vrefdq_train_value[i_port_number][dimm_number][rank_number]);
+
+ if (vrefdq_train_range[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VREF_DQ_TRAIN_RANGE_RANGE1)
+ {
+ vrefdq_train_range[i_port_number][dimm_number][rank_number] = 0x00;
+ }
+ else if (vrefdq_train_range[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VREF_DQ_TRAIN_RANGE_RANGE2)
+ {
+ vrefdq_train_range[i_port_number][dimm_number][rank_number] = 0xFF;
+ }
+
+ if (vrefdq_train_enable[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VREF_DQ_TRAIN_ENABLE_ENABLE)
+ {
+ vrefdq_train_enable[i_port_number][dimm_number][rank_number] = 0xff;FAPI_INF("ENABLE is enabled");
+ }
+ else if (vrefdq_train_enable[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VREF_DQ_TRAIN_ENABLE_DISABLE)
+ {
+ vrefdq_train_enable[i_port_number][dimm_number][rank_number] = 0x00;FAPI_INF("DISABLE is enabled");
+ }
+
+ rc_num = rc_num | mrs6.insert((uint8_t) vrefdq_train_value[i_port_number][dimm_number][rank_number], 0, 6);
+ rc_num = rc_num | mrs6.insert((uint8_t) vrefdq_train_range[i_port_number][dimm_number][rank_number], 6, 1);
+ rc_num = rc_num | mrs6.insertFromRight((uint8_t) vrefdq_train_enable[i_port_number][dimm_number][rank_number], 7, 1);
+
+ rc_num = rc_num | mrs6.insert((uint8_t) 0x00, 8, 2);
+ rc_num = rc_num | mrs6.insert((uint8_t) tccd_l, 10, 3);
+ rc_num = rc_num | mrs6.insert((uint8_t) 0x00, 13, 2);
+
+ rc_num = rc_num | mrs6.extractPreserve(&MRS6, 0, 16, 0);
+
+ FAPI_INF( "MRS 6: 0x%04X", MRS6);
+
+ if (rc_num)
+ {
+ FAPI_ERR( "mss_mrs_load: Error setting up buffers");
+ rc_buff.setEcmdError(rc_num);
+ return rc_buff;
+ }
+
+ // Only corresponding CS to rank
+ rc_num = rc_num | csn_8.setBit(0,8);
+ rc_num = rc_num | csn_8.clearBit(rank_number+4*dimm_number);
+
+ if (dram_stack[0][0] == ENUM_ATTR_EFF_STACK_TYPE_STACK_3DS)
+ {
+ FAPI_INF( "============= Got in the 3DS stack loop CKE !!!!=====================\n");
+ rc_num = rc_num | csn_8.clearBit(2+4*dimm_number,2);
+ // I'm leaving this commented out - I need to double check it with Luke Mulkey to see which CS's are wired to which CKE's
+ // rc_num = rc_num | cke_4.clearBit(1);
+ }
+
+ // Propogate through the 4 MRS cmds
+ // Copying the current MRS into address buffer matching the MRS_array order
+ // Setting the bank address
+ rc_num = rc_num | address_16.insert(mrs6, 0, 16, 0);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 0, 1, 7);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 1, 1, 6);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 2, 1, 5);
+
+
+ if (( address_mirror_map[i_port_number][dimm_number] & (0x08 >> rank_number) ) && (is_sim == 0))
+ {
+ rc = mss_address_mirror_swizzle(i_target, i_port_number, dimm_number, rank_number, address_16, bank_3);
+ if(rc) return rc;
+ }
+
+ if (rc_num)
+ {
+ FAPI_ERR( "mss_mrs_load: Error setting up buffers");
+ rc_buff.setEcmdError(rc_num);
+ return rc_buff;
+ }
+ // Send out to the CCS array
+ rc = mss_ccs_inst_arry_0( i_target,
+ io_ccs_inst_cnt,
+ address_16,
+ bank_3,
+ activate_1,
+ rasn_1,
+ casn_1,
+ wen_1,
+ cke_4,
+ csn_8,
+ odt_4,
+ ddr_cal_type_4,
+ i_port_number);
+ if(rc) return rc;
+ rc = mss_ccs_inst_arry_1( i_target,
+ io_ccs_inst_cnt,
+ num_idles_16,
+ num_repeat_16,
+ data_20,
+ read_compare_1,
+ rank_cal_4,
+ ddr_cal_enable_1,
+ ccs_end_1);
+ if(rc) return rc;
+ io_ccs_inst_cnt ++;
+
+ // Address inversion for RCD
+ if ( (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_RDIMM) || (dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_RDIMM || dimm_type == ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM) )
+ {
+ FAPI_INF( "Sending out MRS with Address Inversion to B-side DRAMs\n");
+
+
+ // Propogate through the 4 MRS cmds
+ // Copying the current MRS into address buffer matching the MRS_array order
+ // Setting the bank address
+ rc_num = rc_num | address_16.insert(mrs6, 0, 16, 0);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 0, 1, 7);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 1, 1, 6);
+ rc_num = rc_num | bank_3.insert((uint8_t) MRS6_BA, 2, 1, 5);
+
+ // Indicate B-Side DRAMS BG1=1
+ rc_num = rc_num | address_16.setBit(15); // Set BG1 = 1
+
+ rc_num = rc_num | address_16.flipBit(3,7); // Invert A3:A9
+ rc_num = rc_num | address_16.flipBit(11); // Invert A11
+ rc_num = rc_num | address_16.flipBit(13); // Invert A13
+ rc_num = rc_num | address_16.flipBit(14); // Invert A17
+ rc_num = rc_num | bank_3.flipBit(0,3); // Invert BA0,BA1,BG0
+
+
+ if (( address_mirror_map[i_port_number][dimm_number] & (0x08 >> rank_number) ) && (is_sim == 0))
+ {
+ rc = mss_address_mirror_swizzle(i_target, i_port_number, dimm_number, rank_number, address_16, bank_3);
+ if(rc) return rc;
+ }
+
+
+ if (rc_num)
+ {
+ FAPI_ERR( " Error setting up buffers");
+ rc_buff.setEcmdError(rc_num);
+ return rc_buff;
+ }
+
+ // Send out to the CCS array
+ rc = mss_ccs_inst_arry_0( i_target,
+ io_ccs_inst_cnt,
+ address_16,
+ bank_3,
+ activate_1,
+ rasn_1,
+ casn_1,
+ wen_1,
+ cke_4,
+ csn_8,
+ odt_4,
+ ddr_cal_type_4,
+ i_port_number);
+ if(rc) return rc;
+ rc = mss_ccs_inst_arry_1( i_target,
+ io_ccs_inst_cnt,
+ num_idles_16,
+ num_repeat_16,
+ data_20,
+ read_compare_1,
+ rank_cal_4,
+ ddr_cal_enable_1,
+ ccs_end_1);
+ if(rc) return rc;
+ io_ccs_inst_cnt ++;
+
+
+ }
+instruction_number = io_ccs_inst_cnt;
+
+rc = add_nop_to_ccs (i_target, address_16,instruction_number,rank_number,MRS6_BA,tmod_delay,i_port_number);
+io_ccs_inst_cnt = instruction_number;
+io_ccs_inst_cnt++;
+if (rc) return rc;
+
+ }
+ }
+ }
+
+
+
+
+
+ return rc;
+}
+
+
+
+
+
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.H
new file mode 100644
index 000000000..5abc286d8
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.H
@@ -0,0 +1,99 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mrs6_DDR4.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: mss_mrs6_DDR4.H,v 1.2 2015/08/04 18:47:26 sglancy Exp $
+// *!***************************************************************************
+// *! (C) Copyright International Business Machines Corp. 1997, 1998, 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** ***
+// *!***************************************************************************
+// *! FILENAME : mss_mrs6_DDR4.H
+// *! TITLE :
+// *! DESCRIPTION : MRS6 setting procedures
+// *! CONTEXT :
+// *!
+// *! OWNER NAME :
+// *! BACKUP :
+// *!***************************************************************************
+// CHANGE HISTORY:
+//-------------------------------------------------------------------------------
+// Version:|Author: | Date: | Comment:
+// 1.2 | sglancy | 08/04/15| Changed to address FW comments
+// 1.1 | abhijsau | 06/27/14| Initial Version
+// --------|--------|---------|--------------------------------------------------
+//------------------------------------------------------------------------------
+#ifndef MSS_MR6_DDR4_H
+#define MSS_MR6_DDR4_H
+
+
+/****************************************************************************************/
+/* mss_mcbist_address.H */
+/****************************************************************************************/
+#include <fapi.H>
+
+typedef fapi::ReturnCode (*mss_mrs6_DDR4_FP_t)(const fapi::Target& i_target);
+
+extern "C"
+{
+
+using namespace fapi;
+/**
+ * @sets up and runs Mode Register Set 6 on a centaur.mba level target
+ *
+ * @param[in] target: Reference to centaur.mba target,
+ *
+ * @return ReturnCode
+ */
+
+fapi::ReturnCode mss_mrs6_DDR4(fapi::Target& i_target);
+/**
+ * @Adds a no-op (NOP) command to the CCS array
+ *
+ * @param[in] target: Reference to centaur.mba target,
+ * @param[in] addr_16: 16 wide ecmdDataBufferBase to be used for the address bus
+ * @param[in] instruction_number: current location in the CCS array
+ * @param[in] rank: current rank
+ * @param[in] bank: current bank
+ * @param[in] delay: delay to add for the command
+ * @param[in] port: current port to execute the NOP on
+ *
+ * @return ReturnCode
+ */
+fapi::ReturnCode add_nop_to_ccs(fapi::Target& i_target_mba, ecmdDataBufferBase &addr_16, uint32_t instruction_number,uint8_t rank,uint8_t bank,uint32_t delay,uint8_t port);
+/**
+ * @Loads in MRS6 for a given port number
+ *
+ * @param[in] target: Reference to centaur.mba target,
+ * @param[in] i_port: Current port to operate on
+ * @param[in/out] io_ccs_inst_cnt: Reference to current CCS array position
+ *
+ * @return ReturnCode
+ */
+fapi::ReturnCode mss_mr6_loader(fapi::Target& i_target,uint32_t i_port_number,uint32_t& io_ccs_inst_cnt);
+} // extern "C"
+
+#endif // MSS_MR6_DDR4_H
+
+
+
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_shmoo_common.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_shmoo_common.H
index 6c8511113..d535405ee 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_shmoo_common.H
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_shmoo_common.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2014 */
+/* Contributors Listed Below - COPYRIGHT 2012,2015 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -22,7 +22,7 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_shmoo_common.H,v 1.19 2014/01/23 19:59:49 sasethur Exp $
+// $Id: mss_shmoo_common.H,v 1.21 2015/08/07 11:29:09 sasethur Exp $
// *!***************************************************************************
// *! (C) Copyright International Business Machines Corp. 1997, 1998
// *! All Rights Reserved -- Property of IBM
@@ -33,15 +33,17 @@
// *! DESCRIPTION : Memory Subsystem Shmoo common defines
// *! CONTEXT : To make all shmoos share a common defines
// *!
-// *! OWNER NAME : Varkey Varghese Email: varkey.kv@in.ibm.com
-// *! BACKUP NAME : Gaurav Sharda Email:
+// *! OWNER NAME : Preetham Hosmane Email - preeragh@in.ibm.com
+// *! BACKUP NAME : Saravanan Sethuraman Email:
// *!
// *!***************************************************************************
// CHANGE HISTORY:
//------------------------------------------------------------------------------
// Version:|Author: | Date: | Comment:
+// 1.21 |preeragh| 30/07/15| Optimized for FW Linear/Composite/Bin
+// 1.20 |preeragh| 22/06/15| DDR4 - Mods
// 1.18 |mjjones | 24/01/14| RAS Review Updates
-// 1.15 |abhijit |8/8/12 | Updated Review Comments
+// 1.15 |abhijit |8/8/12 | Updated Review Comments
// 1.9 |aditya |12/6/12 | Updated Review Comments
// 1.8 | abhijit| 15/11/12| made changes fw review comments
// 1.7 | abhijit| 22/10/12| made changes to variables
@@ -66,7 +68,7 @@ enum shmoo_algorithm_t
};
const uint8_t NINE = 9;
-const uint8_t MAX_SHMOO=1;
+const uint8_t MAX_SHMOO=2;
const uint8_t MAX_RANK_DIMM=4;
const uint8_t MAX_NIBBLES=2;
const uint8_t MAX_BITS=4;
@@ -96,6 +98,8 @@ struct shmoo_knob_data_t
uint16_t rb_regval[MAX_DQ];// Right Bound register/Hex value
uint16_t nom_val[MAX_DQ]; // nominal value of this instance of the knob
uint16_t last_pass[MAX_DQ];
+ uint16_t total_margin[MAX_DQ];
+ uint16_t curr_diff[MAX_DQ];
uint16_t last_fail[MAX_DQ];
uint16_t curr_val[MAX_DQ];
uint16_t right_margin_val[MAX_DQ];
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