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diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp_fabric_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp_fabric_attributes.xml
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+++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp_fabric_attributes.xml
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+<!-- IBM_PROLOG_BEGIN_TAG
+ This is an automatically generated prolog.
+
+ $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp_fabric_attributes.xml $
+
+ IBM CONFIDENTIAL
+
+ COPYRIGHT International Business Machines Corp. 2012
+
+ p1
+
+ Object Code Only (OCO) source materials
+ Licensed Internal Code Source Materials
+ IBM HostBoot Licensed Internal Code
+
+ The source code for this program is not published or other-
+ wise divested of its trade secrets, irrespective of what has
+ been deposited with the U.S. Copyright Office.
+
+ Origin: 30
+
+ IBM_PROLOG_END_TAG -->
+<!-- proc_fab_smp_fabric_attributes.xml -->
+<attributes>
+ <!-- ********************************************************************* -->
+ <attribute>
+ <id>ATTR_FREQ_CORE</id>
+ <targetType>TARGET_TYPE_SYSTEM</targetType>
+ <description>
+ firmware notes:
+ Nominal processor's core DPLL frequency (MHz).
+ Default value provided by Machine Readable Workbook.
+ This attribute is the current value.
+ </description>
+ <valueType>uint32</valueType>
+ <writeable/>
+ <persistRuntime/>
+ </attribute>
+ <!-- ********************************************************************* -->
+ <attribute>
+ <id>ATTR_PROC_PCIE_NOT_F_LINK</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ firmware notes:
+ Set IPL time mux/switch between PCIE PHB/F link function
+ (one per foreign link)
+ </description>
+ <valueType>uint8</valueType>
+ <array>2</array>
+ <platInit/>
+ <persistRuntime/>
+ </attribute>
+ <!-- ********************************************************************* -->
+</attributes> \ No newline at end of file
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