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-rw-r--r--src/usr/expaccess/test/expscomtest.H717
-rw-r--r--src/usr/expaccess/test/makefile33
-rw-r--r--src/usr/expaccess/test/ocmbcommtest.H334
-rw-r--r--src/usr/expaccess/test/test.mk35
4 files changed, 1119 insertions, 0 deletions
diff --git a/src/usr/expaccess/test/expscomtest.H b/src/usr/expaccess/test/expscomtest.H
new file mode 100644
index 000000000..c943ca7ba
--- /dev/null
+++ b/src/usr/expaccess/test/expscomtest.H
@@ -0,0 +1,717 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/expaccess/test/expscomtest.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2019 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __EXPSCOMTEST_H
+#define __EXPSCOMTEST_H
+
+/**
+ * @file expscomtest.H
+ *
+ * @brief Test case for EXPSCOM code
+*/
+
+#include <cxxtest/TestSuite.H>
+#include <errl/errlmanager.H>
+#include <errl/errlentry.H>
+#include <devicefw/userif.H>
+#include <expscom/expscom_reasoncodes.H>
+#include <fapi2/target.H>
+#include <fapi2/plat_hwp_invoker.H>
+#include <fapi2_hwp_executor.H>
+#include <fapi2/hw_access.H>
+#include <lib/shared/exp_consts.H>
+
+extern trace_desc_t* g_trac_expscom;
+
+using namespace TARGETING;
+using namespace ERRORLOG;
+
+// Address and data to read/write
+struct testExpscomAddrData
+{
+ uint32_t addr;
+ uint64_t data;
+};
+
+// Test table values
+const testExpscomAddrData g_expscomAddrTable[] =
+{
+ {0x501C, 0x00000000DEADBEEF},
+ {0x209004, 0x00000000C0DEDEAD},
+ {0x8010002, 0xDEADC0DEC0DEBEEF}
+};
+const uint32_t g_expscomAddrTableSz =
+ sizeof(g_expscomAddrTable)/sizeof(testExpscomAddrData);
+
+
+const ScomSwitches forceI2CScom = {.useFsiScom = 0, .useXscom = 0,
+ .useInbandScom = 0, .useSbeScom = 0,
+ .useI2cScom = 1};
+
+const ScomSwitches forceMMIOScom = {.useFsiScom = 0, .useXscom = 0,
+ .useInbandScom = 1, .useSbeScom = 0,
+ .useI2cScom = 0};
+
+#define FAIL_TEST_RC(TARGET, STRING) \
+l_fails++; \
+TS_FAIL(STRING , \
+ l_testEntry.data, \
+ l_testEntry.addr, \
+ get_huid(TARGET)); \
+l_err = fapi2::rcToErrl(l_rc); \
+errlCommit(l_err, 0x10);
+
+#define FAIL_TEST_ERRL(TARGET, STRING) \
+l_fails++; \
+TS_FAIL(STRING , \
+ l_testEntry.data, \
+ l_testEntry.addr, \
+ get_huid(TARGET)); \
+errlCommit(l_err, 0x10);
+
+class expscomTest: public CxxTest::TestSuite
+{
+private:
+ fapi2::ReturnCode put_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+ const uint64_t i_address,
+ const fapi2::buffer<uint64_t> i_data)
+ {
+ return fapi2::putScom(i_target,i_address,i_data);
+ }
+
+ fapi2::ReturnCode get_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+ const uint64_t i_address,
+ fapi2::buffer<uint64_t>& o_data)
+ {
+ return fapi2::getScom(i_target,i_address,o_data);
+ }
+
+public:
+
+ /**
+ * @brief EXPSCOM test I2C Path
+ * Write value and read back to verify i2c scoms to OCMBs
+ */
+ void testExpscomI2c(void)
+ {
+ TRACFCOMP( g_trac_expscom, ">> Enter testExpscomI2c");
+ // Keep trace of pass/fails
+ uint32_t l_tests = 0;
+ uint32_t l_fails = 0;
+ errlHndl_t l_err = nullptr;
+
+ // Fapi interfaces will be used in these tests so this variable
+ // will be used to hold error from fapi calls
+ fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+ fapi2::buffer<uint64_t> l_scom_buffer;
+ TargetHandleList l_explorerList;
+
+ do{
+// Causing a data storage exception in c_str...
+#ifdef CONFIG_AXONE_BRING_UP
+TRACFCOMP( g_trac_expscom,"skipping testExpscomI2c");
+break;
+#endif
+ // Get the system's OCMB chips, we will use these as test targets
+ getAllChips( l_explorerList,
+ TYPE_OCMB_CHIP,
+ true ); // true: return functional OCMBs
+
+ if(l_explorerList.size() == 0 )
+ {
+ TRACFCOMP( g_trac_expscom, "No OCMB targets found, skipping testExpscomI2c");
+ break;
+ }
+
+
+ // We will use the first and last targets for these scom tests
+ auto l_firstExpChip = l_explorerList.front();
+ auto l_lastExpChip = l_explorerList.back();
+
+ // Cast the TARGETING::Targets into fapi2::Targets
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_firstExpChip_fapi(l_firstExpChip);
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
+
+ // Save away original scom switch info so we can restore it at the end of the test
+ auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+
+ // This goal of this tests is to make sure I2C scom to OCMB is working so force
+ // scom to go over I2C path for these targets
+ l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+
+ // Loop through table for first and last OCMB targets
+ for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+ {
+ // Read the test entry info from the global table at the top of this file
+ testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+
+ if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+ {
+ // If this is an IBM address then we expect 64 bits of data
+ l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+ }
+ else
+ {
+ // Otherwise we know this is a native OCMB address and it is only 32 bits
+ l_scom_buffer.insert<32,32,0,uint32_t>(l_testEntry.data);
+ }
+
+ FAPI_INVOKE_HWP(l_err, put_scom,
+ l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer );
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2c>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X");
+
+ }
+
+ // putScom to last OCMB over i2c
+ FAPI_INVOKE_HWP(l_err, put_scom,
+ l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer );
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_lastExpChip,
+ "testExpscomI2c>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X");
+ }
+
+
+ // Flush scom buffers so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to first OCMB over i2c
+ FAPI_INVOKE_HWP(l_err, get_scom,
+ l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer );
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2c>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X")
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomI2c>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_firstExpChip));
+ }
+
+ // Flush scom buffers so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to last OCMB over i2c
+ FAPI_INVOKE_HWP(l_err, get_scom,
+ l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer );
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_lastExpChip,
+ "testExpscomI2c>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X")
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomI2c>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_lastExpChip));
+ }
+ }
+
+ // Set ATTR_SCOM_SWITCHES back to their original values
+ l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+ }while(0);
+
+ TRACFCOMP( g_trac_expscom, "<< Exit testExpscomI2c");
+ return;
+ }
+
+ void testExpscomI2cPlatform(void)
+ {
+
+ TRACFCOMP( g_trac_expscom, ">> Enter testExpscomI2cPlatform");
+ // Keep trace of pass/fails
+ uint32_t l_tests = 0;
+ uint32_t l_fails = 0;
+ errlHndl_t l_err = nullptr;
+ size_t l_scomSize = sizeof(uint64_t);
+
+ // Fapi interfaces will be used in these tests so this variable
+ // will be used to hold error from fapi calls
+ fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+ fapi2::buffer<uint64_t> l_scom_buffer;
+
+ // Get the system's OCMB chips, we will use these as test targets
+ TargetHandleList l_explorerList;
+
+ do{
+// Causing a data storage exception in c_str...
+#ifdef CONFIG_AXONE_BRING_UP
+TRACFCOMP( g_trac_expscom,"skipping testExpscomI2cPlatformPlatform");
+break;
+#endif
+
+ getAllChips( l_explorerList,
+ TYPE_OCMB_CHIP,
+ true ); // true: return functional OCMBs
+
+
+ if(l_explorerList.size() == 0 )
+ {
+ TRACFCOMP( g_trac_expscom, "No OCMB targets found, skipping testExpscomI2cPlatformPlatform");
+ break;
+ }
+
+ // We will use the first and last targets for these scom tests
+ auto l_firstExpChip = l_explorerList.front();
+ auto l_lastExpChip = l_explorerList.back();
+
+ // Save away original scom switch info so we can restore it at the end of the test
+ auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+
+ // This goal of this tests is to make sure I2C scom to OCMB is working so force
+ // scom to go over I2C path for these targets
+ l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+
+ // Loop through table for first and last OCMB targets
+ for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+ {
+ // Read the test entry info from the global table at the top of this file
+ testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+
+ if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+ {
+ // If this is an IBM address then we expect 64 bits of data
+ l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+ }
+ else
+ {
+ // Otherwise we know this is a native OCMB address and it is only 32 bits
+ l_scom_buffer.insert<32,32,0,uint32_t>(l_testEntry.data);
+ }
+ l_err = deviceWrite(l_firstExpChip,
+ &l_scom_buffer,
+ l_scomSize,
+ DEVICE_SCOM_ADDRESS( l_testEntry.addr));
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2cPlatform>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X");
+
+ }
+
+ l_err = deviceWrite(l_lastExpChip,
+ &l_scom_buffer,
+ l_scomSize,
+ DEVICE_SCOM_ADDRESS( l_testEntry.addr));
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2cPlatform>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X");
+
+ }
+ // Flush scom buffers so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to first OCMB over i2c
+ l_err = deviceRead(l_firstExpChip,
+ &l_scom_buffer(),
+ l_scomSize,
+ DEVICE_SCOM_ADDRESS( l_testEntry.addr));
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2cPlatform>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X")
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomI2cPlatform>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_firstExpChip));
+ }
+
+
+ // Flush scom buffers so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to last OCMB over i2c
+ l_err = deviceRead(l_lastExpChip,
+ &l_scom_buffer(),
+ l_scomSize,
+ DEVICE_SCOM_ADDRESS( l_testEntry.addr));
+ l_tests++;
+ if(l_err)
+ {
+ FAIL_TEST_ERRL(l_firstExpChip,
+ "testExpscomI2cPlatform>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X")
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomI2cPlatform>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_firstExpChip));
+ }
+ }
+
+ // Set ATTR_SCOM_SWITCHES back to their original values
+ l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+ }while(0);
+
+ TRACFCOMP( g_trac_expscom, "<< Exit testExpscomI2cPlatform");
+ return;
+ }
+
+// TODO RTC: 189447 Enable MMIO tests when MMIO drivers avail
+ /**
+ * @brief EXPSCOM test MMIO
+ * Write value and read back to verify MMIO scoms to OCMBs
+ */
+// void testExpscomMmio(void)
+// {
+// TargetHandleList l_explorerList;
+// uint32_t l_tests = 0;
+// uint32_t l_fails = 0;
+// errlHndl_t l_err = nullptr;
+// fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+// fapi2::buffer<uint64_t> l_scom_buffer;
+//
+// // Get the system's procs
+// getAllChips( l_explorerList,
+// TYPE_OCMB_CHIP,
+// true ); // true: return functional OCMBs
+//
+// auto l_firstExpChip = l_explorerList.front();
+// auto l_lastExpChip = l_explorerList.back();
+//
+// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_firstExpChip_fapi(l_firstExpChip);
+// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
+//
+// auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+// auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+//
+//
+// // Loop through table for first and last OCMB, perform i2c write, then
+// // mmio read, and mmio write followed by i2c read.
+// for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+// {
+// testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+// if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+// {
+// l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+// }
+// else
+// {
+// l_scom_buffer.insert<0,32,0,uint32_t>(l_testEntry.data);
+// }
+//
+// // putScom to first OCMB over mmio
+// l_rc = put_scom(l_firstExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_firstExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+//
+// // putScom to last OCMB over mmio
+// l_rc = put_scom(l_lastExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_lastExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+//
+// // Flush scom buffer so it doesnt mess up next test
+// l_scom_buffer.flush<0>();
+//
+//
+// // getScom to first OCMB over mmio
+// l_rc = get_scom(l_firstExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_firstExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+//
+// l_tests++;
+// if(l_scom_buffer() != l_testEntry.data)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_scom_buffer(),
+// get_huid(l_firstExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+//
+// // Flush scom buffer so it doesnt mess up next test
+// l_scom_buffer.flush<0>();
+//
+// // getScom to last OCMB over mmio
+// l_rc = get_scom(l_lastExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_lastExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+//
+// l_tests++;
+// if(l_scom_buffer() != l_testEntry.data)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_scom_buffer(),
+// get_huid(l_lastExpChip));
+// l_err = fapi2::rcToErrl(l_rc);
+// errlCommit(l_err, 0x10);
+// }
+// }
+// // Set ATTR_SCOM_SWITCHES back to their original values
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+// return;
+// }
+
+ /**
+ * @brief EXPSCOM test MMIO
+ * Write value and read back to verify MMIO
+ */
+// void testExpscomCombined(void)
+// {
+// TargetHandleList l_explorerList;
+// uint32_t l_tests = 0;
+// uint32_t l_fails = 0;
+// fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+// fapi2::buffer<uint64_t> l_scom_buffer;
+//
+// // Get the system's procs
+// getAllChips( l_explorerList,
+// TYPE_OCMB_CHIP,
+// true ); // true: return functional OCMBs
+//
+// auto l_firstExpChip = l_explorerList.front();
+// auto l_lastExpChip = l_explorerList.back();
+//
+// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_firstExpChip_fapi(l_firstExpChip);
+// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
+//
+// auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+// auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+//
+// // Loop through table for first and last OCMB
+// for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+// {
+// testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+//
+// if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+// {
+// l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+// }
+// else
+// {
+// l_scom_buffer.insert<0,32,0,uint32_t>(l_testEntry.data);
+// }
+//
+// // ODD tests : first target writes MMIO, last target writes I2C
+// // EVEN tests : first target writes I2C, last target writes MMIO
+// if(l_num % 2)
+// {
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+// }
+// else
+// {
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
+// }
+//
+// // putScom to first OCMB over mmio
+// l_rc = put_scom(l_firstExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_firstExpChip));
+// }
+//
+// // putScom to last OCMB over mmio
+// l_rc = put_scom(l_lastExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_lastExpChip));
+// }
+//
+// // Flush scom buffer so it doesnt mess up next test
+// l_scom_buffer.flush<0>();
+//
+// // getScom to first OCMB over mmio
+// l_rc = get_scom(l_firstExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_firstExpChip));
+// }
+//
+// l_tests++;
+// if(l_scom_buffer() != l_testEntry.data)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_scom_buffer(),
+// get_huid(l_firstExpChip));
+// }
+//
+// // ODD tests : first target reads I2C, last target reads MMIO
+// // EVEN tests : first target reads MMIO, last target reads I2C
+// if(l_num % 2)
+// {
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
+// }
+// else
+// {
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+// }
+//
+// // Flush scom buffer so it doesnt mess up next test
+// l_scom_buffer.flush<0>();
+//
+// // getScom to last OCMB over mmio
+// l_rc = get_scom(l_lastExpChip_fapi,
+// l_testEntry.addr,
+// l_scom_buffer);
+// l_tests++;
+// if(l_rc)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_testEntry.addr,
+// get_huid(l_lastExpChip));
+// }
+//
+// l_tests++;
+// if(l_scom_buffer() != l_testEntry.data)
+// {
+// l_fails++;
+// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+// l_testEntry.data,
+// l_scom_buffer(),
+// get_huid(l_lastExpChip));
+// }
+// }
+// // Set ATTR_SCOM_SWITCHES back to their original values
+// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
+// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+// return;
+// }
+
+
+};
+
+#endif
diff --git a/src/usr/expaccess/test/makefile b/src/usr/expaccess/test/makefile
new file mode 100644
index 000000000..8f8fb86fc
--- /dev/null
+++ b/src/usr/expaccess/test/makefile
@@ -0,0 +1,33 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/expaccess/test/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2018,2019
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+ROOTPATH = ../../../..
+MODULE = testexpaccess
+
+include test.mk
+
+TESTS = *.H
+
+include ${ROOTPATH}/config.mk \ No newline at end of file
diff --git a/src/usr/expaccess/test/ocmbcommtest.H b/src/usr/expaccess/test/ocmbcommtest.H
new file mode 100644
index 000000000..3c717d939
--- /dev/null
+++ b/src/usr/expaccess/test/ocmbcommtest.H
@@ -0,0 +1,334 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/expaccess/test/ocmbcommtest.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __OCMBCOMMTEST_H
+#define __OCMBCOMMTEST_H
+/**
+ * @file ocmbcommtest.H
+ *
+ * @brief Test cases for OCMB communication protocol
+ */
+#include <cxxtest/TestSuite.H>
+#include <errl/errlmanager.H>
+#include <errl/errlentry.H>
+#include <fapi2.H>
+#ifndef __HOSTBOOT_RUNTIME
+#include <vfs/vfs.H> // module_is_loaded & module_load
+#endif
+#include <plat_hwp_invoker.H>
+#include <exp_inband.H>
+#include <exp_data_structs.H>
+#include <generic/memory/lib/utils/endian_utils.H>
+
+// EXP_FW_ADAPTER_PROPERTIES_GET data response format
+#define FW_ADAPTER_MAX_FW_IMAGE 4
+#define FW_ADAPTER_CHIP_VERSION_SIZE 128
+#define FW_ADAPTER_SPI_FLASH_ID_SIZE 32
+typedef struct
+{
+ uint32_t fw_number_of_images; // number of FW images
+ uint32_t boot_partion_id; // ID of current boot partion
+ struct fw_version_string
+ {
+ uint32_t major; // FW version - Major release
+ uint32_t minor; // FW version - Minor release
+ uint32_t build_num; // FW build number
+ uint32_t build_patch; // FW build path number
+ uint32_t sector_size; // FW sector size
+ } fw_ver_str[FW_ADAPTER_MAX_FW_IMAGE];
+
+ uint32_t ram_size_in_bytes; // RAM size in bytes
+ unsigned char chip_version[FW_ADAPTER_CHIP_VERSION_SIZE]; // Explorer chip revision
+ unsigned char spi_flash_id[FW_ADAPTER_SPI_FLASH_ID_SIZE]; // SPI flash ID
+ uint32_t spi_flash_size; // SPI flash size in bytes
+ uint32_t error_buffer_offset; // FW error buffer offset in SPI flash
+ uint32_t error_buffer_size; // FW error buffer size in bytes
+} FW_ADAPTER_PROPERTIES_type;
+
+
+// Testing this code
+const char EXPLORER_LIBRARY_NAME[16] = "libexpaccess.so";
+
+// Need this module for mss::c_str call in HWP failure path traces
+const char MSS_LIBRARY_NAME[17] = "libisteps_mss.so";
+
+/**
+ * @brief Generic function to load a module
+ * @param o_module_loaded - returns true if module is loaded by this function
+ * @param i_modName - module name to load
+ * @return error handle if module_load call fails
+ */
+errlHndl_t loadModule(bool & o_module_loaded, const char * i_modName)
+{
+ errlHndl_t err = NULL;
+ o_module_loaded = false;
+
+// VFS functions only compilable in non-runtime environment
+#ifndef __HOSTBOOT_RUNTIME
+ if(!VFS::module_is_loaded(i_modName))
+ {
+ err = VFS::module_load(i_modName);
+ if(err)
+ {
+ TS_FAIL("loadModule() - %s load failed", i_modName );
+ }
+ else
+ {
+ o_module_loaded = true;
+ FAPI_INF("loadModule: %s loaded", i_modName);
+ }
+ }
+#endif
+ return err;
+}
+
+/**
+ * @brief Generic function to unload a module
+ * @param i_modName - module name to load
+ * @return error handle if module_unload call fails
+ */
+errlHndl_t unloadModule(const char * i_modName)
+{
+ errlHndl_t err = NULL;
+
+// VFS function only compilable in non-runtime environment
+#ifndef __HOSTBOOT_RUNTIME
+ err = VFS::module_unload(i_modName);
+ if(err)
+ {
+ TS_FAIL("unloadExplorerModule() - %s unload failed", i_modName );
+ }
+ else
+ {
+ FAPI_INF("unloadModule: %s unloaded", i_modName);
+ }
+#endif
+ return err;
+}
+
+
+class OCMBCommTest: public CxxTest::TestSuite
+{
+ public:
+
+ /**
+ * @brief Fills in command structure for the EXP_FW_ADAPTER_PROPERTIES_GET cmd
+ * @param io_cmd -- command that gets filled in
+ */
+ void buildPropertiesGetCmd(host_fw_command_struct & io_cmd)
+ {
+ io_cmd.cmd_id = 0x07; // EXP_FW_ADAPTER_PROPERTIES_GET
+ io_cmd.cmd_flags = 0x00; // no additional data
+ io_cmd.request_identifier = 0x0203; // host generated id number
+ io_cmd.cmd_length = 0x00000000; // length of addditional data
+ io_cmd.cmd_crc = 0xFFFFFFFF; // CRC-32 of no additional data
+ io_cmd.host_work_area = 0x00000000;
+ io_cmd.cmd_work_area = 0x00000000;
+ memset(io_cmd.padding, 0, sizeof(io_cmd.padding));
+ memset(io_cmd.command_argument, 0, sizeof(io_cmd.command_argument));
+ }
+
+ /**
+ * @brief Convert structure from little endian format into big endian
+ * @param o_data -- big endian output
+ * @param i_data -- vector of little endian data
+ * @return true if successful, else false
+ */
+ bool fw_adapter_properties_struct_from_little_endian(
+ FW_ADAPTER_PROPERTIES_type & o_data,
+ std::vector<uint8_t>& i_data)
+ {
+ bool l_rc = false;
+
+ // make sure we don't go outside i_data range
+ if (i_data.size() >= sizeof(o_data))
+ {
+ uint32_t l_idx = 0;
+ l_rc = mss::readLE(i_data, l_idx, o_data.fw_number_of_images);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.boot_partion_id);
+ for (int i = 0; i < FW_ADAPTER_MAX_FW_IMAGE; ++i)
+ {
+ l_rc &= mss::readLE(i_data, l_idx, o_data.fw_ver_str[i].major);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.fw_ver_str[i].minor);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.fw_ver_str[i].build_num);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.fw_ver_str[i].build_patch);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.fw_ver_str[i].sector_size);
+ }
+ l_rc &= mss::readLE(i_data, l_idx, o_data.ram_size_in_bytes);
+ l_rc &= mss::readLEArray(i_data, FW_ADAPTER_CHIP_VERSION_SIZE, l_idx, o_data.chip_version);
+ l_rc &= mss::readLEArray(i_data, FW_ADAPTER_SPI_FLASH_ID_SIZE, l_idx, o_data.spi_flash_id);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.spi_flash_size);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.error_buffer_offset);
+ l_rc &= mss::readLE(i_data, l_idx, o_data.error_buffer_size);
+ }
+ else
+ {
+ TS_FAIL("fw_adapter_properties_struct_from_little_endian(): "
+ "not enough data present (%d, expected %d)",
+ i_data.size(), sizeof(o_data) );
+ }
+ return l_rc;
+ }
+
+ /**
+ * @brief Test the Explorer inband command/response path
+ */
+ void testOcmbInbandCmdRsp( void )
+ {
+ errlHndl_t l_errl = nullptr;
+
+ // Create a vector of TARGETING::Target pointers
+ TARGETING::TargetHandleList l_chipList;
+
+ // Get a list of all of the functioning ocmb chips
+ TARGETING::getAllChips(l_chipList, TARGETING::TYPE_OCMB_CHIP, true);
+
+ host_fw_command_struct l_cmd;
+ host_fw_response_struct l_rsp;
+ std::vector<uint8_t> l_rsp_data;
+
+ // Create a non-destructive get_properties command
+ buildPropertiesGetCmd(l_cmd);
+
+ for (auto & l_ocmb: l_chipList)
+ {
+ FAPI_INF("testOcmbInbandCmdRsp: testing 0x%.8X OCMB", TARGETING::get_huid(l_ocmb));
+
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>l_fapi2_target( l_ocmb );
+
+ // send the command
+ FAPI_INVOKE_HWP(l_errl, mss::exp::ib::putCMD, l_fapi2_target,
+ l_cmd);
+ if (l_errl)
+ {
+ TS_FAIL("Error from putCMD for 0x%.8X target",
+ TARGETING::get_huid(l_ocmb));
+ break;
+ }
+
+ // grab the response
+ FAPI_INVOKE_HWP(l_errl, mss::exp::ib::getRSP, l_fapi2_target,
+ l_rsp, l_rsp_data);
+ if (l_errl)
+ {
+ TS_FAIL("Error from getRSP for 0x%.8X target",
+ TARGETING::get_huid(l_ocmb));
+ break;
+ }
+
+ // Check for a valid data response length
+ if (l_rsp.response_length != sizeof(FW_ADAPTER_PROPERTIES_type))
+ {
+ TS_FAIL("Unexpected response length 0x%.8X (expected 0x%.8X)",
+ l_rsp.response_length, sizeof(FW_ADAPTER_PROPERTIES_type));
+ break;
+ }
+
+ // Now convert the little endian response data into big endian
+ FW_ADAPTER_PROPERTIES_type l_fw_adapter_data;
+ fw_adapter_properties_struct_from_little_endian(l_fw_adapter_data,
+ l_rsp_data);
+
+ // Check for some expected response values
+ // Simics should return 0x10 as the first byte of chip_version
+ if (l_fw_adapter_data.chip_version[0] != 0x10 )
+ {
+ TS_FAIL("Expected chip_version to start with 0x10, found 0x%02X",
+ l_fw_adapter_data.chip_version[0]);
+ }
+ }
+
+ if (l_errl)
+ {
+ errlCommit( l_errl, TARG_COMP_ID );
+ }
+ FAPI_INF("testOcmbInbandCmdRsp: exiting");
+ };
+
+ /**
+ * @brief Constructor
+ */
+ OCMBCommTest() : CxxTest::TestSuite()
+ {
+ explorer_module_loaded = false;
+ mss_module_loaded = false;
+
+ // All modules are loaded by runtime,
+ // so testcase loading of modules is not required
+#ifndef __HOSTBOOT_RUNTIME
+ errlHndl_t err = nullptr;
+ err = loadModule(explorer_module_loaded, EXPLORER_LIBRARY_NAME);
+ if(err)
+ {
+ TS_FAIL("OCMBCommTest() - Constuctor: failed to load EXPLORER module");
+ errlCommit( err, TARG_COMP_ID );
+ }
+ else
+ {
+ err = loadModule(mss_module_loaded, MSS_LIBRARY_NAME);
+ if(err)
+ {
+ TS_FAIL("OCMBCommTest() - Constuctor: failed to load MSS module");
+ errlCommit( err, TARG_COMP_ID );
+ }
+ }
+#endif
+ };
+
+
+ /**
+ * @brief Destructor
+ */
+ ~OCMBCommTest()
+ {
+ errlHndl_t err = nullptr;
+ if (explorer_module_loaded)
+ {
+ err = unloadModule(EXPLORER_LIBRARY_NAME);
+ if(err)
+ {
+ TS_FAIL("~OCMBCommTest() - Destructor: failed to unload EXPLORER module");
+ errlCommit( err, TARG_COMP_ID );
+ }
+ }
+ if (mss_module_loaded)
+ {
+ err = unloadModule(MSS_LIBRARY_NAME);
+ if(err)
+ {
+ TS_FAIL("~OCMBCommTest() - Destructor: failed to unload MSS module");
+ errlCommit( err, TARG_COMP_ID );
+ }
+ }
+ };
+
+ private:
+ // use these to keep track of if we need to unload any
+ // modules loaded by this testcase
+ bool explorer_module_loaded;
+ bool mss_module_loaded;
+
+};
+
+#endif
diff --git a/src/usr/expaccess/test/test.mk b/src/usr/expaccess/test/test.mk
new file mode 100644
index 000000000..059efe27d
--- /dev/null
+++ b/src/usr/expaccess/test/test.mk
@@ -0,0 +1,35 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/expaccess/test/test.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2019
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2
+EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory/
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/ocmb/explorer/common/include
+EXTRAINCDIR += ${ROOTPATH}/src/import
+
+
+include ${ROOTPATH}/config.mk
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