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-rwxr-xr-xsrc/usr/diag/prdf/common/framework/rule/prdrCompile.C2
-rwxr-xr-xsrc/usr/diag/prdf/common/framework/service/prdfTargetServices.C48
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Ex.rule187
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule627
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule938
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule388
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule61
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule92
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C1
-rwxr-xr-xsrc/usr/diag/prdf/framework/rule/makefile2
10 files changed, 555 insertions, 1791 deletions
diff --git a/src/usr/diag/prdf/common/framework/rule/prdrCompile.C b/src/usr/diag/prdf/common/framework/rule/prdrCompile.C
index 68bb2e881..81ebfd86c 100755
--- a/src/usr/diag/prdf/common/framework/rule/prdrCompile.C
+++ b/src/usr/diag/prdf/common/framework/rule/prdrCompile.C
@@ -453,6 +453,8 @@ uint32_t prdrActionArgMap(const std::string & i_arg)
g_ActionArgMap["TYPE_MEMBUF"] = TARGETING::TYPE_MEMBUF;
g_ActionArgMap["TYPE_L4"] = TARGETING::TYPE_L4;
g_ActionArgMap["TYPE_MBA"] = TARGETING::TYPE_MBA;
+ g_ActionArgMap["TYPE_OCC"] = TARGETING::TYPE_OCC;
+ g_ActionArgMap["TYPE_PSI"] = TARGETING::TYPE_PSI;
// Initialize symbolic callouts.
for ( SymCallout_t * i = symCalloutArray; NULL != i->str; i++ )
diff --git a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C
index f0341d830..80084807e 100755
--- a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C
+++ b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C
@@ -340,15 +340,17 @@ struct conn_t
case TYPE_SYS: order = 0; break;
case TYPE_NODE: order = 1; break;
case TYPE_PROC: order = 2; break;
- case TYPE_EX: order = 3; break;
- case TYPE_XBUS: order = 4; break;
- case TYPE_ABUS: order = 5; break;
- case TYPE_PCI: order = 6; break;
- case TYPE_MCS: order = 7; break;
- case TYPE_MEMBUF: order = 8; break;
- case TYPE_L4: order = 9; break;
- case TYPE_MBA: order = 10; break;
- case TYPE_DIMM: order = 11; break;
+ case TYPE_OCC: order = 3; break;
+ case TYPE_PSI: order = 4; break;
+ case TYPE_EX: order = 5; break;
+ case TYPE_XBUS: order = 6; break;
+ case TYPE_ABUS: order = 7; break;
+ case TYPE_PCI: order = 8; break;
+ case TYPE_MCS: order = 9; break;
+ case TYPE_MEMBUF: order = 10; break;
+ case TYPE_L4: order = 11; break;
+ case TYPE_MBA: order = 12; break;
+ case TYPE_DIMM: order = 13; break;
default: ;
}
@@ -382,6 +384,8 @@ int32_t getAssociationType( TARGETING::TargetHandle_t i_target,
{ TYPE_SYS, TYPE_NODE, TargetService::CHILD_BY_AFFINITY },
{ TYPE_NODE, TYPE_SYS, TargetService::PARENT_BY_AFFINITY },
{ TYPE_NODE, TYPE_PROC, TargetService::CHILD_BY_AFFINITY },
+ { TYPE_NODE, TYPE_OCC, TargetService::CHILD_BY_AFFINITY },
+ { TYPE_NODE, TYPE_PSI, TargetService::CHILD_BY_AFFINITY },
{ TYPE_NODE, TYPE_EX, TargetService::CHILD_BY_AFFINITY },
{ TYPE_NODE, TYPE_XBUS, TargetService::CHILD_BY_AFFINITY },
{ TYPE_NODE, TYPE_ABUS, TargetService::CHILD_BY_AFFINITY },
@@ -393,6 +397,8 @@ int32_t getAssociationType( TARGETING::TargetHandle_t i_target,
{ TYPE_NODE, TYPE_DIMM, TargetService::CHILD_BY_AFFINITY },
{ TYPE_PROC, TYPE_NODE, TargetService::PARENT_BY_AFFINITY },
+ { TYPE_PROC, TYPE_OCC, TargetService::CHILD_BY_AFFINITY },
+ { TYPE_PROC, TYPE_PSI, TargetService::CHILD_BY_AFFINITY },
{ TYPE_PROC, TYPE_EX, TargetService::CHILD_BY_AFFINITY },
{ TYPE_PROC, TYPE_XBUS, TargetService::CHILD_BY_AFFINITY },
{ TYPE_PROC, TYPE_ABUS, TargetService::CHILD_BY_AFFINITY },
@@ -403,6 +409,12 @@ int32_t getAssociationType( TARGETING::TargetHandle_t i_target,
{ TYPE_PROC, TYPE_MBA, TargetService::CHILD_BY_AFFINITY },
{ TYPE_PROC, TYPE_DIMM, TargetService::CHILD_BY_AFFINITY },
+ { TYPE_OCC, TYPE_NODE, TargetService::PARENT_BY_AFFINITY },
+ { TYPE_OCC, TYPE_PROC, TargetService::PARENT_BY_AFFINITY },
+
+ { TYPE_PSI, TYPE_NODE, TargetService::PARENT_BY_AFFINITY },
+ { TYPE_PSI, TYPE_PROC, TargetService::PARENT_BY_AFFINITY },
+
{ TYPE_EX, TYPE_NODE, TargetService::PARENT_BY_AFFINITY },
{ TYPE_EX, TYPE_PROC, TargetService::PARENT_BY_AFFINITY },
@@ -648,14 +660,22 @@ TargetHandle_t getConnectedPeerTarget( TargetHandle_t i_target )
}
TYPE type = getTargetType( i_target );
- if ( TYPE_XBUS != type && TYPE_ABUS != type )
+
+ switch( type )
{
- PRDF_ERR( PRDF_FUNC"Target type not supported: i_target=0x%08x "
- "type=0x%x", getHuid(i_target), type );
- break;
+ case TYPE_XBUS:
+ case TYPE_ABUS:
+ case TYPE_PSI:
+
+ o_target = i_target->getAttr<ATTR_PEER_TARGET>();
+
+ break;
+
+ default:
+ PRDF_ERR( PRDF_FUNC"Target type not supported: i_target=0x%08x "
+ "type=0x%x", getHuid(i_target), type );
}
- o_target = i_target->getAttr<ATTR_PEER_TARGET>();
} while(0);
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
index 41ebaa0c3..a7777ab89 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
@@ -499,307 +499,323 @@ rule CoreFir
RECOVERABLE: COREFIR & ~COREFIR_MASK & ~COREFIR_ACT0 & COREFIR_ACT1;
};
-group gCoreFir filter priority(0,1,2,3,4,5,6,7,8,9,
- 10,11,12,13,14,15,16,17,18,19,
- 20,21,22,23,24,25,26,27,28,29,
- 30,31,32,33,34,35,36,37,38,39,
- 40,41,42,43,44, 46,47,48,49,
- 50,51,52,53,54,55,56,57,58,59,
- 60,61,62,63)
- # (I assume this is still true...pay attention to this in FIR reviews)
- # Bit 45 should be a low priority bit but isn't at the end. It is used in
- # a workaround for core checkstops and can come one with other core
- # checkstop errors.
+#Based on RAS SpreadSheet p8dd1_mss_FFDC_51.xls
+group gCoreFir filter singlebit
{
/** COREFIR[0]
* IFU_SRAM_PARITY_ERR: SRAM recoverable error (ICACHE parity error, etc.)
*/
- (CoreFir, bit(0)) ? TBDDefaultCallout;
+ (CoreFir, bit(0)) ? SelfHighThr5PerHour;
/** COREFIR[1]
* IF_SETDELETE_ERR: set deleted
*/
- (CoreFir, bit(1)) ? TBDDefaultCallout;
+ #FIXME RTC 23127 a comment observed against bit 1
+ (CoreFir, bit(1)) ? SelfHighThr1;
/** COREFIR[2]
* IF_RFILE_REC_ERR: RegFile recoverable error
*/
- (CoreFir, bit(2)) ? TBDDefaultCallout;
+ (CoreFir, bit(2)) ? SelfHighThr5PerHour;
/** COREFIR[3]
* IF_RFILE_CHKSTOP_ERR: RegFile core check stop
*/
- (CoreFir, bit(3)) ? TBDDefaultCallout;
+ (CoreFir, bit(3)) ? SelfHighThr1;
/** COREFIR[4]
* IF_LOG_REC_ERR: logic recoverable error
*/
- (CoreFir, bit(4)) ? TBDDefaultCallout;
+ (CoreFir, bit(4)) ? SelfHighThr5PerHour;
/** COREFIR[5]
* IF_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(5)) ? TBDDefaultCallout;
+ (CoreFir, bit(5)) ? SelfHighThr1;
/** COREFIR[6]
* IF_NOT_MT_REC_ERR: recoverable if not in MT window
*/
- (CoreFir, bit(6)) ? TBDDefaultCallout;
+ (CoreFir, bit(6)) ? checkAttnThrldOrCallout;
/** COREFIR[7]
* IF_CHKSTOP_ERR: system check stop
*/
- (CoreFir, bit(7)) ? TBDDefaultCallout;
+ (CoreFir, bit(7)) ? SelfHighThr1;
/** COREFIR[8]
* RECOV_FIR_CHKSTOP_ERR: recovery core check stop
*/
- (CoreFir, bit(8)) ? TBDDefaultCallout;
+ (CoreFir, bit(8)) ? spareOrSelfHighThr1;
/** COREFIR[9]
* SD_RFILE_REC_ERR: RegFile recoverable error
*/
- (CoreFir, bit(9)) ? TBDDefaultCallout;
+ (CoreFir, bit(9)) ? SelfHighThr5PerHour;
/** COREFIR[10]
* SD_RFILE_CHKSTOP_ERR: RegFile core check stop (mapper error)
*/
- (CoreFir, bit(10)) ? TBDDefaultCallout;
+ (CoreFir, bit(10)) ? SelfHighThr1;
/** COREFIR[11]
* SD_LOG_REC_ERR: logic recoverable error
*/
- (CoreFir, bit(11)) ? TBDDefaultCallout;
+ (CoreFir, bit(11)) ? SelfHighThr5PerHour;
/** COREFIR[12]
* SD_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(12)) ? TBDDefaultCallout;
+ (CoreFir, bit(12)) ? SelfHighThr1;
/** COREFIR[13]
* SD_NOT_MT_REC_ERR: recoverable if not in MT window
*/
- (CoreFir, bit(13)) ? TBDDefaultCallout;
+ (CoreFir, bit(13)) ? checkAttnThrldOrCallout;
/** COREFIR[14]
* SD_MCHK_AND_ME_EQ_0: MCHK received while ME=0 non recoverable
*/
- (CoreFir, bit(14)) ? TBDDefaultCallout;
+ #FIXME RTC 23127 A side note observed against this bit regarding
+ # it's better handling
+ (CoreFir, bit(14)) ? SelfHighThr1;
/** COREFIR[15]
* SD_PC_L2_UE_ERR: UE from L2
*/
- (CoreFir, bit(15)) ? TBDDefaultCallout;
+ (CoreFir, bit(15)) ? defaultMaskedError;
/** COREFIR[16]
* ISU_L2_UE_OVER_TH_ERR: Number of UEs from L2 above threshold
*/
- (CoreFir, bit(16)) ? TBDDefaultCallout;
+ (CoreFir, bit(16)) ? defaultMaskedError;
/** COREFIR[17]
* SD_PC_CI_UE: UE on CI load
*/
- (CoreFir, bit(17)) ? TBDDefaultCallout;
+ (CoreFir, bit(17)) ? defaultMaskedError;
+
+ /** COREFIR[18]
+ * UNUSED_2
+ */
+ (CoreFir, bit(18)) ? defaultMaskedError;
/** COREFIR[19]
* FX_GPR_REC_ERR: GPR recoverable error
*/
- (CoreFir, bit(19)) ? TBDDefaultCallout;
+ (CoreFir, bit(19)) ? SelfHighThr5PerHour;
+
+ /** COREFIR[20]
+ * UNUSED_3
+ */
+ (CoreFir, bit(20)) ? defaultMaskedError;
/** COREFIR[21]
* FX_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(21)) ? TBDDefaultCallout;
+ (CoreFir, bit(21)) ? SelfHighThr1;
/** COREFIR[22]
* FX_NOT_MT_REC_ERR: recoverable if not in MT window
*/
- (CoreFir, bit(22)) ? TBDDefaultCallout;
+ (CoreFir, bit(22)) ? checkAttnThrldOrCallout;
/** COREFIR[23]
* VS_VRF_REC_ERR: VRF recoverable error
*/
- (CoreFir, bit(23)) ? TBDDefaultCallout;
+ (CoreFir, bit(23)) ? SelfHighThr5PerHour;
/** COREFIR[24]
* VS_LOG_REC_ERR: logic recoverable error
*/
- (CoreFir, bit(24)) ? TBDDefaultCallout;
+ (CoreFir, bit(24)) ? SelfHighThr5PerHour;
/** COREFIR[25]
* VS_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(25)) ? TBDDefaultCallout;
+ (CoreFir, bit(25)) ? SelfHighThr1;
/** COREFIR[26]
* RECOV_IN_MAINT_ERR: 26 = recov_in_maint
*/
- (CoreFir, bit(26)) ? TBDDefaultCallout;
+ (CoreFir, bit(26)) ? callout2ndLvlMed;
/** COREFIR[27]
* DU_LOG_REC_ERR: logic recoverable error
*/
- (CoreFir, bit(27)) ? TBDDefaultCallout;
+ (CoreFir, bit(27)) ? SelfHighThr5PerHour;
/** COREFIR[28]
* DU_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(28)) ? TBDDefaultCallout;
+ (CoreFir, bit(28)) ? defaultMaskedError;
/** COREFIR[29]
* LSU_SRAM_PARITY_ERR: SRAM recoverable error (DCACHE parity error, etc.)
*/
- (CoreFir, bit(29)) ? TBDDefaultCallout;
+ (CoreFir, bit(29)) ? SelfHighThr5PerHour;
/** COREFIR[30]
* LS_SETDELETE_ERR: set deleted
*/
- (CoreFir, bit(30)) ? TBDDefaultCallout;
+ #FIXME RTC 23127 Observed ??? against this bit in spreadsheet
+ (CoreFir, bit(30)) ? SelfHighThr1;
/** COREFIR[31]
* LS_RFILE_REC_ERR: RegFile recoverable error
*/
- (CoreFir, bit(31)) ? TBDDefaultCallout;
+ (CoreFir, bit(31)) ? SelfHighThr5PerHour;
/** COREFIR[32]
* LS_RFILE_CHKSTOP_ERR: RegFile core check stop
*/
- (CoreFir, bit(32)) ? TBDDefaultCallout;
+ (CoreFir, bit(32)) ? SelfHighThr1;
/** COREFIR[33]
* LS_TLB_MULTIHIT_ERR: special recovery error TLB multi hit error occurred
*/
- (CoreFir, bit(33)) ? TBDDefaultCallout;
+ (CoreFir, bit(33)) ? defaultMaskedError;
/** COREFIR[34]
* LS_SLB_MULTIHIT_ERR: special recovery error SLBFEE multi hit error occurred
*/
- (CoreFir, bit(34)) ? TBDDefaultCallout;
+ (CoreFir, bit(34)) ? defaultMaskedError;
/** COREFIR[35]
* LS_DERAT_MULTIHIT_ERR: special recovery error ERAT multi hit error occurred
*/
- (CoreFir, bit(35)) ? TBDDefaultCallout;
+ (CoreFir, bit(35)) ? defaultMaskedError;
/** COREFIR[36]
* FORWARD_PROGRESS_ERR: forward progress error
*/
- (CoreFir, bit(36)) ? TBDDefaultCallout;
+ (CoreFir, bit(36)) ? SelfHighThr1;
/** COREFIR[37]
* LS_LOG_REC_ERR: logic recoverable error
*/
- (CoreFir, bit(37)) ? TBDDefaultCallout;
+ (CoreFir, bit(37)) ? SelfHighThr5PerHour;
/** COREFIR[38]
* LS_LOG_CHKSTOP_ERR: logic core check stop
*/
- (CoreFir, bit(38)) ? TBDDefaultCallout;
+ (CoreFir, bit(38)) ? SelfHighThr1;
/** COREFIR[39]
* LS_NOT_MT_REC_ERR: recoverable if not in MT window
*/
- (CoreFir, bit(39)) ? TBDDefaultCallout;
+ (CoreFir, bit(39)) ? checkAttnThrldOrCallout;
/** COREFIR[40]
* LS_NOT_CI_REC_ERR: recoverable if not in CI window
*/
- (CoreFir, bit(40)) ? TBDDefaultCallout;
+ (CoreFir, bit(40)) ? checkAttnThrldOrCallout;
/** COREFIR[41]
* LS_CHKSTOP_ERR: system check stop
*/
- (CoreFir, bit(41)) ? TBDDefaultCallout;
+ (CoreFir, bit(41)) ? SelfHighThr1;
/** COREFIR[42]
* LS_GPR_RCV_CHKSTOP_ERR: UE from GPR/VRF recovery process
*/
- (CoreFir, bit(42)) ? TBDDefaultCallout;
+ (CoreFir, bit(42)) ? defaultMaskedError;
/** COREFIR[43]
* THREAD_HANG_REC_ERR: thread hang recoverable error
*/
- (CoreFir, bit(43)) ? TBDDefaultCallout;
+ (CoreFir, bit(43)) ? SelfAndLevel2MedThr5PerHr;
/** COREFIR[44]
* FIR_LOG_RECOV_ERR: logic recoverable error
*/
- (CoreFir, bit(44)) ? TBDDefaultCallout;
+ (CoreFir, bit(44)) ? SelfHighThr5PerHour;
/** COREFIR[45]
* PC_LOG_CHKSTOP_ERR: PC logic core check stop
*/
- (CoreFir, bit(45)) ? TBDDefaultCallout;
+ (CoreFir, bit(45)) ? SelfHighThr1;
+
+ /** COREFIR[46]
+ * RESERVED
+ */
+ (CoreFir, bit(46)) ? defaultMaskedError;
/** COREFIR[47]
* TFC_FIR_TFMR_P_ERR: TFMR Parity Error (timing facility may be corrupt)
*/
- (CoreFir, bit(47)) ? TBDDefaultCallout;
+ (CoreFir, bit(47)) ? defaultMaskedError;
/** COREFIR[48]
* SPRD_FIR_HYP_RES_P_ERR: Hypervisor Resource error - core check stop
*/
- (CoreFir, bit(48)) ? TBDDefaultCallout;
+ (CoreFir, bit(48)) ? SelfHighThr1;
/** COREFIR[49]
* TFC_FIR_P_ERR: TFAC parity error
*/
- (CoreFir, bit(49)) ? TBDDefaultCallout;
+ (CoreFir, bit(49)) ? defaultMaskedError;
/** COREFIR[50]
* TFC_FIR_CONTROL_ERR: TFAC control error
*/
- (CoreFir, bit(50)) ? TBDDefaultCallout;
+ (CoreFir, bit(50)) ? defaultMaskedError;
/** COREFIR[51]
* PC_FIRM_AND_SEL_ERR: TFAC firmware error and select error
*/
- (CoreFir, bit(51)) ? TBDDefaultCallout;
+ (CoreFir, bit(51)) ? defaultMaskedError;
/** COREFIR[52]
* CORE_HUNG: Hang recovery failed (core check stop)
*/
- (CoreFir, bit(52)) ? TBDDefaultCallout;
+ (CoreFir, bit(52)) ? SelfHighThr1;
/** COREFIR[53]
* CORE_HANG_DETECT: Internal hang detected (core hang)
*/
- (CoreFir, bit(53)) ? TBDDefaultCallout;
+ (CoreFir, bit(53)) ? defaultMaskedError;
/** COREFIR[54]
* AMBI_HANG_DETECT: Hang detected unknown source
*/
- (CoreFir, bit(54)) ? TBDDefaultCallout;
+ (CoreFir, bit(54)) ? calloutSelfAndLevel2MedThr1;
/** COREFIR[55]
* NEST_HANG_DETECT: External Hang detected
*/
- (CoreFir, bit(55)) ? TBDDefaultCallout;
+ (CoreFir, bit(55)) ? calloutProcLow2ndLvlMedThr1;
+
+ /** COREFIR[56|57|58]
+ * RESERVED
+ */
+ (CoreFir, bit(56|57|58)) ? defaultMaskedError;
/** COREFIR[59]
* PC_SOM_ERR: SCOM satellite error detected
*/
- (CoreFir, bit(59)) ? TBDDefaultCallout;
+ (CoreFir, bit(59)) ? defaultMaskedError;
/** COREFIR[60]
* DBG_FIR_CHECKSTOP_ON_TRIGGER: debug Trigger Error inject
*/
- (CoreFir, bit(60)) ? TBDDefaultCallout;
+ (CoreFir, bit(60)) ? defaultMaskedError;
/** COREFIR[61]
* SP_INJ_REC_ERR: SCOM or Firmware recoverable Error Inject
*/
- (CoreFir, bit(61)) ? TBDDefaultCallout;
+ (CoreFir, bit(61)) ? defaultMaskedError;
/** COREFIR[62]
* SP_INJ_XSTOP_ERR: Firmware Xstop Error Inject
*/
- (CoreFir, bit(62)) ? TBDDefaultCallout;
+ (CoreFir, bit(62)) ? defaultMaskedError;
/** COREFIR[63]
* SPRD_PHYP_ERR_INJ: Phyp Xstop via SPRC / SPRD
*/
- (CoreFir, bit(63)) ? TBDDefaultCallout;
+ #FIXME RTC 23127 Needto clarify action Chip+SW Level 2IPP
+ (CoreFir, bit(63)) ? callout2ndLvlMed;
};
################################################################################
@@ -1453,3 +1469,36 @@ actionclass calloutParentProcLow
{
callout(connected(TYPE_PROC),MRU_LOW);
};
+
+/** calls out Ex if threshold exceeds. Calls for second level support as well*/
+actionclass SelfAndLevel2MedThr5PerHr
+{
+ calloutSelfMed;
+ callout2ndLvlMed;
+ threshold5phour;
+};
+
+/** callouts Proc on first instance. Calls for second level support as well*/
+actionclass calloutProcLow2ndLvlMedThr1
+{
+ calloutParentProcLow;
+ callout2ndLvlMed;
+ threshold1;
+};
+
+/** Callouts core with high priority on first instance if sparing not done */
+actionclass spareOrSelfHighThr1
+{
+ #FIXME RTC 23127 Need to figure out extension bit to determine if sparing
+ # is done
+ TBDDefaultCallout;
+};
+
+/** if attention is recoverable then threshold else callout and gard on first
+ * instance*/
+
+actionclass checkAttnThrldOrCallout
+{
+ #FIXME RTC 23127 Need to clarify what is Threshold B
+ TBDDefaultCallout;
+};
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule
index b34610040..ba4d91035 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule
@@ -83,7 +83,7 @@ group gPbChipletFir filter singlebit
/** PB_CHIPLET_FIR[14]
* Attention from EHHCAFIR
*/
- (PbChipletFir, bit(14)) ? analyze(gEhHcaFir);
+ (PbChipletFir, bit(14)) ? defaultMaskedError;
/** PB_CHIPLET_FIR[15]
* Attention from NXASFIR
@@ -93,7 +93,7 @@ group gPbChipletFir filter singlebit
/** PB_CHIPLET_FIR[16]
* Attention from ENHCAFIR
*/
- (PbChipletFir, bit(16)) ? analyze(gEnHcaFir);
+ (PbChipletFir, bit(16)) ? defaultMaskedError;
/** PB_CHIPLET_FIR[17|18|19]
* Attention from PCINESTFIRs
@@ -194,6 +194,8 @@ rule NxDmaEngFir
NXDMAENGFIR & ~NXDMAENGFIR_MASK & ~NXDMAENGFIR_ACT0 & NXDMAENGFIR_ACT1;
};
+#FIXME RTC 23127 Due to various pending queries action for many bits not defined
+#yet
group gNxDmaEngFir filter singlebit
{
# FIXME - Get confirmation from HW team to see how this FIR is wired.
@@ -235,7 +237,7 @@ group gNxDmaEngFir filter singlebit
/** NXDMAENGFIR[8]
* DMA non-zero CSB CC detected
*/
- (NxDmaEngFir, bit(8)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(8)) ? defaultMaskedError;
/** NXDMAENGFIR[9]
* DMA array correctable ECC error
@@ -265,7 +267,7 @@ group gNxDmaEngFir filter singlebit
/** NXDMAENGFIR[14]
* Error from other SCOM satellites
*/
- (NxDmaEngFir, bit(14)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(14)) ? defaultMaskedError;
/** NXDMAENGFIR[15]
* DMA invalid state error
@@ -355,12 +357,12 @@ group gNxDmaEngFir filter singlebit
/** NXDMAENGFIR[32]
* SUE error on CRB(CSB address, CCB)
*/
- (NxDmaEngFir, bit(32)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(32)) ? defaultMaskedError;
/** NXDMAENGFIR[33]
* SUE error on something other than CRB(CSB address, CCB)
*/
- (NxDmaEngFir, bit(33)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(33)) ? defaultMaskedError;
/** NXDMAENGFIR[34|35]
* Reserved
@@ -385,12 +387,12 @@ group gNxDmaEngFir filter singlebit
/** NXDMAENGFIR[48]
* FIR/SCOM satellite parity error
*/
- (NxDmaEngFir, bit(48)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(48)) ? defaultMaskedError;
/** NXDMAENGFIR[49]
* FIR/SCOM satellite parity error FIR bit duplicate
*/
- (NxDmaEngFir, bit(49)) ? TBDDefaultCallout;
+ (NxDmaEngFir, bit(49)) ? defaultMaskedError;
};
################################################################################
@@ -1477,6 +1479,8 @@ group gPbCentFir filter singlebit
# PB Chiplet PSIHBFIR
################################################################################
+#actions for bits updated based on p8dd1_mss_FFDC_54
+
rule PsiHbFir
{
CHECK_STOP: PSIHBFIR & ~PSIHBFIR_MASK & ~PSIHBFIR_ACT0 & ~PSIHBFIR_ACT1;
@@ -1488,133 +1492,145 @@ group gPsiHbFir filter singlebit
/** PSIHBFIR[0]
* PB_ECC_ERR_CE
*/
- (PsiHbFir, bit(0)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(0)) ? SelfHighThr32PerDay;
/** PSIHBFIR[1]
* PB_ECC_ERR_UE
*/
- (PsiHbFir, bit(1)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(1)) ? SelfHighThr1;
/** PSIHBFIR[2]
* PB_ECC_ERR_SUE
*/
- (PsiHbFir, bit(2)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(2)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[3]
* INTERRUPT_FROM_ERROR
*/
- (PsiHbFir, bit(3)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(3)) ? defaultMaskedError;
/** PSIHBFIR[4]
* INTERRUPT_FROM_FSP
*/
- (PsiHbFir, bit(4)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(4)) ? defaultMaskedError;
/** PSIHBFIR[5]
* FSP_ECC_ERR_CE
*/
- (PsiHbFir, bit(5)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(5)) ? calloutPsiThr32;
/** PSIHBFIR[6]
* FSP_ECC_ERR_UE
*/
- (PsiHbFir, bit(6)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(6)) ? calloutPsiThr1;
/** PSIHBFIR[7]
* ERROR_STATE
*/
- (PsiHbFir, bit(7)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(7)) ? defaultMaskedError;
/** PSIHBFIR[8]
* INVALID_TTYPE
*/
- (PsiHbFir, bit(8)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(8)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[9]
* INVALID_CRESP
*/
- (PsiHbFir, bit(9)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(9)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[10]
* PB_DATA_TIME_OUT
*/
- (PsiHbFir, bit(10)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(10)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[11]
* PB_PARITY_ERROR
*/
- (PsiHbFir, bit(11)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(11)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[12]
* FSP_ACCESS_TRUSTED_SPACE
*/
- (PsiHbFir, bit(12)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(12)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[13]
* UNEXPECTED_PB
*/
- (PsiHbFir, bit(13)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(13)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[14]
* INTERRUPT_REG_CHANGE_WHILE_ACTIVE
*/
- (PsiHbFir, bit(14)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(14)) ? defaultMaskedError;
/** PSIHBFIR[15]
* INTERRUPT0_ADDRESS_ERROR
*/
- (PsiHbFir, bit(15)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(15)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[16]
* INTERRUPT1_ADDRESS_ERROR
*/
- (PsiHbFir, bit(16)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(16)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[17]
* INTERRUPT2_ADDRESS_ERROR
*/
- (PsiHbFir, bit(17)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(17)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[18]
* INTERRUPT3_ADDRESS_ERROR
*/
- (PsiHbFir, bit(18)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(18)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[19]
* INTERRUPT4_ADDRESS_ERROR
*/
- (PsiHbFir, bit(19)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(19)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[20]
* INTERRUPT5_ADDRESS_ERROR
*/
- (PsiHbFir, bit(20)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(20)) ? callout2ndLvlMedThr1;
/** PSIHBFIR[21]
* TCBR_TP_PSI_GLB_ERR_0
*/
+ #FIXME RTC 23127 Action not clear from spread sheet
(PsiHbFir, bit(21)) ? TBDDefaultCallout;
/** PSIHBFIR[22]
* TCBR_TP_PSI_GLB_ERR_1
*/
- (PsiHbFir, bit(22)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(22)) ? defaultMaskedError;
/** PSIHBFIR[23]
+ * UPSTREAM_FIR
+ */
+ (PsiHbFir, bit(23)) ? callout2ndLvlMedThr32perDay;
+
+ /** PSIHBFIR[24|25|26]
+ * SPARE_FIR
+ */
+ (PsiHbFir, bit(24|25|26)) ? defaultMaskedError;
+
+ /** PSIHBFIR[27]
* SCOM_ERROR
*/
- (PsiHbFir, bit(23)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(27)) ? defaultMaskedError;
- /** PSIHBFIR[24]
+ /** PSIHBFIR[28]
* FIR_PARITY_ERROR
*/
- (PsiHbFir, bit(24)) ? TBDDefaultCallout;
+ (PsiHbFir, bit(28)) ? defaultMaskedError;
};
################################################################################
# PB Chiplet ICPFIR
################################################################################
+#Based on p8dd1_mss_FFDC_54.xls
rule IcpFir
{
CHECK_STOP: ICPFIR & ~ICPFIR_MASK & ~ICPFIR_ACT0 & ~ICPFIR_ACT1;
@@ -1623,65 +1639,63 @@ rule IcpFir
group gIcpFir filter singlebit
{
+ # TODO RTC23127 Here we are calling out proc but in RAS spreadsheet
+ # ICR target is mentioned. Verify.
/** ICPFIR[0]
* INT_HW_ERROR_EOI_Q
*/
- (IcpFir, bit(0)) ? TBDDefaultCallout;
+ (IcpFir, bit(0)) ? SelfMedThr1;
/** ICPFIR[1]
* INT_HW_ERROR_FWD_Q
*/
- (IcpFir, bit(1)) ? TBDDefaultCallout;
+ (IcpFir, bit(1)) ? SelfMedThr1;
/** ICPFIR[2]
* INT_HW_ERROR_IR_QU
*/
- (IcpFir, bit(2)) ? TBDDefaultCallout;
+ (IcpFir, bit(2)) ? SelfMedThr1;
/** ICPFIR[3]
* INT_HW_ERROR_RET_Q
*/
- (IcpFir, bit(3)) ? TBDDefaultCallout;
+ (IcpFir, bit(3)) ? SelfMedThr32PerDay;
+ # TODO RTC23127 verify bit 4
/** ICPFIR[4]
* INT_HW_ERROR_ADDRI
*/
- (IcpFir, bit(4)) ? TBDDefaultCallout;
+ (IcpFir, bit(4)) ? defaultMaskedError;
/** ICPFIR[5]
* INT_HW_ERROR_DATAI
*/
- (IcpFir, bit(5)) ? TBDDefaultCallout;
+ (IcpFir, bit(5)) ? SelfMedThr32PerDay;
/** ICPFIR[6]
* INT_HW_ERROR_ADDRO
*/
- (IcpFir, bit(7)) ? TBDDefaultCallout;
+ (IcpFir, bit(6)) ? SelfMedThr32PerDay;
+
+ /** ICPFIR[7]
+ * INT_HW_ERROR_DATAO
+ */
+ (IcpFir, bit(7)) ? SelfMedThr32PerDay;
/** ICPFIR[8]
* INT_HW_ERROR_LDSTQ
*/
- (IcpFir, bit(8)) ? TBDDefaultCallout;
+ (IcpFir, bit(8)) ? SelfMedThr32PerDay;
/** ICPFIR[9]
* INT_HW_ERROR_REQQ
*/
- (IcpFir, bit(9)) ? TBDDefaultCallout;
+ (IcpFir, bit(9)) ? SelfMedThr32PerDay;
/** ICPFIR[10]
* SCOM_REG_CHECK
*/
- (IcpFir, bit(10)) ? TBDDefaultCallout;
-
- /** ICPFIR[11]
- * INVALID_FORWARD_SETUP
- */
- (IcpFir, bit(11)) ? TBDDefaultCallout;
-
- /** ICPFIR[12]
- * ADDRESS_CORE_FIELD
- */
- (IcpFir, bit(12)) ? TBDDefaultCallout;
+ (IcpFir, bit(10)) ? SelfMedThr32PerDay;
/** ICPFIR[13]
* ADDRESS_CORE_FIELD_MMIO
@@ -1691,97 +1705,121 @@ group gIcpFir filter singlebit
/** ICPFIR[14]
* UNSOLICITED_CRESP
*/
- (IcpFir, bit(14)) ? TBDDefaultCallout;
+ (IcpFir, bit(14)) ? defaultMaskedError;
/** ICPFIR[15]
* UNSOLICITED_DATA
*/
- (IcpFir, bit(15)) ? TBDDefaultCallout;
+ (IcpFir, bit(15)) ? defaultMaskedError;
/** ICPFIR[16]
* INVALID_CMD
*/
- (IcpFir, bit(16)) ? TBDDefaultCallout;
+ (IcpFir, bit(16)) ? defaultMaskedError;
/** ICPFIR[17]
* INVALID_CRESPZ
*/
- (IcpFir, bit(17)) ? TBDDefaultCallout;
+ (IcpFir, bit(17)) ? defaultMaskedError;
/** ICPFIR[18]
* INVALID_CRESP
*/
- (IcpFir, bit(18)) ? TBDDefaultCallout;
+ (IcpFir, bit(18)) ? defaultMaskedError;
/** ICPFIR[19]
* Reserved field (Access type is reserved)
*/
- (IcpFir, bit(19)) ? TBDDefaultCallout;
+ (IcpFir, bit(19)) ? defaultMaskedError;
/** ICPFIR[20]
* ECC_CE_ON_DATA
*/
- (IcpFir, bit(20)) ? TBDDefaultCallout;
+ (IcpFir, bit(20)) ? SelfMedThr32PerDay;
/** ICPFIR[21]
* ECC_UE_ON_DATA
*/
- (IcpFir, bit(21)) ? TBDDefaultCallout;
+ (IcpFir, bit(21)) ? SelfMedThr32PerDay;
/** ICPFIR[22]
* ECC_SUE_ON_DATA
*/
- (IcpFir, bit(22)) ? TBDDefaultCallout;
+ (IcpFir, bit(22)) ? SelfMedThr32PerDay;
/** ICPFIR[23]
* PARITY_CHK_ADDRESS
*/
- (IcpFir, bit(23)) ? TBDDefaultCallout;
+ (IcpFir, bit(23)) ? SelfMedThr32PerDay;
/** ICPFIR[24]
* PARITY_CHK_TAG
*/
- (IcpFir, bit(24)) ? TBDDefaultCallout;
+ (IcpFir, bit(24)) ? SelfMedThr32PerDay;
/** ICPFIR[25]
* TIMEOUT_LD_STQ
*/
- (IcpFir, bit(25)) ? TBDDefaultCallout;
+ (IcpFir, bit(25)) ? SelfMedThr32PerDay;
/** ICPFIR[26]
* TIMEOUT_RETURNQ
*/
- (IcpFir, bit(26)) ? TBDDefaultCallout;
+ (IcpFir, bit(26)) ? SelfMedThr32PerDay;
/** ICPFIR[27]
* TIMEOUT_FWDQ
*/
- (IcpFir, bit(27)) ? TBDDefaultCallout;
+ (IcpFir, bit(27)) ? SelfMedThr32PerDay;
/** ICPFIR[28]
* TIMEOUT_EOIQ
*/
- (IcpFir, bit(28)) ? TBDDefaultCallout;
+ (IcpFir, bit(28)) ? SelfMedThr32PerDay;
+
+ #TODO RTC 23127 : Check for bits 29 and 30. Unused in scomdef
+ # but defined in RAS spreadsheet.
+
+ /** ICPFIR[29]
+ * RESERVED
+ */
+ (IcpFir, bit(29)) ? TBDDefaultCallout;
+
+ /** ICPFIR[30]
+ * RESERVED
+ */
+ (IcpFir, bit(30)) ? TBDDefaultCallout;
+
+ /** ICPFIR[31]
+ * RESERVED
+ */
+ (IcpFir, bit(31)) ? defaultMaskedError;
/** ICPFIR[32]
* EXT_TRACE_0
*/
- (IcpFir, bit(32)) ? TBDDefaultCallout;
+ (IcpFir, bit(32)) ? SelfMedThr32PerDay;
/** ICPFIR[33]
* EXT_TRACE_1
*/
- (IcpFir, bit(33)) ? TBDDefaultCallout;
+ (IcpFir, bit(33)) ? SelfMedThr32PerDay;
/** ICPFIR[34]
* ADU_RECOV
*/
- (IcpFir, bit(34)) ? TBDDefaultCallout;
+ (IcpFir, bit(34)) ? SelfMedThr32PerDay;
+ # TODO RTC23127 : Not defined in RAS spreadsheet.
/** ICPFIR[35]
* EXT_XSTOP
*/
- (IcpFir, bit(35)) ? TBDDefaultCallout;
+ (IcpFir, bit(35)) ? SelfMedThr32PerDay;
+
+ /** ICPFIR[36:37]
+ * Reserved
+ */
+ (IcpFir, bit(36|37)) ? defaultMaskedError;
};
################################################################################
@@ -1799,468 +1837,128 @@ group gPbaFir filter singlebit
/** PBAFIR[0]
* PBAFIR_OCI_APAR_ERR
*/
- (PbaFir, bit(0)) ? TBDDefaultCallout;
+ (PbaFir, bit(0)) ? SelfHighThr1;
/** PBAFIR[1]
* PBAFIR_PB_RDADRERR_FW
*/
- (PbaFir, bit(1)) ? TBDDefaultCallout;
+ (PbaFir, bit(1)) ? callout2ndLvlMedThr1;
/** PBAFIR[2]
* PBAFIR_PB_RDDATATO_FW
*/
- (PbaFir, bit(2)) ? TBDDefaultCallout;
+ (PbaFir, bit(2)) ? callout2ndLvlMedThr1;
/** PBAFIR[3]
* PBAFIR_PB_SUE_FW
*/
+ #FIXME RTC 23127 Action "Foreign LinkIPP" not clear
(PbaFir, bit(3)) ? TBDDefaultCallout;
/** PBAFIR[4]
* PBAFIR_PB_UE_FW
*/
- (PbaFir, bit(4)) ? TBDDefaultCallout;
+ (PbaFir, bit(4)) ? SelfHighThr1;
/** PBAFIR[5]
* PBAFIR_PB_CE_FW
*/
- (PbaFir, bit(5)) ? TBDDefaultCallout;
+ (PbaFir, bit(5)) ? callout2ndLvlMedThr1;
/** PBAFIR[6]
* PBAFIR_OCI_SLAVE_INIT
*/
- (PbaFir, bit(6)) ? TBDDefaultCallout;
+ (PbaFir, bit(6)) ? callout2ndLvlMedThr1;
/** PBAFIR[7]
* PBAFIR_OCI_WRPAR_ERR
*/
- (PbaFir, bit(7)) ? TBDDefaultCallout;
+ (PbaFir, bit(7)) ? callout2ndLvlMedThr1;
/** PBAFIR[8]
* PBAFIR_OCI_REREQTO
*/
- (PbaFir, bit(8)) ? TBDDefaultCallout;
+ (PbaFir, bit(8)) ? defaultMaskedError;
/** PBAFIR[9]
* PBAFIR_PB_UNEXPCRESP
*/
- (PbaFir, bit(9)) ? TBDDefaultCallout;
+ (PbaFir, bit(9)) ? callout2ndLvlMedThr1;
/** PBAFIR[10]
* PBAFIR_PB_UNEXPDATA
*/
- (PbaFir, bit(10)) ? TBDDefaultCallout;
+ (PbaFir, bit(10)) ? callout2ndLvlMedThr1;
/** PBAFIR[11]
* PBAFIR_PB_PARITY_ERR
*/
- (PbaFir, bit(11)) ? TBDDefaultCallout;
+ (PbaFir, bit(11)) ? callout2ndLvlMedThr1;
/** PBAFIR[12]
* PBAFIR_PB_WRADRERR_FW
*/
- (PbaFir, bit(12)) ? TBDDefaultCallout;
+ (PbaFir, bit(12)) ? callout2ndLvlMedThr1;
/** PBAFIR[13]
* PBAFIR_PB_BADCRESP
*/
- (PbaFir, bit(13)) ? TBDDefaultCallout;
+ (PbaFir, bit(13)) ? callout2ndLvlMedThr1;
/** PBAFIR[14]
* PBAFIR_PB_ACKDEAD_FW
*/
- (PbaFir, bit(14)) ? TBDDefaultCallout;
+ (PbaFir, bit(14)) ? callout2ndLvlMedThr1;
/** PBAFIR[15]
* PBAFIR_PB_CRESPTO
*/
- (PbaFir, bit(15)) ? TBDDefaultCallout;
+ (PbaFir, bit(15)) ? callout2ndLvlMedThr1;
- /** PBAFIR[16]
- * PBAFIR_BCUE_SETUP_ERR
+ /** PBAFIR[16:19]
+ * PBAFIR_BCUE
*/
- (PbaFir, bit(16)) ? TBDDefaultCallout;
+ (PbaFir, bit(16|17|18|19)) ? defaultMaskedError;
- /** PBAFIR[17]
- * PBAFIR_BCUE_PB_ACK_DEAD
+ /** PBAFIR[20:27]
+ * PBAFIR_BCDE
*/
- (PbaFir, bit(17)) ? TBDDefaultCallout;
-
- /** PBAFIR[18]
- * PBAFIR_BCUE_PB_ADRERR
- */
- (PbaFir, bit(18)) ? TBDDefaultCallout;
-
- /** PBAFIR[19]
- * PBAFIR_BCUE_OCI_DATERR
- */
- (PbaFir, bit(19)) ? TBDDefaultCallout;
-
- /** PBAFIR[20]
- * PBAFIR_BCDE_SETUP_ERR
- */
- (PbaFir, bit(20)) ? TBDDefaultCallout;
-
- /** PBAFIR[21]
- * PBAFIR_BCDE_PB_ACK_DEAD
- */
- (PbaFir, bit(21)) ? TBDDefaultCallout;
-
- /** PBAFIR[22]
- * PBAFIR_BCDE_PB_ADRERR
- */
- (PbaFir, bit(22)) ? TBDDefaultCallout;
-
- /** PBAFIR[23]
- * PBAFIR_BCDE_RDDATATO_ERR
- */
- (PbaFir, bit(23)) ? TBDDefaultCallout;
-
- /** PBAFIR[24]
- * PBAFIR_BCDE_SUE_ERR
- */
- (PbaFir, bit(24)) ? TBDDefaultCallout;
-
- /** PBAFIR[25]
- * PBAFIR_BCDE_UE_ERR
- */
- (PbaFir, bit(25)) ? TBDDefaultCallout;
-
- /** PBAFIR[26]
- * PBAFIR_BCDE_CE
- */
- (PbaFir, bit(26)) ? TBDDefaultCallout;
-
- /** PBAFIR[27]
- * PBAFIR_BCDE_OCI_DATERR
- */
- (PbaFir, bit(27)) ? TBDDefaultCallout;
+ (PbaFir, bit(20|21|22|23|24|25|26|27)) ? defaultMaskedError;
/** PBAFIR[28]
* PBAFIR_INTERNAL_ERR
*/
- (PbaFir, bit(28)) ? TBDDefaultCallout;
+ (PbaFir, bit(28)) ? SelfHighThr1;
/** PBAFIR[29]
* PBAFIR_ILLEGAL_CACHE_OP
*/
- (PbaFir, bit(29)) ? TBDDefaultCallout;
+ (PbaFir, bit(29)) ? callout2ndLvlMedThr1;
/** PBAFIR[30]
* PBAFIR_OCI_BAD_REG_ADDR
*/
- (PbaFir, bit(30)) ? TBDDefaultCallout;
-
- /** PBAFIR[31]
- * PBAFIR_AXPUSH_WRERR
- */
- (PbaFir, bit(31)) ? TBDDefaultCallout;
-
- /** PBAFIR[32]
- * PBAFIR_AXRCV_DLO_ERR
- */
- (PbaFir, bit(32)) ? TBDDefaultCallout;
-
- /** PBAFIR[33]
- * PBAFIR_AXRCV_DLO_TO
- */
- (PbaFir, bit(33)) ? TBDDefaultCallout;
+ (PbaFir, bit(30)) ? callout2ndLvlMedThr1;
- /** PBAFIR[34]
- * PBAFIR_AXRCV_RSVDATA_TO
+ /** PBAFIR[31:39]
+ * PBAFIR_AX
*/
- (PbaFir, bit(34)) ? TBDDefaultCallout;
-
- /** PBAFIR[35]
- * PBAFIR_AXFLOW_ERR
- */
- (PbaFir, bit(35)) ? TBDDefaultCallout;
-
- /** PBAFIR[36]
- * PBAFIR_AXSND_DHI_RTYTO
- */
- (PbaFir, bit(36)) ? TBDDefaultCallout;
-
- /** PBAFIR[37]
- * PBAFIR_AXSND_DLO_RTYTO
- */
- (PbaFir, bit(37)) ? TBDDefaultCallout;
-
- /** PBAFIR[38]
- * PBAFIR_AXSND_RSVTO
- */
- (PbaFir, bit(38)) ? TBDDefaultCallout;
-
- /** PBAFIR[39]
- * PBAFIR_AXSND_RSVERR
- */
- (PbaFir, bit(39)) ? TBDDefaultCallout;
+ (PbaFir, bit(31|32|33|34|35|36|37|38|39)) ? defaultMaskedError;
/** PBAFIR[40]
* PBAFIR_PB_ACKDEAD_FW_WR
*/
- (PbaFir, bit(40)) ? TBDDefaultCallout;
-
- /** PBAFIR[44|45]
- * PBAFIR_FIR_PARITY_ERR
- */
- (PbaFir, bit(44|45)) ? TBDDefaultCallout;
-};
-
-################################################################################
-# PB Chiplet EHHCAFIR
-################################################################################
-
-rule EhHcaFir
-{
- CHECK_STOP: EHHCAFIR & ~EHHCAFIR_MASK & ~EHHCAFIR_ACT0 & ~EHHCAFIR_ACT1;
- RECOVERABLE: EHHCAFIR & ~EHHCAFIR_MASK & ~EHHCAFIR_ACT0 & EHHCAFIR_ACT1;
-};
-
-group gEhHcaFir filter singlebit
-{
- /** EHHCAFIR[0]
- * CE1_0_OUT: array0_a CE
- */
- (EhHcaFir, bit(0)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[1]
- * CE2_0_OUT: array0_b CE
- */
- (EhHcaFir, bit(1)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[2
- * UE1_0_OUT: array0_a ue
- */
- (EhHcaFir, bit(2)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[3]
- * UE2_0_OUT: array0_b ue
- */
- (EhHcaFir, bit(3)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[4]
- * CE1_1_OUT: array1_a CE
- */
- (EhHcaFir, bit(4)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[5]
- * CE2_1_OUT: array1_b CE
- */
- (EhHcaFir, bit(5)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[6]
- * UE1_1_OUT: array1_a ue
- */
- (EhHcaFir, bit(6)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[7]
- * UE2_1_OUT: array1_b ue
- */
- (EhHcaFir, bit(7)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[8]
- * CE1_2_OUT: array2_a CE
- */
- (EhHcaFir, bit(8)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[9]
- * CE2_2_OUT: array2_b CE
- */
- (EhHcaFir, bit(9)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[10]
- * UE1_2_OUT: array2_a ue
- */
- (EhHcaFir, bit(10)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[11]
- * UE2_2_OUT: array2_b ue
- */
- (EhHcaFir, bit(11)) ? TBDDefaultCallout;
+ (PbaFir, bit(40)) ? callout2ndLvlMedThr1;
- /** EHHCAFIR[12]
- * CE1_3_OUT: array3_a CE
+ /** PBAFIR[41:43]
+ * RESERVED
*/
- (EhHcaFir, bit(12)) ? TBDDefaultCallout;
+ (PbaFir, bit(41|42|43)) ? defaultMaskedError;
- /** EHHCAFIR[13]
- * CE2_3_OUT: array3_b CE
- */
- (EhHcaFir, bit(13)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[14]
- * UE1_3_OUT: array3_a ue
- */
- (EhHcaFir, bit(14)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[15]
- * UE2_3_OUT: array3_b ue
- */
- (EhHcaFir, bit(15)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[16]
- * CE1_4_OUT: array4_a CE
- */
- (EhHcaFir, bit(16)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[17]
- * CE2_4_OUT: array4_b CE
- */
- (EhHcaFir, bit(17)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[18]
- * UE1_4_OUT: array4_a ue
- */
- (EhHcaFir, bit(18)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[19]
- * UE2_4_OUT: array4_b ue
- */
- (EhHcaFir, bit(19)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[20]
- * CE1_5_OUT: array5_a CE
- */
- (EhHcaFir, bit(20)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[21]
- * CE2_5_OUT: array5_b CE
- */
- (EhHcaFir, bit(21)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[22]
- * UE1_5_OUT: array5_a ue
- */
- (EhHcaFir, bit(22)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[23]
- * UE2_5_OUT: array5_b ue
- */
- (EhHcaFir, bit(23)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[24]
- * CE1_6_OUT: array6_a CE
- */
- (EhHcaFir, bit(24)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[25]
- * CE2_6_OUT: array6_b CE
- */
- (EhHcaFir, bit(25)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[26]
- * UE1_6_OUT: array6_a ue
- */
- (EhHcaFir, bit(26)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[27]
- * UE2_6_OUT: array6_b ue
- */
- (EhHcaFir, bit(27)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[28]
- * CE1_7_OUT: array7_a CE
- */
- (EhHcaFir, bit(28)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[29]
- * CE2_7_OUT: array7_b CE
- */
- (EhHcaFir, bit(29)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[30]
- * UE1_7_OUT: array7_a ue
- */
- (EhHcaFir, bit(30)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[31]
- * UE2_7_OUT: array7_b ue
- */
- (EhHcaFir, bit(31)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[32]
- * DROP_COUNTER_FULL: Drop Counter Full
- */
- (EhHcaFir, bit(32)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[33]
- * INTERNAL_ERROR: Internal Error
- */
- (EhHcaFir, bit(33)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[34]
- * SCOM_ERROR
- */
- (EhHcaFir, bit(34)) ? TBDDefaultCallout;
-
- /** EHHCAFIR[35]
- * FIR_PARITY_ERROR
- */
- (EhHcaFir, bit(35)) ? TBDDefaultCallout;
-};
-
-################################################################################
-# PB Chiplet ENHCAFIR
-################################################################################
-
-rule EnHcaFir
-{
- CHECK_STOP: ENHCAFIR & ~ENHCAFIR_MASK & ~ENHCAFIR_ACT0 & ~ENHCAFIR_ACT1;
- RECOVERABLE: ENHCAFIR & ~ENHCAFIR_MASK & ~ENHCAFIR_ACT0 & ENHCAFIR_ACT1;
-};
-
-group gEnHcaFir filter singlebit
-{
- /** ENHCAFIR[0]
- * DPX0_DAT_UE: PB0 data UE
- */
- (EnHcaFir, bit(0)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[1]
- * DPX0_DAT_SUE: PB0 data UE
- */
- (EnHcaFir, bit(1)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[2]
- * DPX0_DAT_CE: PB0 data ue
- */
- (EnHcaFir, bit(2)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[3]
- *
- */
- (EnHcaFir, bit(3)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[4]
- * CO_DROP_COUNTER_FULL: Castout Drop Counter Full
- */
- (EnHcaFir, bit(4)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[5]
- * DATA_HANG_DETECT: Castout Drop Counter Full
- */
- (EnHcaFir, bit(5)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[6]
- * UNEXPECTED_DATA_OR_CRESP: Castout Drop Counter Full
- */
- (EnHcaFir, bit(6)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[7]
- * INTERNAL_ERROR: Castout Drop Counter Full
- */
- (EnHcaFir, bit(7)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[8]
- * SCOM_ERROR
- */
- (EnHcaFir, bit(8)) ? TBDDefaultCallout;
-
- /** ENHCAFIR[9]
- * FIR_PARITY_ERROR
+ /** PBAFIR[44|45]
+ * PBAFIR_FIR_PARITY_ERR
*/
- (EnHcaFir, bit(9)) ? TBDDefaultCallout;
+ (PbaFir, bit(44|45)) ? defaultMaskedError;
};
################################################################################
@@ -3091,3 +2789,38 @@ actionclass maxSparesExceeded_dmiBus6
actionclass maxSparesExceeded_dmiBus7
{ calloutDmiBus7Th1; funccall("maxSparesExceeded_dmiBus7"); };
+/** Callout 2nd level support of first instance */
+actionclass callout2ndLvlMedThr1
+{
+ callout2ndLvlMed;
+ threshold1;
+};
+
+/** Callout 2nd level support of afer 32 events per day */
+actionclass callout2ndLvlMedThr32perDay
+{
+ callout2ndLvlMed;
+ threshold32pday;
+};
+
+/** callout both ends of PSI Link.Threshold is 32 events per day.
+ */
+actionclass calloutPsiThr32
+{
+ calloutPsiLink;
+ threshold32pday;
+};
+
+/** callout both ends of PSI Link on first instance.*/
+actionclass calloutPsiThr1
+{
+ calloutPsiLink;
+ threshold1;
+};
+
+/** callout both ends of PSI link */
+actionclass calloutPsiLink
+{
+ callout(connected(TYPE_PSI, 0), MRU_MEDA);
+ funccall("calloutPeerBus_psi0");
+};
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule
index 844093fec..d8b0284f4 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule
@@ -43,7 +43,7 @@ group gPcieChipletFir filter singlebit
/** PCIE_CHIPLET_FIR[4|5|6]
* Attention from PCICLOCKFIR (0-2)
*/
- (PcieChipletFir, bit(4|5|6)) ? analyze(gPciClockFir);
+ (PcieChipletFir, bit(4|5|6)) ? defaultMaskedError;
/** PCIE_CHIPLET_FIR[8]
* Attention from PBFFIR
@@ -133,942 +133,6 @@ group gPcieLFir filter singlebit
};
################################################################################
-# PCIE Chiplet PCICLOCKFIRs
-################################################################################
-
-# TODO - All these FIRs should have the same bit definition. Idealy, we will
-# only want to have one copy of the bit definition. Unfortuately, the
-# rule code parser does not have the support for something like this.
-# Maybe we can add this as a later feature.
-
-rule PciClockFir_0
-{
- CHECK_STOP:
- PCICLOCKFIR_0 & ~PCICLOCKFIR_0_MASK & ~PCICLOCKFIR_0_ACT0 & ~PCICLOCKFIR_0_ACT1;
- RECOVERABLE:
- PCICLOCKFIR_0 & ~PCICLOCKFIR_0_MASK & ~PCICLOCKFIR_0_ACT0 & PCICLOCKFIR_0_ACT1;
-};
-
-rule PciClockFir_1
-{
- CHECK_STOP:
- PCICLOCKFIR_1 & ~PCICLOCKFIR_1_MASK & ~PCICLOCKFIR_1_ACT0 & ~PCICLOCKFIR_1_ACT1;
- RECOVERABLE:
- PCICLOCKFIR_1 & ~PCICLOCKFIR_1_MASK & ~PCICLOCKFIR_1_ACT0 & PCICLOCKFIR_1_ACT1;
-};
-
-rule PciClockFir_2
-{
- CHECK_STOP:
- PCICLOCKFIR_2 & ~PCICLOCKFIR_2_MASK & ~PCICLOCKFIR_2_ACT0 & ~PCICLOCKFIR_2_ACT1;
- RECOVERABLE:
- PCICLOCKFIR_2 & ~PCICLOCKFIR_2_MASK & ~PCICLOCKFIR_2_ACT0 & PCICLOCKFIR_2_ACT1;
-};
-
-group gPciClockFir filter singlebit
-{
- /** PCICLOCKFIR_0[0]
- * AIB_COMMAND_INVALID
- */
- (PciClockFir_0, bit(0)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[0]
- * AIB_COMMAND_INVALID
- */
- (PciClockFir_1, bit(0)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[0]
- * AIB_COMMAND_INVALID
- */
- (PciClockFir_2, bit(0)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[1]
- * AIB_ADDRESSING_ERROR
- */
- (PciClockFir_0, bit(1)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[1]
- * AIB_ADDRESSING_ERROR
- */
- (PciClockFir_1, bit(1)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[1]
- * AIB_ADDRESSING_ERROR
- */
- (PciClockFir_2, bit(1)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[2]
- * AIB_SIZE_ALIGNMENT_ERROR
- */
- (PciClockFir_0, bit(2)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[2]
- * AIB_SIZE_ALIGNMENT_ERROR
- */
- (PciClockFir_1, bit(2)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[2]
- * AIB_SIZE_ALIGNMENT_ERROR
- */
- (PciClockFir_2, bit(2)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[3]
- * Reserved field (Access type is Reserved00)
- */
- (PciClockFir_0, bit(3)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[3]
- * Reserved field (Access type is Reserved00)
- */
- (PciClockFir_1, bit(3)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[3]
- * Reserved field (Access type is Reserved00)
- */
- (PciClockFir_2, bit(3)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[4]
- * AIB_CMD_CTRLS_PARITY_ERROR
- */
- (PciClockFir_0, bit(4)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[4]
- * AIB_CMD_CTRLS_PARITY_ERROR
- */
- (PciClockFir_1, bit(4)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[4]
- * AIB_CMD_CTRLS_PARITY_ERROR
- */
- (PciClockFir_2, bit(4)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[5]
- * AIB_DATA_CTRLS_PARITY_ERROR
- */
- (PciClockFir_0, bit(5)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[5]
- * AIB_DATA_CTRLS_PARITY_ERROR
- */
- (PciClockFir_1, bit(5)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[5]
- * AIB_DATA_CTRLS_PARITY_ERROR
- */
- (PciClockFir_2, bit(5)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[6]
- * MMIO_BAR_DOMAIN_TABLE_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(6)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[6]
- * MMIO_BAR_DOMAIN_TABLE_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(6)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[6]
- * MMIO_BAR_DOMAIN_TABLE_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(6)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[7]
- * MMIO_BAR_DOMAIN_TABLE_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(7)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[7]
- * MMIO_BAR_DOMAIN_TABLE_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(7)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[7]
- * MMIO_BAR_DOMAIN_TABLE_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(7)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[8]
- * AIB_BUS_PARITY_ERROR
- */
- (PciClockFir_0, bit(8)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[8]
- * AIB_BUS_PARITY_ERROR
- */
- (PciClockFir_1, bit(8)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[8]
- * AIB_BUS_PARITY_ERROR
- */
- (PciClockFir_2, bit(8)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[9]
- * Reserved field (Access type is Reserved01)
- */
- (PciClockFir_0, bit(9)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[9]
- * Reserved field (Access type is Reserved01)
- */
- (PciClockFir_1, bit(9)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[9]
- * Reserved field (Access type is Reserved01)
- */
- (PciClockFir_2, bit(9)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[10]
- * AIB_DATA_CTRLS_SEQUENCE_ERROR
- */
- (PciClockFir_0, bit(10)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[10]
- * AIB_DATA_CTRLS_SEQUENCE_ERROR
- */
- (PciClockFir_1, bit(10)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[10]
- * AIB_DATA_CTRLS_SEQUENCE_ERROR
- */
- (PciClockFir_2, bit(10)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[11]
- * MMIO_CMD_DATA_PARITY_ERROR
- */
- (PciClockFir_0, bit(11)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[11]
- * MMIO_CMD_DATA_PARITY_ERROR
- */
- (PciClockFir_1, bit(11)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[11]
- * MMIO_CMD_DATA_PARITY_ERROR
- */
- (PciClockFir_2, bit(11)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[12]
- * PCI_E_CFG_IO_WRITE_CA_OR_UR_RESPONSE
- */
- (PciClockFir_0, bit(12)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[12]
- * PCI_E_CFG_IO_WRITE_CA_OR_UR_RESPONSE
- */
- (PciClockFir_1, bit(12)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[12]
- * PCI_E_CFG_IO_WRITE_CA_OR_UR_RESPONSE
- */
- (PciClockFir_2, bit(12)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[13]
- * GBIF_TIMEOUT
- */
- (PciClockFir_0, bit(13)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[13]
- * GBIF_TIMEOUT
- */
- (PciClockFir_1, bit(13)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[13]
- * GBIF_TIMEOUT
- */
- (PciClockFir_2, bit(13)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[14]
- * MMIO_PENDING_ERROR
- */
- (PciClockFir_0, bit(14)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[14]
- * MMIO_PENDING_ERROR
- */
- (PciClockFir_1, bit(14)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[14]
- * MMIO_PENDING_ERROR
- */
- (PciClockFir_2, bit(14)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[15]
- * AIB_RX_DATA_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(15)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[15]
- * AIB_RX_DATA_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(15)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[15]
- * AIB_RX_DATA_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(15)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[16]
- * AIB_RX_DATA_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(16)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[16]
- * AIB_RX_DATA_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(16)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[16]
- * AIB_RX_DATA_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(16)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[17]
- * DCT_TABLE_ERROR
- */
- (PciClockFir_0, bit(17)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[17]
- * DCT_TABLE_ERROR
- */
- (PciClockFir_1, bit(17)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[17]
- * DCT_TABLE_ERROR
- */
- (PciClockFir_2, bit(17)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[18]
- * DMA_RESPONSE_DATA_ERROR
- */
- (PciClockFir_0, bit(18)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[18]
- * DMA_RESPONSE_DATA_ERROR
- */
- (PciClockFir_1, bit(18)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[18]
- * DMA_RESPONSE_DATA_ERROR
- */
- (PciClockFir_2, bit(18)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[19]
- * DMA_RESPONSE_TIMEOUT
- */
- (PciClockFir_0, bit(19)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[19]
- * DMA_RESPONSE_TIMEOUT
- */
- (PciClockFir_1, bit(19)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[19]
- * DMA_RESPONSE_TIMEOUT
- */
- (PciClockFir_2, bit(19)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[20]
- * TCE_RD_RESPONSE_ERROR_INDICATION
- */
- (PciClockFir_0, bit(20)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[20]
- * TCE_RD_RESPONSE_ERROR_INDICATION
- */
- (PciClockFir_1, bit(20)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[20]
- * TCE_RD_RESPONSE_ERROR_INDICATION
- */
- (PciClockFir_2, bit(20)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[21]
- * CFG_RETRY_TIMEOUT_ERROR
- */
- (PciClockFir_0, bit(21)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[21]
- * CFG_RETRY_TIMEOUT_ERROR
- */
- (PciClockFir_1, bit(21)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[21]
- * CFG_RETRY_TIMEOUT_ERROR
- */
- (PciClockFir_2, bit(21)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[22]
- * CFG_ACCESS_ERROR
- */
- (PciClockFir_0, bit(22)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[22]
- * CFG_ACCESS_ERROR
- */
- (PciClockFir_1, bit(22)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[22]
- * CFG_ACCESS_ERROR
- */
- (PciClockFir_2, bit(22)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[24]
- * RGA_MACRO_INTERNAL_ERROR
- */
- (PciClockFir_0, bit(24)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[24]
- * RGA_MACRO_INTERNAL_ERROR
- */
- (PciClockFir_1, bit(24)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[24]
- * RGA_MACRO_INTERNAL_ERROR
- */
- (PciClockFir_2, bit(24)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[25]
- * PHB3_REGISTER_PARITY_ERROR_RSM_ONE_HOT_ERROR
- */
- (PciClockFir_0, bit(25)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[25]
- * PHB3_REGISTER_PARITY_ERROR_RSM_ONE_HOT_ERROR
- */
- (PciClockFir_1, bit(25)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[25]
- * PHB3_REGISTER_PARITY_ERROR_RSM_ONE_HOT_ERROR
- */
- (PciClockFir_2, bit(25)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[26]
- * PHB3_REGISTER_ACCESS_ERROR
- */
- (PciClockFir_0, bit(26)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[26]
- * PHB3_REGISTER_ACCESS_ERROR
- */
- (PciClockFir_1, bit(26)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[26]
- * PHB3_REGISTER_ACCESS_ERROR
- */
- (PciClockFir_2, bit(26)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[27]
- * PAPR_OUTBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_0, bit(27)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[27]
- * PAPR_OUTBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_1, bit(27)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[27]
- * PAPR_OUTBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_2, bit(27)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[28]
- * PCI_E_CORE_FATAL_ERROR
- */
- (PciClockFir_0, bit(28)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[28]
- * PCI_E_CORE_FATAL_ERROR
- */
- (PciClockFir_1, bit(28)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[28]
- * PCI_E_CORE_FATAL_ERROR
- */
- (PciClockFir_2, bit(28)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[29]
- * PCI_E_INBOUND_TLP_ECRC_ERROR
- */
- (PciClockFir_0, bit(29)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[29]
- * PCI_E_INBOUND_TLP_ECRC_ERROR
- */
- (PciClockFir_1, bit(29)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[29]
- * PCI_E_INBOUND_TLP_ECRC_ERROR
- */
- (PciClockFir_2, bit(29)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[30]
- * PCI_E_UTL_PRIMARY_INTERRUPT
- */
- (PciClockFir_0, bit(30)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[30]
- * PCI_E_UTL_PRIMARY_INTERRUPT
- */
- (PciClockFir_1, bit(30)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[30]
- * PCI_E_UTL_PRIMARY_INTERRUPT
- */
- (PciClockFir_2, bit(30)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[31]
- * PCI_E_UTL_SECONDARY_INTERRUPT
- */
- (PciClockFir_0, bit(31)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[31]
- * PCI_E_UTL_SECONDARY_INTERRUPT
- */
- (PciClockFir_1, bit(31)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[31]
- * PCI_E_UTL_SECONDARY_INTERRUPT
- */
- (PciClockFir_2, bit(31)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[32]
- * IODA_FATAL_ERROR
- */
- (PciClockFir_0, bit(32)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[32]
- * IODA_FATAL_ERROR
- */
- (PciClockFir_1, bit(32)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[32]
- * IODA_FATAL_ERROR
- */
- (PciClockFir_2, bit(32)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[33]
- * IODA_MSI_PE_MISMATCH_ERROR
- */
- (PciClockFir_0, bit(33)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[33]
- * IODA_MSI_PE_MISMATCH_ERROR
- */
- (PciClockFir_1, bit(33)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[33]
- * IODA_MSI_PE_MISMATCH_ERROR
- */
- (PciClockFir_2, bit(33)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[34]
- * IODA_IVT_ERROR
- */
- (PciClockFir_0, bit(34)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[34]
- * IODA_IVT_ERROR
- */
- (PciClockFir_1, bit(34)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[34]
- * IODA_IVT_ERROR
- */
- (PciClockFir_2, bit(34)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[35]
- * IODA_TVT_ERROR
- */
- (PciClockFir_0, bit(35)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[35]
- * IODA_TVT_ERROR
- */
- (PciClockFir_1, bit(35)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[35]
- * IODA_TVT_ERROR
- */
- (PciClockFir_2, bit(35)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[36]
- * IODA_TVT_ADDRESS_RANGE_ERROR
- */
- (PciClockFir_0, bit(36)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[36]
- * IODA_TVT_ADDRESS_RANGE_ERROR
- */
- (PciClockFir_1, bit(36)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[36]
- * IODA_TVT_ADDRESS_RANGE_ERROR
- */
- (PciClockFir_2, bit(36)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[37]
- * IODA_PAGE_ACCESS_ERROR
- */
- (PciClockFir_0, bit(37)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[37]
- * IODA_PAGE_ACCESS_ERROR
- */
- (PciClockFir_1, bit(37)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[37]
- * IODA_PAGE_ACCESS_ERROR
- */
- (PciClockFir_2, bit(37)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[38]
- * CFG_PAPR_INJECTION_TRIGGERED
- */
- (PciClockFir_0, bit(38)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[38]
- * CFG_PAPR_INJECTION_TRIGGERED
- */
- (PciClockFir_1, bit(38)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[38]
- * CFG_PAPR_INJECTION_TRIGGERED
- */
- (PciClockFir_2, bit(38)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[39]
- * PAPR_INBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_0, bit(39)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[39]
- * PAPR_INBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_1, bit(39)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[39]
- * PAPR_INBOUND_INJECTION_ERROR_TRIGGERED
- */
- (PciClockFir_2, bit(39)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[40]
- * INBOUND_FATAL_ERROR
- */
- (PciClockFir_0, bit(40)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[40]
- * INBOUND_FATAL_ERROR
- */
- (PciClockFir_1, bit(40)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[40]
- * INBOUND_FATAL_ERROR
- */
- (PciClockFir_2, bit(40)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[41]
- * MSI_ADDRESS_ALIGNMENT_ERROR
- */
- (PciClockFir_0, bit(41)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[41]
- * MSI_ADDRESS_ALIGNMENT_ERROR
- */
- (PciClockFir_1, bit(41)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[41]
- * MSI_ADDRESS_ALIGNMENT_ERROR
- */
- (PciClockFir_2, bit(41)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[42]
- * INTERNAL_BAR_DISABLED_ERROR
- */
- (PciClockFir_0, bit(42)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[42]
- * INTERNAL_BAR_DISABLED_ERROR
- */
- (PciClockFir_1, bit(42)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[42]
- * INTERNAL_BAR_DISABLED_ERROR
- */
- (PciClockFir_2, bit(42)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[43]
- * GBIF_INBOUND_COMPLETION_DONE_ERROR
- */
- (PciClockFir_0, bit(43)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[43]
- * GBIF_INBOUND_COMPLETION_DONE_ERROR
- */
- (PciClockFir_1, bit(43)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[43]
- * GBIF_INBOUND_COMPLETION_DONE_ERROR
- */
- (PciClockFir_2, bit(43)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[44]
- * PCT_TIMEOUT_ERROR
- */
- (PciClockFir_0, bit(44)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[44]
- * PCT_TIMEOUT_ERROR
- */
- (PciClockFir_1, bit(44)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[44]
- * PCT_TIMEOUT_ERROR
- */
- (PciClockFir_2, bit(44)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[45]
- * TCE_REQUEST_TIMEOUT_ERROR
- */
- (PciClockFir_0, bit(45)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[45]
- * TCE_REQUEST_TIMEOUT_ERROR
- */
- (PciClockFir_1, bit(45)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[45]
- * TCE_REQUEST_TIMEOUT_ERROR
- */
- (PciClockFir_2, bit(45)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[47]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_0, bit(47)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[47]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_1, bit(47)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[47]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_2, bit(47)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[48]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_0, bit(48)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[48]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_1, bit(48)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[48]
- * AIB_TX_TIMEOUT_ERROR
- */
- (PciClockFir_2, bit(48)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[49]
- * TCE_REQUEST_UNEXPECTED_RESPONSE_ERROR
- */
- (PciClockFir_0, bit(49)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[49]
- * TCE_REQUEST_UNEXPECTED_RESPONSE_ERROR
- */
- (PciClockFir_1, bit(49)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[49]
- * TCE_REQUEST_UNEXPECTED_RESPONSE_ERROR
- */
- (PciClockFir_2, bit(49)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[50]
- * INBOUND_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(50)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[50]
- * INBOUND_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(50)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[50]
- * INBOUND_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(50)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[51]
- * INBOUND_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(51)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[51]
- * INBOUND_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(51)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[51]
- * INBOUND_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(51)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[52]
- * DMA_WRITE_MSI_INTERRUPT_DATA_POISONED_ERROR
- */
- (PciClockFir_0, bit(52)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[52]
- * DMA_WRITE_MSI_INTERRUPT_DATA_POISONED_ERROR
- */
- (PciClockFir_1, bit(52)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[52]
- * DMA_WRITE_MSI_INTERRUPT_DATA_POISONED_ERROR
- */
- (PciClockFir_2, bit(52)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[55]
- * DL_RX_MALFORMED
- */
- (PciClockFir_0, bit(55)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[55]
- * DL_RX_MALFORMED
- */
- (PciClockFir_1, bit(55)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[55]
- * DL_RX_MALFORMED
- */
- (PciClockFir_2, bit(55)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[56]
- * REPLAY_BUFFER_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(56)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[56]
- * REPLAY_BUFFER_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(56)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[56]
- * REPLAY_BUFFER_ECC_CORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(56)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[57]
- * REPLAY_BUFFER_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_0, bit(57)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[57]
- * REPLAY_BUFFER_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_1, bit(57)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[57]
- * REPLAY_BUFFER_ECC_UNCORRECTABLE_ERROR
- */
- (PciClockFir_2, bit(57)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[58]
- * AIB_DAT_ERR_INDICATION
- */
- (PciClockFir_0, bit(58)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[58]
- * AIB_DAT_ERR_INDICATION
- */
- (PciClockFir_1, bit(58)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[58]
- * AIB_DAT_ERR_INDICATION
- */
- (PciClockFir_2, bit(58)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[59]
- * AIB_CREDITS_ERROR
- */
- (PciClockFir_0, bit(59)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[59]
- * AIB_CREDITS_ERROR
- */
- (PciClockFir_1, bit(59)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[59]
- * AIB_CREDITS_ERROR
- */
- (PciClockFir_2, bit(59)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[60]
- * CFG_EC08_FATAL_ERROR
- */
- (PciClockFir_0, bit(60)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[60]
- * CFG_EC08_FATAL_ERROR
- */
- (PciClockFir_1, bit(60)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[60]
- * CFG_EC08_FATAL_ERROR
- */
- (PciClockFir_2, bit(60)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[61]
- * CFG_EC08_NONFATAL_ERROR
- */
- (PciClockFir_0, bit(61)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[61]
- * CFG_EC08_NONFATAL_ERROR
- */
- (PciClockFir_1, bit(61)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[61]
- * CFG_EC08_NONFATAL_ERROR
- */
- (PciClockFir_2, bit(61)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[62]
- * CFG_EC08_CORR_ERROR
- */
- (PciClockFir_0, bit(62)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[62]
- * CFG_EC08_CORR_ERROR
- */
- (PciClockFir_1, bit(62)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[62]
- * CFG_EC08_CORR_ERROR
- */
- (PciClockFir_2, bit(62)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_0[63]
- * LEM_FIR_INTERNAL_PARITY_ERROR
- */
- (PciClockFir_0, bit(63)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_1[63]
- * LEM_FIR_INTERNAL_PARITY_ERROR
- */
- (PciClockFir_1, bit(63)) ? TBDDefaultCallout;
-
- /** PCICLOCKFIR_2[63]
- * LEM_FIR_INTERNAL_PARITY_ERROR
- */
- (PciClockFir_2, bit(63)) ? TBDDefaultCallout;
-};
-
-################################################################################
# PCIE Chiplet PBFFIR
################################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
index 130676bad..f222abb8e 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
@@ -179,52 +179,92 @@ group gTpLFir filter singlebit
/** TP_LFIR[0]
* CFIR internal parity error
*/
- (TpLFir, bit(0)) ? TBDDefaultCallout;
+ (TpLFir, bit(0)) ? SelfHighThr32PerDay;
/** TP_LFIR[1]
* Local errors from GPIO (PCB error)
*/
- (TpLFir, bit(1)) ? TBDDefaultCallout;
+ (TpLFir, bit(1)) ? defaultMaskedError;
/** TP_LFIR[2]
* Local errors from CC (PCB error)
*/
- (TpLFir, bit(2)) ? TBDDefaultCallout;
+ (TpLFir, bit(2)) ? defaultMaskedError;
/** TP_LFIR[3]
* Local errors from CC (OPCG, parity, scan collision, ...)
*/
- (TpLFir, bit(3)) ? TBDDefaultCallout;
+ (TpLFir, bit(3)) ? SelfHighThr32PerDay;
/** TP_LFIR[4]
* Local errors from PSC (PCB error)
*/
- (TpLFir, bit(4)) ? TBDDefaultCallout;
+ (TpLFir, bit(4)) ? defaultMaskedError;
/** TP_LFIR[5]
* Local errors from PSC (parity error)
*/
- (TpLFir, bit(5)) ? TBDDefaultCallout;
+ (TpLFir, bit(5)) ? defaultMaskedError;
/** TP_LFIR[6]
* Local errors from Thermal (parity error)
*/
- (TpLFir, bit(6)) ? TBDDefaultCallout;
+ (TpLFir, bit(6)) ? defaultMaskedError;
/** TP_LFIR[7]
* Local errors from Thermal (PCB error)
*/
- (TpLFir, bit(7)) ? TBDDefaultCallout;
+ (TpLFir, bit(7)) ? defaultMaskedError;
/** TP_LFIR[8|9]
* Local errors from Thermal (Trip error)
*/
- (TpLFir, bit(8|9)) ? TBDDefaultCallout;
+ (TpLFir, bit(8|9)) ? defaultMaskedError;
- /** TP_LFIR[10|11]
+ /** TP_LFIR[10]
* Local errors from Trace Array ( error)
*/
- (TpLFir, bit(10|11)) ? TBDDefaultCallout;
+ #FIXME RTC 23127 bit action suggests threshold 32per day but commnet on bit
+ # 10 suggests threshold of 1
+ (TpLFir, bit(10)) ? SelfHighThr32PerDay;
+
+ /** TP_LFIR[11]
+ * Local errors from Trace Array ( error)
+ */
+ (TpLFir, bit(11)) ? SelfHighThr32PerDay;
+
+ /** TP_LFIR[12|13]
+ * Local errors from I2CM
+ */
+ (TpLFir, bit(12|13)) ? defaultMaskedError;
+
+ /** TP_LFIR[14]
+ * Local errors from PCB
+ */
+ #FIXME RTC 23127 Comments not clear
+ (TpLFir, bit(14)) ? SelfHighThr32PerDay;
+
+ /** TP_LFIR[15]
+ * Local errors from Trace Array ( error)
+ */
+ (TpLFir, bit(15)) ? defaultMaskedError;
+
+ /** TP_LFIR[16]
+ * Local errors from TOD ( error) Error in backup topology
+ */
+ (TpLFir, bit(16)) ? defaultMaskedError;
+
+ #FIXME RTC 23127 "First Instance" need clarification
+ /** TP_LFIR[17]
+ * Local errors from TOD ( error)
+ */
+ (TpLFir, bit(17)) ? defaultMaskedError;
+
+ /** TP_LFIR[18]
+ * Local errors from TOD ( error)
+ */
+ #FIXME RTC 23127 Shall be handled in TOD Activity
+ (TpLFir, bit(18)) ? TBDDefaultCallout;
/** TP_LFIR[19]
* Processor PLL error
@@ -234,6 +274,76 @@ group gTpLFir filter singlebit
*/
(TpLFir, bit(19)) ? threshold32pday;
+ /** TP_LFIR[20]
+ * Sbe indicated error_event0to4 enabled by mask bit 5 to 9
+ */
+ (TpLFir, bit(20)) ? defaultMaskedError;
+
+ /** TP_LFIR[21]
+ * Sbe indicated error_event0to4 enabled by mask bit 10 to 14
+ */
+ (TpLFir, bit(21)) ? defaultMaskedError;
+
+ /** TP_LFIR[22|23]
+ * local errors from I2CS
+ */
+ (TpLFir, bit(22|23)) ? defaultMaskedError;
+
+ /** TP_LFIR[24]
+ * Local errors from OTP
+ */
+ (TpLFir, bit(24)) ? defaultMaskedError;
+
+ /** TP_LFIR[25]
+ * local error from Ext trigger
+ */
+ (TpLFir, bit(25)) ? defaultMaskedError;
+
+ /** TP_LFIR[26]
+ * Fast xstop fir error
+ */
+ (TpLFir, bit(26)) ? defaultMaskedError;
+
+ /** TP_LFIR[27]
+ * PCB mcast grp error
+ */
+ (TpLFir, bit(27)) ? SelfHighThr1;
+
+ /** TP_LFIR[28]
+ * PCB Parity error
+ */
+ (TpLFir, bit(28)) ? defaultMaskedError;
+
+ /** TP_LFIR[29|30]
+ * EECB lpc fir error
+ */
+ (TpLFir, bit(29|30)) ? defaultMaskedError;
+
+ /** TP_LFIR[31|32]
+ * EECB i2c fir error
+ */
+ (TpLFir, bit(31|32)) ? defaultMaskedError;
+
+ /** TP_LFIR[33|34]
+ * Local errors from PIBMEM
+ */
+ (TpLFir, bit(33|34)) ? defaultMaskedError;
+
+ /** TP_LFIR[35]
+ * OTP correctable error
+ */
+ (TpLFir, bit(35)) ? threshold32pday;
+
+ /** TP_LFIR[36|37|38|39]
+ * Unused error
+ */
+ (TpLFir, bit(36|37|38|39)) ? defaultMaskedError;
+
+ /** TP_LFIR[40]
+ * Malfunction alert
+ */
+ (TpLFir, bit(40)) ? defaultMaskedError;
+
};
################################################################################
@@ -247,216 +357,219 @@ rule OccFir
SPECIAL: OCCFIR & ~OCCFIR_MASK & OCCFIR_ACT0 & ~OCCFIR_ACT1;
};
+#based on spreadsheet p8dd1_mss_FFDC_51.xls
group gOccFir filter singlebit
{
/** OCCFIR[0]
* OCC_SCOM_OCCFIR_OCC_FW0
*/
- (OccFir, bit(0)) ? TBDDefaultCallout;
+ (OccFir, bit(0)) ? defaultMaskedError;
/** OCCFIR[1]
* OCC_SCOM_OCCFIR_OCC_FW1
*/
- (OccFir, bit(1)) ? TBDDefaultCallout;
+ (OccFir, bit(1)) ? defaultMaskedError;
/** OCCFIR[2]
* OCC_SCOM_OCCFIR_OCC_FW2
*/
- (OccFir, bit(2)) ? TBDDefaultCallout;
+ (OccFir, bit(2)) ? defaultMaskedError;
/** OCCFIR[3]
* OCC_SCOM_OCCFIR_OCC_FW3
*/
- (OccFir, bit(3)) ? TBDDefaultCallout;
+ (OccFir, bit(3)) ? defaultMaskedError;
/** OCCFIR[4]
* OCC_SCOM_OCCFIR_PMC_PORE_SW_MALF
*/
+ #RTC 23127 ? found in RAS spread sheet.Action need to be updated.
(OccFir, bit(4)) ? TBDDefaultCallout;
/** OCCFIR[5]
* OCC_SCOM_OCCFIR_PMC_OCC_HB_MALF
*/
- (OccFir, bit(5)) ? TBDDefaultCallout;
+ (OccFir, bit(5)) ? defaultMaskedError;
/** OCCFIR[6]
* OCC_SCOM_OCCFIR_PORE_GPE0_FATAL_ERR
*/
- (OccFir, bit(6)) ? TBDDefaultCallout;
+ (OccFir, bit(6)) ? defaultMaskedError;
/** OCCFIR[7]
* OCC_SCOM_OCCFIR_PORE_GPE1_FATAL_ERR
*/
- (OccFir, bit(7)) ? TBDDefaultCallout;
+ (OccFir, bit(7)) ? defaultMaskedError;
/** OCCFIR[8]
* OCC_SCOM_OCCFIR_OCB_ERROR
*/
- (OccFir, bit(8)) ? TBDDefaultCallout;
+ (OccFir, bit(8)) ? defaultMaskedError;
/** OCCFIR[9]
* OCC_SCOM_OCCFIR_SRT_UE
*/
- (OccFir, bit(9)) ? TBDDefaultCallout;
+ (OccFir, bit(9)) ? calloutConnectedOccThr1;
/** OCCFIR[10]
* OCC_SCOM_OCCFIR_SRT_CE
*/
- (OccFir, bit(10)) ? TBDDefaultCallout;
+ (OccFir, bit(10)) ? defaultMaskedError;
/** OCCFIR[11]
* OCC_SCOM_OCCFIR_SRT_READ_ERROR
*/
- (OccFir, bit(11)) ? TBDDefaultCallout;
+ (OccFir, bit(11)) ? calloutConnectedOccThr1;
/** OCCFIR[12]
* OCC_SCOM_OCCFIR_SRT_WRITE_ERROR
*/
- (OccFir, bit(12)) ? TBDDefaultCallout;
+ (OccFir, bit(12)) ? calloutConnectedOccThr1;
/** OCCFIR[13]
* OCC_SCOM_OCCFIR_SRT_DATAOUT_PERR
*/
- (OccFir, bit(13)) ? TBDDefaultCallout;
+ (OccFir, bit(13)) ? calloutConnectedOccThr1;
/** OCCFIR[14]
* OCC_SCOM_OCCFIR_SRT_OCI_WRITE_DATA_PARITY
*/
- (OccFir, bit(14)) ? TBDDefaultCallout;
+ (OccFir, bit(14)) ? calloutConnectedOccThr1;
/** OCCFIR[15]
* OCC_SCOM_OCCFIR_SRT_OCI_BE_PARITY_ER
*/
- (OccFir, bit(15)) ? TBDDefaultCallout;
+ (OccFir, bit(15)) ? calloutConnectedOccThr1;
/** OCCFIR[16]
* OCC_SCOM_OCCFIR_SRT_OCI_ADDR_PARITY_ERR
*/
- (OccFir, bit(16)) ? TBDDefaultCallout;
+ (OccFir, bit(16)) ? calloutConnectedOccThr1;
/** OCCFIR[17]
* OCC_SCOM_OCCFIR_PORE_SW_ERROR_ERR
*/
- (OccFir, bit(17)) ? TBDDefaultCallout;
+ (OccFir, bit(17)) ? defaultMaskedError;
/** OCCFIR[18]
*OCC_SCOM_OCCFIR_PORE_GPE0_ERROR_ERR
*/
- (OccFir, bit(18)) ? TBDDefaultCallout;
+ (OccFir, bit(18)) ? defaultMaskedError;
/** OCCFIR[19]
* OCC_SCOM_OCCFIR_PORE_GPE1_ERROR_ERR
*/
- (OccFir, bit(19)) ? TBDDefaultCallout;
+ (OccFir, bit(19)) ? defaultMaskedError;
/** OCCFIR[20]
* OCC_SCOM_OCCFIR_EXTERNAL_TRAP
*/
- (OccFir, bit(20)) ? TBDDefaultCallout;
+ (OccFir, bit(20)) ? defaultMaskedError;
/** OCCFIR[21]
* OCC_SCOM_OCCFIR_PPC405_CORE_RESET
*/
- (OccFir, bit(21)) ? TBDDefaultCallout;
+ (OccFir, bit(21)) ? defaultMaskedError;
/** OCCFIR[22]
* OCC_SCOM_OCCFIR_PPC405_CHIP_RESET
*/
- (OccFir, bit(22)) ? TBDDefaultCallout;
+ (OccFir, bit(22)) ? defaultMaskedError;
/** OCCFIR[23]
* OCC_SCOM_OCCFIR_PPC405_SYSTEM_RESET
*/
- (OccFir, bit(23)) ? TBDDefaultCallout;
+ (OccFir, bit(23)) ? defaultMaskedError;
/** OCCFIR[24]
*OCC_SCOM_OCCFIR_PPC405_DBGMSRWE
*/
- (OccFir, bit(24)) ? TBDDefaultCallout;
+ (OccFir, bit(24)) ? defaultMaskedError;
/** OCCFIR[25]
* OCC_SCOM_OCCFIR_PPC405_DBGSTOPACK
*/
- (OccFir, bit(25)) ? TBDDefaultCallout;
+ (OccFir, bit(25)) ? defaultMaskedError;
/** OCCFIR[26]
* OCC_SCOM_OCCFIR_OCB_DB_OCI_TIMEOUT
*/
- (OccFir, bit(26)) ? TBDDefaultCallout;
+ (OccFir, bit(26)) ? calloutConnectedOccThr1;
/** OCCFIR[27]
* OCC_SCOM_OCCFIR_OCB_DB_OCI_READ_DATA_PARITY
*/
- (OccFir, bit(27)) ? TBDDefaultCallout;
+ (OccFir, bit(27)) ? calloutConnectedOccThr1;
/** OCCFIR[28]
* OCC_SCOM_OCCFIR_OCB_DB_OCI_SLAVE_ERROR
*/
- (OccFir, bit(28)) ? TBDDefaultCallout;
+ (OccFir, bit(28)) ? calloutConnectedOccThr1;
/** OCCFIR[29]
* OCC_SCOM_OCCFIR_OCB_PIB_ADDR_PARITY_ERR
*/
- (OccFir, bit(29)) ? TBDDefaultCallout;
+ (OccFir, bit(29)) ? calloutConnectedOccThr1;
/** OCCFIR[30]
* OCC_SCOM_OCCFIR_OCB_DB_PIB_DATA_PARITY_ERR
*/
- (OccFir, bit(30)) ? TBDDefaultCallout;
+ (OccFir, bit(30)) ? calloutConnectedOccThr1;
/** OCCFIR[31]
* OCC_SCOM_OCCFIR_OCB_IDC0_ERROR
*/
- (OccFir, bit(31)) ? TBDDefaultCallout;
+ (OccFir, bit(31)) ? calloutConnectedOccThr1;
/** OCCFIR[32]
* OCC_SCOM_OCCFIR_OCB_IDC1_ERROR
*/
- (OccFir, bit(32)) ? TBDDefaultCallout;
+ (OccFir, bit(32)) ? calloutConnectedOccThr1;
/** OCCFIR[33]
* OCC_SCOM_OCCFIR_OCB_IDC2_ERROR
*/
- (OccFir, bit(33)) ? TBDDefaultCallout;
+ (OccFir, bit(33)) ? calloutConnectedOccThr1;
/** OCCFIR[34]
* OCC_SCOM_OCCFIR_OCB_IDC3_ERROR
*/
- (OccFir, bit(34)) ? TBDDefaultCallout;
+ (OccFir, bit(34)) ? calloutConnectedOccThr1;
/** OCCFIR[35]
* OCC_SCOM_OCCFIR_SRT_FSM_ERR
*/
- (OccFir, bit(35)) ? TBDDefaultCallout;
+ (OccFir, bit(35)) ? calloutConnectedOccThr1;
/** OCCFIR[36]
* OCC_SCOM_OCCFIR_JTAGACC_ERR
*/
- (OccFir, bit(36)) ? TBDDefaultCallout;
+ (OccFir, bit(36)) ? defaultMaskedError;
/** OCCFIR[37]
* OCC_SCOM_OCCFIR_OCB_DW_ERR
*/
- (OccFir, bit(37)) ? TBDDefaultCallout;
+ (OccFir, bit(37)) ? defaultMaskedError;
/** OCCFIR[38]
* OCC_SCOM_OCCFIR_C405_ECC_UE
*/
- (OccFir, bit(38)) ? TBDDefaultCallout;
+ (OccFir, bit(38)) ? calloutConnectedOccThr1;
/** OCCFIR[39]
* OCC_SCOM_OCCFIR_C405_ECC_CE
*/
- (OccFir, bit(39)) ? TBDDefaultCallout;
+ (OccFir, bit(39)) ? defaultMaskedError;
/** OCCFIR[40]
* OCC_SCOM_OCCFIR_C405_OCI_MACHINECHECK
*/
- (OccFir, bit(40)) ? TBDDefaultCallout;
+ (OccFir, bit(40)) ? defaultMaskedError;
/** OCCFIR[41]
* OCC_SCOM_OCCFIR_SRAM_SPARE_DIRECT_ERROR0
*/
+ #FIXME RTC 23127 action for bit 41,42,43,44 are undecided.
(OccFir, bit(41)) ? TBDDefaultCallout;
/** OCCFIR[42]
@@ -477,18 +590,18 @@ group gOccFir filter singlebit
/** OCCFIR[45]
* OCC_SCOM_OCCFIR_SLW_OCISLV_ERR
*/
- (OccFir, bit(45)) ? TBDDefaultCallout;
+ (OccFir, bit(45)) ? calloutConnectedOccThr1;
/** OCCFIR[46]
* OCC_SCOM_OCCFIR_GPE_OCISLV_ERR
*/
- (OccFir, bit(46)) ? TBDDefaultCallout;
+ (OccFir, bit(46)) ? calloutConnectedOccThr1;
/** OCCFIR[47]
* OCC_SCOM_OCCFIR_OCB_OCISLV_ERR
*/
- (OccFir, bit(47)) ? TBDDefaultCallout;
-
+ (OccFir, bit(47)) ? calloutConnectedOccThr1;
+ #FIXME RTC23127 actions for bit 48,49 are undecided.
/** OCCFIR[48]
* OCC_SCOM_OCCFIR_C405ICU_M_TIMEOUT
*/
@@ -499,10 +612,15 @@ group gOccFir filter singlebit
*/
(OccFir, bit(49)) ? TBDDefaultCallout;
+ /** OCCFIR[50|51|52|53|54|55|56|57|58|59|60|61]
+ * OCC_SCOM_OCCLFIR_SPARE_FIR
+ */
+ (OccFir, bit(50|51|52|53|54|55|56|57|58|59|60|61)) ? defaultMaskedError;
+
/** OCCFIR[62|63]
* OCC_SCOM_OCCFIR_FIR_PARITY_ERR_DUP
*/
- (OccFir, bit(62|63)) ? TBDDefaultCallout;
+ (OccFir, bit(62|63)) ? defaultMaskedError;
};
################################################################################
@@ -583,192 +701,107 @@ group gPmcFir filter singlebit
/** PMCFIR[0]
* LFIR_PSTATE_OCI_MASTER_RDERR
*/
- (PmcFir, bit(0)) ? TBDDefaultCallout;
+ (PmcFir, bit(0)) ? SelfHighThr1;
/** PMCFIR[1]
* LFIR_PSTATE_OCI_MASTER_RDDATA_PARITY_ERR
*/
- (PmcFir, bit(1)) ? TBDDefaultCallout;
+ (PmcFir, bit(1)) ? SelfHighThr1;
/** PMCFIR[2]
* LFIR_PSTATE_GPST_CHECKBYTE_ERR
*/
- (PmcFir, bit(2)) ? TBDDefaultCallout;
+ (PmcFir, bit(2)) ? SelfHighThr1;
/** PMCFIR[3]
* LFIR_PSTATE_GACK_TO_ERR
*/
- (PmcFir, bit(3)) ? TBDDefaultCallout;
+ (PmcFir, bit(3)) ? SelfHighThr1;
/** PMCFIR[4]
* LFIR_PSTATE_PIB_MASTER_NONOFFLINE_ERR
*/
- (PmcFir, bit(4)) ? TBDDefaultCallout;
+ (PmcFir, bit(4)) ? SelfHighThr1;
/** PMCFIR[5]
* LFIR_PSTATE_PIB_MASTER_OFFLINE_ERR
*/
- (PmcFir, bit(5)) ? TBDDefaultCallout;
+ (PmcFir, bit(5)) ? SelfHighThr1;
/** PMCFIR[6]
* LFIR_PSTATE_OCI_MASTER_TO_ERR
*/
- (PmcFir, bit(6)) ? TBDDefaultCallout;
+ (PmcFir, bit(6)) ? SelfHighThr1;
/** PMCFIR[7]
* LFIR_PSTATE_INTERCHIP_UE_ERR
*/
- (PmcFir, bit(7)) ? TBDDefaultCallout;
+ (PmcFir, bit(7)) ? SelfHighThr1;
/** PMCFIR[8]
* LFIR_PSTATE_INTERCHIP_ERRORFRAME_ERR
*/
- (PmcFir, bit(8)) ? TBDDefaultCallout;
+ (PmcFir, bit(8)) ? SelfHighThr1;
/** PMCFIR[9]
* LFIR_PSTATE_MS_FSM_ERR
*/
- (PmcFir, bit(9)) ? TBDDefaultCallout;
+ (PmcFir, bit(9)) ? SelfHighThr1;
/** PMCFIR[10]
* LFIR_MS_COMP_PARITY_ERR
*/
- (PmcFir, bit(10)) ? TBDDefaultCallout;
-
- /** PMCFIR[11]
- * LFIR_IDLE_PORESW_FATAL_ERR
- */
- (PmcFir, bit(11)) ? TBDDefaultCallout;
-
- /** PMCFIR[12]
- * LFIR_IDLE_PORESW_STATUS_RC_ERR
- */
- (PmcFir, bit(12)) ? TBDDefaultCallout;
-
- /** PMCFIR[13]
- * LFIR_IDLE_PORESW_STATUS_VALUE_ERR
- */
- (PmcFir, bit(13)) ? TBDDefaultCallout;
-
- /** PMCFIR[14]
- * LFIR_IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR
- */
- (PmcFir, bit(14)) ? TBDDefaultCallout;
+ (PmcFir, bit(10)) ? defaultMaskedError;
- /** PMCFIR[15]
- * LFIR_IDLE_PORESW_TIMEOUT_ERR
+ /** PMCFIR[11:17]
+ * LFIR_IDLE
*/
- (PmcFir, bit(15)) ? TBDDefaultCallout;
-
- /** PMCFIR[16]
- * LFIR_IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR
- */
- (PmcFir, bit(16)) ? TBDDefaultCallout;
-
- /** PMCFIR[17]
- * LFIR_IDLE_INTERNAL_ERR
- */
- (PmcFir, bit(17)) ? TBDDefaultCallout;
+ (PmcFir, bit(11|12|13|14|15|16|17)) ? defaultMaskedError;
/** PMCFIR[18]
* LFIR_INT_COMP_PARITY_ERR
*/
- (PmcFir, bit(18)) ? TBDDefaultCallout;
+ (PmcFir, bit(18)) ? defaultMaskedError;
/** PMCFIR[19]
* LFIR_PMC_OCC_HEARTBEAT_TIMEOUT
*/
- (PmcFir, bit(19)) ? TBDDefaultCallout;
-
- /** PMCFIR[20]
- * LFIR_SPIVID_CRC_ERROR0
- */
- (PmcFir, bit(20)) ? TBDDefaultCallout;
-
- /** PMCFIR[21]
- * LFIR_SPIVID_CRC_ERROR1
- */
- (PmcFir, bit(21)) ? TBDDefaultCallout;
-
- /** PMCFIR[22]
- * LFIR_SPIVID_CRC_ERROR2
- */
- (PmcFir, bit(22)) ? TBDDefaultCallout;
-
- /** PMCFIR[23]
- * LFIR_SPIVID_RETRY_TIMEOUT
- */
- (PmcFir, bit(23)) ? TBDDefaultCallout;
-
- /** PMCFIR[24]
- * LFIR_SPIVID_FSM_ERR
- */
- (PmcFir, bit(24)) ? TBDDefaultCallout;
-
- /** PMCFIR[25]
- * LFIR_SPIVID_MAJORITY_DETECTED_A_MINORITY
- */
- (PmcFir, bit(25)) ? TBDDefaultCallout;
-
- /** PMCFIR[26]
- * LFIR_O2S_CRC_ERROR0
- */
- (PmcFir, bit(26)) ? TBDDefaultCallout;
-
- /** PMCFIR[27]
- * LFIR_O2S_CRC_ERROR1
- */
- (PmcFir, bit(27)) ? TBDDefaultCallout;
-
- /** PMCFIR[28]
- *LFIR_O2S_CRC_ERROR1
- */
- (PmcFir, bit(28)) ? TBDDefaultCallout;
+ (PmcFir, bit(19)) ? defaultMaskedError;
- /** PMCFIR[29]
- * LFIR_O2S_RETRY_TIMEOUT
+ /** PMCFIR[20:25]
+ * LFIR_SPIVID
*/
- (PmcFir, bit(29)) ? TBDDefaultCallout;
+ (PmcFir, bit(20|21|22|23|24|25)) ? defaultMaskedError;
- /** PMCFIR[30]
- * LFIR_O2S_WRITE_WHILE_BRIDGE_BUSY_ERR
+ /** PMCFIR[26:32]
+ * LFIR_O2S
*/
- (PmcFir, bit(30)) ? TBDDefaultCallout;
+ (PmcFir, bit(26|27|28|29|30|31|32)) ? defaultMaskedError;
- /** PMCFIR[31]
- * LFIR_O2S_FSM_ERR
+ /** PMCFIR[33:24]
+ * LFIR_O2P
*/
- (PmcFir, bit(31)) ? TBDDefaultCallout;
-
- /** PMCFIR[32]
- * LFIR_O2S_MAJORITY_DETECTED_A_MINORITY
- */
- (PmcFir, bit(32)) ? TBDDefaultCallout;
-
- /** PMCFIR[33]
- * LFIR_O2P_WRITE_WHILE_BRIDGE_BUSY_ERR
- */
- (PmcFir, bit(33)) ? TBDDefaultCallout;
-
- /** PMCFIR[34]
- * LFIR_O2P_FSM_ERR
- */
- (PmcFir, bit(34)) ? TBDDefaultCallout;
+ (PmcFir, bit(33|34)) ? defaultMaskedError;
/** PMCFIR[35]
* LFIR_OCI_SLAVE_ERR
*/
- (PmcFir, bit(35)) ? TBDDefaultCallout;
+ (PmcFir, bit(35)) ? defaultMaskedError;
/** PMCFIR[36]
* LFIR_IF_COMP_PARITY_ERROR
*/
- (PmcFir, bit(36)) ? TBDDefaultCallout;
+ (PmcFir, bit(36)) ? defaultMaskedError;
+
+ /** PMCFIR[37:46]
+ * SPARE
+ */
+ (PmcFir, bit(37|38|39|40|41|42|43|44|45|46)) ? defaultMaskedError;
/** PMCFIR[47|48]
* FIR_PARITY_ERR
*/
- (PmcFir, bit(47|48)) ? TBDDefaultCallout;
+ (PmcFir, bit(47|48)) ? defaultMaskedError;
};
################################################################################
@@ -830,3 +863,10 @@ actionclass analyzeMcs31
analyze(connected(TYPE_MCS, 7));
funccall("MaskMCS31IfCentaurCheckstop");
};
+
+/** Callout the connected OCC */
+actionclass calloutConnectedOccThr1
+{
+ threshold1;
+ callout ( connected(TYPE_OCC, 0), MRU_MED );
+};
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
index 772157838..e9395f03f 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule
@@ -535,79 +535,22 @@
};
############################################################################
- # PB Chiplet EHHCAFIR
+ # PB Chiplet EHHCAFIR and ENHCAFIR
+ # These FIRs are completely masked but they will be captured for FFDC.
############################################################################
register EHHCAFIR
{
name "EH.TPC.HCA.EHHCA_FIR_REG";
scomaddr 0x02010980;
- reset (&, 0x02010981);
- mask (|, 0x02010985);
capture group default;
};
- register EHHCAFIR_MASK
- {
- name "EH.TPC.HCA.EHHCA_FIR_MASK_REG";
- scomaddr 0x02010983;
- capture group default;
- };
-
- register EHHCAFIR_ACT0
- {
- name "EH.TPC.HCA.EHHCA_FIR_ACTION0_REG";
- scomaddr 0x02010986;
- capture type secondary;
- capture group default;
- capture req nonzero("EHHCAFIR");
- };
-
- register EHHCAFIR_ACT1
- {
- name "EH.TPC.HCA.EHHCA_FIR_ACTION1_REG";
- scomaddr 0x02010987;
- capture type secondary;
- capture group default;
- capture req nonzero("EHHCAFIR");
- };
-
- ############################################################################
- # PB Chiplet ENHCAFIR
- ############################################################################
-
register ENHCAFIR
{
name "EN.TPC.BRIDGE.HCA.ENHCA_FIR_REG";
scomaddr 0x02010940;
- reset (&, 0x02010941);
- mask (|, 0x02010945);
- capture group default;
- };
-
- register ENHCAFIR_MASK
- {
- name "EN.TPC.BRIDGE.HCA.ENHCA_FIR_MASK_REG";
- scomaddr 0x02010943;
- capture group default;
- };
-
- register ENHCAFIR_ACT0
- {
- name "EN.TPC.BRIDGE.HCA.ENHCA_FIR_ACTION0_REG";
- scomaddr 0x02010946;
- capture type secondary;
- capture group default;
- capture req nonzero("ENHCAFIR");
- };
-
- register ENHCAFIR_ACT1
- {
- name "EN.TPC.BRIDGE.HCA.ENHCA_FIR_ACTION1_REG";
- scomaddr 0x02010947;
- capture type secondary;
capture group default;
- capture req nonzero("ENHCAFIR");
};
############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
index 954f038fc..0a337b140 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
@@ -99,117 +99,29 @@
};
############################################################################
- # PCIE Chiplet PCICLOCKFIR_0
+ # PCIE Chiplet PCICLOCKFIRs
+ # These FIRs are completely masked but they will be captured for FFDC.
############################################################################
register PCICLOCKFIR_0
{
name "ES.PE_WRAP_TOP.PE0.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_REG";
scomaddr 0x09012000;
- reset (&, 0x09012001);
- mask (|, 0x09012005);
capture group default;
};
- register PCICLOCKFIR_0_MASK
- {
- name "ES.PE_WRAP_TOP.PE0.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_MASK_REG";
- scomaddr 0x09012003;
- capture group default;
- };
-
- register PCICLOCKFIR_0_ACT0
- {
- name "ES.PE_WRAP_TOP.PE0.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION0_REG";
- scomaddr 0x09012006;
- capture type secondary;
- capture group default;
- capture req nonzero("PCICLOCKFIR_0");
- };
-
- register PCICLOCKFIR_0_ACT1
- {
- name "ES.PE_WRAP_TOP.PE0.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION1_REG";
- scomaddr 0x09012007;
- capture type secondary;
- capture group default;
- capture req nonzero("PCICLOCKFIR_0");
- };
-
- ############################################################################
- # PCIE Chiplet PCICLOCKFIR_1
- ############################################################################
-
register PCICLOCKFIR_1
{
name "ES.PE_WRAP_TOP.PE1.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_REG";
scomaddr 0x09012400;
- reset (&, 0x09012401);
- mask (|, 0x09012405);
- capture group default;
- };
-
- register PCICLOCKFIR_1_MASK
- {
- name "ES.PE_WRAP_TOP.PE1.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_MASK_REG";
- scomaddr 0x09012403;
- capture group default;
- };
-
- register PCICLOCKFIR_1_ACT0
- {
- name "ES.PE_WRAP_TOP.PE1.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION0_REG";
- scomaddr 0x09012406;
- capture type secondary;
- capture group default;
- capture req nonzero("PCICLOCKFIR_1");
- };
-
- register PCICLOCKFIR_1_ACT1
- {
- name "ES.PE_WRAP_TOP.PE1.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION1_REG";
- scomaddr 0x09012407;
- capture type secondary;
capture group default;
- capture req nonzero("PCICLOCKFIR_1");
};
- ############################################################################
- # PCIE Chiplet PCICLOCKFIR_2
- ############################################################################
-
register PCICLOCKFIR_2
{
name "ES.PE_WRAP_TOP.PE2.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_REG";
scomaddr 0x09012800;
- reset (&, 0x09012801);
- mask (|, 0x09012805);
- capture group default;
- };
-
- register PCICLOCKFIR_2_MASK
- {
- name "ES.PE_WRAP_TOP.PE2.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_MASK_REG";
- scomaddr 0x09012803;
- capture group default;
- };
-
- register PCICLOCKFIR_2_ACT0
- {
- name "ES.PE_WRAP_TOP.PE2.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION0_REG";
- scomaddr 0x09012806;
- capture type secondary;
- capture group default;
- capture req nonzero("PCICLOCKFIR_2");
- };
-
- register PCICLOCKFIR_2_ACT1
- {
- name "ES.PE_WRAP_TOP.PE2.PH3_TOP.ETU.RSB.PR_REGS.LEM.FIR_ACTION1_REG";
- scomaddr 0x09012807;
- capture type secondary;
capture group default;
- capture req nonzero("PCICLOCKFIR_2");
};
############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
index 02fdc5405..306c08358 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
@@ -624,6 +624,7 @@ PLUGIN_CALLOUT_PEER_BUS( xbus, TYPE_XBUS, 1 )
PLUGIN_CALLOUT_PEER_BUS( abus, TYPE_ABUS, 0 )
PLUGIN_CALLOUT_PEER_BUS( abus, TYPE_ABUS, 1 )
PLUGIN_CALLOUT_PEER_BUS( abus, TYPE_ABUS, 2 )
+PLUGIN_CALLOUT_PEER_BUS( psi, TYPE_PSI, 0 )
#undef PLUGIN_CALLOUT_PEER_BUS
diff --git a/src/usr/diag/prdf/framework/rule/makefile b/src/usr/diag/prdf/framework/rule/makefile
index 774e3979d..3aa4efaaa 100755
--- a/src/usr/diag/prdf/framework/rule/makefile
+++ b/src/usr/diag/prdf/framework/rule/makefile
@@ -220,7 +220,7 @@ ${REG_PLUGIN_PATHS}: ${OBJ_PLUG_DIR}/% : ${OBJ_RULE_DIR}/% | ${OBJ_PLUG_DIR}
# Link all individual header file needed to compile plugin code.
define LINK_RULE
-${OBJ_PLUG_DIR}/$(notdir $(1)): $(ROOTPATH)/$(1)
+${OBJ_PLUG_DIR}/$(notdir $(1)): $(ROOTPATH)/$(1) | ${OBJ_PLUG_DIR}
$(C2) " LINK $$(notdir $$@)"
$(C1)ln -sf ${OBJ_PLUG_LINK_PATH}/$(1) $$@
endef
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