diff options
Diffstat (limited to 'src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule')
-rwxr-xr-x | src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule index cefff3c11..d53d22120 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2012,2016 +# Contributors Listed Below - COPYRIGHT 2012,2018 # [+] International Business Machines Corp. # # @@ -244,10 +244,10 @@ }; ############################################################################ - # NEST Chiplet MBA0_MBSECCFIR + # NEST Chiplet MBSECCFIR_0 ############################################################################ - register MBA0_MBSECCFIR + register MBSECCFIR_0 { name "MBU.MBS.ECC01.MBECCFIR"; scomaddr 0x02011440; @@ -258,7 +258,7 @@ capture group MaintCmdRegs_mba0; }; - register MBA0_MBSECCFIR_AND + register MBSECCFIR_0_AND { name "MBU.MBS.ECC01.MBECCFIR_AND"; scomaddr 0x02011441; @@ -266,7 +266,7 @@ access write_only; }; - register MBA0_MBSECCFIR_MASK + register MBSECCFIR_0_MASK { name "MBU.MBS.ECC01.MBECCFIR_MASK"; scomaddr 0x02011443; @@ -275,7 +275,7 @@ capture group MaintCmdRegs_mba0; }; - register MBA0_MBSECCFIR_MASK_AND + register MBSECCFIR_0_MASK_AND { name "MBU.MBS.ECC01.MBECCFIR_MASK_AND"; scomaddr 0x02011444; @@ -283,7 +283,7 @@ access write_only; }; - register MBA0_MBSECCFIR_MASK_OR + register MBSECCFIR_0_MASK_OR { name "MBU.MBS.ECC01.MBECCFIR_MASK_OR"; scomaddr 0x02011445; @@ -291,7 +291,7 @@ access write_only; }; - register MBA0_MBSECCFIR_ACT0 + register MBSECCFIR_0_ACT0 { name "MBU.MBS.ECC01.MBECCFIR_ACTION0"; scomaddr 0x02011446; @@ -299,10 +299,10 @@ capture group default; capture group FirRegs; capture group MaintCmdRegs_mba0; - capture req nonzero("MBA0_MBSECCFIR"); + capture req nonzero("MBSECCFIR_0"); }; - register MBA0_MBSECCFIR_ACT1 + register MBSECCFIR_0_ACT1 { name "MBU.MBS.ECC01.MBECCFIR_ACTION1"; scomaddr 0x02011447; @@ -310,14 +310,14 @@ capture group default; capture group FirRegs; capture group MaintCmdRegs_mba0; - capture req nonzero("MBA0_MBSECCFIR"); + capture req nonzero("MBSECCFIR_0"); }; ############################################################################ - # NEST Chiplet MBA1_MBSECCFIR + # NEST Chiplet MBSECCFIR_1 ############################################################################ - register MBA1_MBSECCFIR + register MBSECCFIR_1 { name "MBU.MBS.ECC23.MBECCFIR"; scomaddr 0x02011480; @@ -328,7 +328,7 @@ capture group MaintCmdRegs_mba1; }; - register MBA1_MBSECCFIR_AND + register MBSECCFIR_1_AND { name "MBU.MBS.ECC23.MBECCFIR_AND"; scomaddr 0x02011481; @@ -336,7 +336,7 @@ access write_only; }; - register MBA1_MBSECCFIR_MASK + register MBSECCFIR_1_MASK { name "MBU.MBS.ECC23.MBECCFIR_MASK"; scomaddr 0x02011483; @@ -345,7 +345,7 @@ capture group MaintCmdRegs_mba1; }; - register MBA1_MBSECCFIR_MASK_AND + register MBSECCFIR_1_MASK_AND { name "MBU.MBS.ECC23.MBECCFIR_MASK_AND"; scomaddr 0x02011484; @@ -353,7 +353,7 @@ access write_only; }; - register MBA1_MBSECCFIR_MASK_OR + register MBSECCFIR_1_MASK_OR { name "MBU.MBS.ECC23.MBECCFIR_MASK_OR"; scomaddr 0x02011485; @@ -361,7 +361,7 @@ access write_only; }; - register MBA1_MBSECCFIR_ACT0 + register MBSECCFIR_1_ACT0 { name "MBU.MBS.ECC23.MBECCFIR_ACTION0"; scomaddr 0x02011486; @@ -369,10 +369,10 @@ capture group default; capture group FirRegs; capture group MaintCmdRegs_mba1; - capture req nonzero("MBA1_MBSECCFIR"); + capture req nonzero("MBSECCFIR_1"); }; - register MBA1_MBSECCFIR_ACT1 + register MBSECCFIR_1_ACT1 { name "MBU.MBS.ECC23.MBECCFIR_ACTION0"; scomaddr 0x02011487; @@ -380,14 +380,14 @@ capture group default; capture group FirRegs; capture group MaintCmdRegs_mba1; - capture req nonzero("MBA1_MBSECCFIR"); + capture req nonzero("MBSECCFIR_1"); }; ############################################################################ - # NEST Chiplet MBA0_MCBISTFIR + # NEST Chiplet MCBISTFIR_0 ############################################################################ - register MBA0_MCBISTFIR + register MCBISTFIR_0 { name "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRQ"; scomaddr 0x02011600; @@ -397,7 +397,7 @@ capture group FirRegs; }; - register MBA0_MCBISTFIR_MASK + register MCBISTFIR_0_MASK { name "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRMASK"; scomaddr 0x02011603; @@ -405,31 +405,31 @@ capture group FirRegs; }; - register MBA0_MCBISTFIR_ACT0 + register MCBISTFIR_0_ACT0 { name "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRACTION0"; scomaddr 0x02011606; capture type secondary; capture group default; capture group FirRegs; - capture req nonzero("MBA0_MCBISTFIR"); + capture req nonzero("MCBISTFIR_0"); }; - register MBA0_MCBISTFIR_ACT1 + register MCBISTFIR_0_ACT1 { name "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRACTION1"; scomaddr 0x02011607; capture type secondary; capture group default; capture group FirRegs; - capture req nonzero("MBA0_MCBISTFIR"); + capture req nonzero("MCBISTFIR_0"); }; ############################################################################ - # NEST Chiplet MBA1_MCBISTFIR + # NEST Chiplet MCBISTFIR_1 ############################################################################ - register MBA1_MCBISTFIR + register MCBISTFIR_1 { name "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRQ"; scomaddr 0x02011700; @@ -439,7 +439,7 @@ capture group FirRegs; }; - register MBA1_MCBISTFIR_MASK + register MCBISTFIR_1_MASK { name "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRMASK"; scomaddr 0x02011703; @@ -447,24 +447,24 @@ capture group FirRegs; }; - register MBA1_MCBISTFIR_ACT0 + register MCBISTFIR_1_ACT0 { name "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRACTION0"; scomaddr 0x02011706; capture type secondary; capture group default; capture group FirRegs; - capture req nonzero("MBA1_MCBISTFIR"); + capture req nonzero("MCBISTFIR_1"); }; - register MBA1_MCBISTFIR_ACT1 + register MCBISTFIR_1_ACT1 { name "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRACTION1"; scomaddr 0x02011707; capture type secondary; capture group default; capture group FirRegs; - capture req nonzero("MBA1_MCBISTFIR"); + capture req nonzero("MCBISTFIR_1"); }; ############################################################################ @@ -734,7 +734,7 @@ # NEST Chiplet memory maintenance threshold control registers ############################################################################ - register MBA0_MBSTR + register MBSTR_0 { name "MBU.MBS.MCBISTS01.SCOMFIR.MBSTRQ"; scomaddr 0x02011655; @@ -742,7 +742,7 @@ capture group MaintCmdRegs_mba0; }; - register MBA1_MBSTR + register MBSTR_1 { name "MBU.MBS.MCBISTS23.SCOMFIR.MBSTRQ"; scomaddr 0x02011755; |