diff options
Diffstat (limited to 'src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule')
-rwxr-xr-x | src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule | 202 |
1 files changed, 101 insertions, 101 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule index daf355e2a..e9a24513f 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2012,2016 +# Contributors Listed Below - COPYRIGHT 2012,2018 # [+] International Business Machines Corp. # # @@ -777,22 +777,22 @@ group gMbsFir filter singlebit, rule Mba0_MbsEccFir { - CHECK_STOP: MBA0_MBSECCFIR & ~MBA0_MBSECCFIR_MASK & - ~MBA0_MBSECCFIR_ACT0 & ~MBA0_MBSECCFIR_ACT1; - UNIT_CS: MBA0_MBSECCFIR & ~MBA0_MBSECCFIR_MASK & - ~MBA0_MBSECCFIR_ACT0 & ~MBA0_MBSECCFIR_ACT1; - RECOVERABLE: MBA0_MBSECCFIR & ~MBA0_MBSECCFIR_MASK & - ~MBA0_MBSECCFIR_ACT0 & MBA0_MBSECCFIR_ACT1; + CHECK_STOP: MBSECCFIR_0 & ~MBSECCFIR_0_MASK & + ~MBSECCFIR_0_ACT0 & ~MBSECCFIR_0_ACT1; + UNIT_CS: MBSECCFIR_0 & ~MBSECCFIR_0_MASK & + ~MBSECCFIR_0_ACT0 & ~MBSECCFIR_0_ACT1; + RECOVERABLE: MBSECCFIR_0 & ~MBSECCFIR_0_MASK & + ~MBSECCFIR_0_ACT0 & MBSECCFIR_0_ACT1; }; rule Mba1_MbsEccFir { - CHECK_STOP: MBA1_MBSECCFIR & ~MBA1_MBSECCFIR_MASK & - ~MBA1_MBSECCFIR_ACT0 & ~MBA1_MBSECCFIR_ACT1; - UNIT_CS: MBA1_MBSECCFIR & ~MBA1_MBSECCFIR_MASK & - ~MBA1_MBSECCFIR_ACT0 & ~MBA1_MBSECCFIR_ACT1; - RECOVERABLE: MBA1_MBSECCFIR & ~MBA1_MBSECCFIR_MASK & - ~MBA1_MBSECCFIR_ACT0 & MBA1_MBSECCFIR_ACT1; + CHECK_STOP: MBSECCFIR_1 & ~MBSECCFIR_1_MASK & + ~MBSECCFIR_1_ACT0 & ~MBSECCFIR_1_ACT1; + UNIT_CS: MBSECCFIR_1 & ~MBSECCFIR_1_MASK & + ~MBSECCFIR_1_ACT0 & ~MBSECCFIR_1_ACT1; + RECOVERABLE: MBSECCFIR_1 & ~MBSECCFIR_1_MASK & + ~MBSECCFIR_1_ACT0 & MBSECCFIR_1_ACT1; }; group gMbsEccFir filter priority ( 19, 41 ), @@ -801,312 +801,312 @@ group gMbsEccFir filter priority ( 19, 41 ), 32,33,34,35,36,37,38,39,40,41,42,43,44,45, 48,50,51) { - /** MBA0_MBSECCFIR[0] + /** MBSECCFIR_0[0] * Memory chip mark on rank 0 */ (Mba0_MbsEccFir, bit(0)) ? analyzeFetchMpe0_0; - /** MBA1_MBSECCFIR[0] + /** MBSECCFIR_1[0] * Memory chip mark on rank 0 */ (Mba1_MbsEccFir, bit(0)) ? analyzeFetchMpe1_0; - /** MBA0_MBSECCFIR[1] + /** MBSECCFIR_0[1] * Memory chip mark on rank 1 */ (Mba0_MbsEccFir, bit(1)) ? analyzeFetchMpe0_1; - /** MBA1_MBSECCFIR[1] + /** MBSECCFIR_1[1] * Memory chip mark on rank 1 */ (Mba1_MbsEccFir, bit(1)) ? analyzeFetchMpe1_1; - /** MBA0_MBSECCFIR[2] + /** MBSECCFIR_0[2] * Memory chip mark on rank 2 */ (Mba0_MbsEccFir, bit(2)) ? analyzeFetchMpe0_2; - /** MBA1_MBSECCFIR[2] + /** MBSECCFIR_1[2] * Memory chip mark on rank 2 */ (Mba1_MbsEccFir, bit(2)) ? analyzeFetchMpe1_2; - /** MBA0_MBSECCFIR[3] + /** MBSECCFIR_0[3] * Memory chip mark on rank 3 */ (Mba0_MbsEccFir, bit(3)) ? analyzeFetchMpe0_3; - /** MBA1_MBSECCFIR[3] + /** MBSECCFIR_1[3] * Memory chip mark on rank 3 */ (Mba1_MbsEccFir, bit(3)) ? analyzeFetchMpe1_3; - /** MBA0_MBSECCFIR[4] + /** MBSECCFIR_0[4] * Memory chip mark on rank 4 */ (Mba0_MbsEccFir, bit(4)) ? analyzeFetchMpe0_4; - /** MBA1_MBSECCFIR[4] + /** MBSECCFIR_1[4] * Memory chip mark on rank 4 */ (Mba1_MbsEccFir, bit(4)) ? analyzeFetchMpe1_4; - /** MBA0_MBSECCFIR[5] + /** MBSECCFIR_0[5] * Memory chip mark on rank 5 */ (Mba0_MbsEccFir, bit(5)) ? analyzeFetchMpe0_5; - /** MBA1_MBSECCFIR[5] + /** MBSECCFIR_1[5] * Memory chip mark on rank 5 */ (Mba1_MbsEccFir, bit(5)) ? analyzeFetchMpe1_5; - /** MBA0_MBSECCFIR[6] + /** MBSECCFIR_0[6] * Memory chip mark on rank 6 */ (Mba0_MbsEccFir, bit(6)) ? analyzeFetchMpe0_6; - /** MBA1_MBSECCFIR[6] + /** MBSECCFIR_1[6] * Memory chip mark on rank 6 */ (Mba1_MbsEccFir, bit(6)) ? analyzeFetchMpe1_6; - /** MBA0_MBSECCFIR[7] + /** MBSECCFIR_0[7] * Memory chip mark on rank 7 */ (Mba0_MbsEccFir, bit(7)) ? analyzeFetchMpe0_7; - /** MBA1_MBSECCFIR[7] + /** MBSECCFIR_1[7] * Memory chip mark on rank 7 */ (Mba1_MbsEccFir, bit(7)) ? analyzeFetchMpe1_7; - /** MBA0_MBSECCFIR[8:15] + /** MBSECCFIR_0[8:15] * Reserved */ (Mba0_MbsEccFir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[8:15] + /** MBSECCFIR_1[8:15] * Reserved */ (Mba1_MbsEccFir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[16] + /** MBSECCFIR_0[16] * Memory NCE */ (Mba0_MbsEccFir, bit(16)) ? analyzeFetchNce0; - /** MBA1_MBSECCFIR[16] + /** MBSECCFIR_1[16] * Memory NCE */ (Mba1_MbsEccFir, bit(16)) ? analyzeFetchNce1; - /** MBA0_MBSECCFIR[17] + /** MBSECCFIR_0[17] * Memory RCE */ (Mba0_MbsEccFir, bit(17)) ? analyzeFetchRce0; - /** MBA1_MBSECCFIR[17] + /** MBSECCFIR_1[17] * Memory RCE */ (Mba1_MbsEccFir, bit(17)) ? analyzeFetchRce1; - /** MBA0_MBSECCFIR[18] + /** MBSECCFIR_0[18] * Memory SUE */ (Mba0_MbsEccFir, bit(18)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[18] + /** MBSECCFIR_1[18] * Memory SUE */ (Mba1_MbsEccFir, bit(18)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[19] + /** MBSECCFIR_0[19] * Memory UE */ (Mba0_MbsEccFir, bit(19)) ? mba0MemoryUe; - /** MBA1_MBSECCFIR[19] + /** MBSECCFIR_1[19] * Memory UE */ (Mba1_MbsEccFir, bit(19)) ? mba1MemoryUe; - /** MBA0_MBSECCFIR[20:27] + /** MBSECCFIR_0[20:27] * Maintenance chip mark */ (Mba0_MbsEccFir, bit(20|21|22|23|24|25|26|27)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[20:27] + /** MBSECCFIR_1[20:27] * Maintenance chip mark */ (Mba1_MbsEccFir, bit(20|21|22|23|24|25|26|27)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[28:35] + /** MBSECCFIR_0[28:35] * Reserved */ (Mba0_MbsEccFir, bit(28|29|30|31|32|33|34|35)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[28:35] + /** MBSECCFIR_1[28:35] * Reserved */ (Mba1_MbsEccFir, bit(28|29|30|31|32|33|34|35)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[36] + /** MBSECCFIR_0[36] * Maintenance NCE */ (Mba0_MbsEccFir, bit(36)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[36] + /** MBSECCFIR_1[36] * Maintenance NCE */ (Mba1_MbsEccFir, bit(36)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[37] + /** MBSECCFIR_0[37] * Maintenance SCE */ (Mba0_MbsEccFir, bit(37)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[37] + /** MBSECCFIR_1[37] * Maintenance SCE */ (Mba1_MbsEccFir, bit(37)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[38] + /** MBSECCFIR_0[38] * Maintenance MCE */ (Mba0_MbsEccFir, bit(38)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[38] + /** MBSECCFIR_1[38] * Maintenance MCE */ (Mba1_MbsEccFir, bit(38)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[39] + /** MBSECCFIR_0[39] * Maintenance RCE */ (Mba0_MbsEccFir, bit(39)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[39] + /** MBSECCFIR_1[39] * Maintenance RCE */ (Mba1_MbsEccFir, bit(39)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[40] + /** MBSECCFIR_0[40] * Maintenance SUE */ (Mba0_MbsEccFir, bit(40)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[40] + /** MBSECCFIR_1[40] * Maintenance SUE */ (Mba1_MbsEccFir, bit(40)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[41] + /** MBSECCFIR_0[41] * Maintenance UE */ (Mba0_MbsEccFir, bit(41)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[41] + /** MBSECCFIR_1[41] * Maintenance UE */ (Mba1_MbsEccFir, bit(41)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[42] + /** MBSECCFIR_0[42] * MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE */ (Mba0_MbsEccFir, bit(42)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[42] + /** MBSECCFIR_1[42] * MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE */ (Mba1_MbsEccFir, bit(42)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[43] + /** MBSECCFIR_0[43] * MBECCFIR_PREFETCH_MEMORY_UE */ (Mba0_MbsEccFir, bit(43)) ? analyzeFetchPreUe0; - /** MBA1_MBSECCFIR[43] + /** MBSECCFIR_1[43] * MBECCFIR_PREFETCH_MEMORY_UE */ (Mba1_MbsEccFir, bit(43)) ? analyzeFetchPreUe1; - /** MBA0_MBSECCFIR[44] + /** MBSECCFIR_0[44] * MBECCFIR_MEMORY_RCD_PARITY_ERROR */ (Mba0_MbsEccFir, bit(44)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[44] + /** MBSECCFIR_1[44] * MBECCFIR_MEMORY_RCD_PARITY_ERROR */ (Mba1_MbsEccFir, bit(44)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[45] + /** MBSECCFIR_0[45] * MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR */ (Mba0_MbsEccFir, bit(45)) ? defaultMaskedError; - /** MBA1_MBSECCFIR[45] + /** MBSECCFIR_1[45] * MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR */ (Mba1_MbsEccFir, bit(45)) ? defaultMaskedError; - /** MBA0_MBSECCFIR[46] + /** MBSECCFIR_0[46] * MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba0_MbsEccFir, bit(46)) ? MBA0CalloutMedThr1; - /** MBA1_MBSECCFIR[46] + /** MBSECCFIR_1[46] * MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba1_MbsEccFir, bit(46)) ? MBA1CalloutMedThr1; - /** MBA0_MBSECCFIR[47] + /** MBSECCFIR_0[47] * MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba0_MbsEccFir, bit(47)) ? MBA0CalloutMedThr1UE; - /** MBA1_MBSECCFIR[47] + /** MBSECCFIR_1[47] * MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba1_MbsEccFir, bit(47)) ? MBA1CalloutMedThr1UE; - /** MBA0_MBSECCFIR[48] + /** MBSECCFIR_0[48] * MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba0_MbsEccFir, bit(48)) ? thresholdAndMask_mba0; - /** MBA1_MBSECCFIR[48] + /** MBSECCFIR_1[48] * MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR */ (Mba1_MbsEccFir, bit(48)) ? thresholdAndMask_mba1; - /** MBA0_MBSECCFIR[49] + /** MBSECCFIR_0[49] * MBECCFIR_ECC_DATAPATH_PARITY_ERROR */ (Mba0_MbsEccFir, bit(49)) ? MBA0CalloutMedThr1UE; - /** MBA1_MBSECCFIR[49] + /** MBSECCFIR_1[49] * MBECCFIR_ECC_DATAPATH_PARITY_ERROR */ (Mba1_MbsEccFir, bit(49)) ? MBA1CalloutMedThr1UE; - /** MBA0_MBSECCFIR[50] + /** MBSECCFIR_0[50] * MBECCFIR_INTERNAL_SCOM_ERROR */ (Mba0_MbsEccFir, bit(50)) ? thresholdAndMask_mba0; - /** MBA1_MBSECCFIR[50] + /** MBSECCFIR_1[50] * MBECCFIR_INTERNAL_SCOM_ERROR */ (Mba1_MbsEccFir, bit(50)) ? thresholdAndMask_mba1; - /** MBA0_MBSECCFIR[51] + /** MBSECCFIR_0[51] * MBECCFIR_INTERNAL_SCOM_ERROR_COPY */ (Mba0_MbsEccFir, bit(51)) ? thresholdAndMask_mba0; - /** MBA1_MBSECCFIR[51] + /** MBSECCFIR_1[51] * MBECCFIR_INTERNAL_SCOM_ERROR_COPY */ (Mba1_MbsEccFir, bit(51)) ? thresholdAndMask_mba1; @@ -1119,97 +1119,97 @@ group gMbsEccFir filter priority ( 19, 41 ), rule Mba0_McbistFir { - CHECK_STOP: MBA0_MCBISTFIR & ~MBA0_MCBISTFIR_MASK & - ~MBA0_MCBISTFIR_ACT0 & ~MBA0_MCBISTFIR_ACT1; - UNIT_CS: MBA0_MCBISTFIR & ~MBA0_MCBISTFIR_MASK & - ~MBA0_MCBISTFIR_ACT0 & ~MBA0_MCBISTFIR_ACT1; - RECOVERABLE: MBA0_MCBISTFIR & ~MBA0_MCBISTFIR_MASK & - ~MBA0_MCBISTFIR_ACT0 & MBA0_MCBISTFIR_ACT1; + CHECK_STOP: MCBISTFIR_0 & ~MCBISTFIR_0_MASK & + ~MCBISTFIR_0_ACT0 & ~MCBISTFIR_0_ACT1; + UNIT_CS: MCBISTFIR_0 & ~MCBISTFIR_0_MASK & + ~MCBISTFIR_0_ACT0 & ~MCBISTFIR_0_ACT1; + RECOVERABLE: MCBISTFIR_0 & ~MCBISTFIR_0_MASK & + ~MCBISTFIR_0_ACT0 & MCBISTFIR_0_ACT1; }; rule Mba1_McbistFir { - CHECK_STOP: MBA1_MCBISTFIR & ~MBA1_MCBISTFIR_MASK & - ~MBA1_MCBISTFIR_ACT0 & ~MBA1_MCBISTFIR_ACT1; - UNIT_CS: MBA1_MCBISTFIR & ~MBA1_MCBISTFIR_MASK & - ~MBA1_MCBISTFIR_ACT0 & ~MBA1_MCBISTFIR_ACT1; - RECOVERABLE: MBA1_MCBISTFIR & ~MBA1_MCBISTFIR_MASK & - ~MBA1_MCBISTFIR_ACT0 & MBA1_MCBISTFIR_ACT1; + CHECK_STOP: MCBISTFIR_1 & ~MCBISTFIR_1_MASK & + ~MCBISTFIR_1_ACT0 & ~MCBISTFIR_1_ACT1; + UNIT_CS: MCBISTFIR_1 & ~MCBISTFIR_1_MASK & + ~MCBISTFIR_1_ACT0 & ~MCBISTFIR_1_ACT1; + RECOVERABLE: MCBISTFIR_1 & ~MCBISTFIR_1_MASK & + ~MCBISTFIR_1_ACT0 & MCBISTFIR_1_ACT1; }; group gMcbistFir filter singlebit, secondarybits(2,3,4,5,6,7,8,9,10,11,12,13,14,15,16) { - /** MBA0_MCBISTFIR[0] + /** MCBISTFIR_0[0] * MBSFIRQ_SCOM_PAR_ERRORS */ (Mba0_McbistFir, bit(0)) ? MBA0CalloutMedThr1; - /** MBA1_MCBISTFIR[0] + /** MCBISTFIR_1[0] * MBSFIRQ_SCOM_PAR_ERRORS */ (Mba1_McbistFir, bit(0)) ? MBA1CalloutMedThr1; - /** MBA0_MCBISTFIR[1] + /** MCBISTFIR_0[1] * MBSFIRQ_MBX_PAR_ERRORS */ (Mba0_McbistFir, bit(1)) ? MBA0CalloutMedThr1; - /** MBA1_MCBISTFIR[1] + /** MCBISTFIR_1[1] * MBSFIRQ_MBX_PAR_ERRORS */ (Mba1_McbistFir, bit(1)) ? MBA1CalloutMedThr1; # This is for DD2 only - /** MBA0_MCBISTFIR[2] + /** MCBISTFIR_0[2] * MBSFIRQ_DRAM_EVENT_BIT0 */ (Mba0_McbistFir, bit(2)) ? defaultMaskedError; # This is for DD2 only - /** MBA1_MCBISTFIR[2] + /** MCBISTFIR_1[2] * MBSFIRQ_DRAM_EVENT_BIT0 */ (Mba1_McbistFir, bit(2)) ? defaultMaskedError; # This is for DD2 only - /** MBA0_MCBISTFIR[3] + /** MCBISTFIR_0[3] * MBSFIRQ_DRAM_EVENT_BIT1 */ (Mba0_McbistFir, bit(3)) ? defaultMaskedError; # This is for DD2 only - /** MBA1_MCBISTFIR[3] + /** MCBISTFIR_1[3] * MBSFIRQ_DRAM_EVENT_BIT1 */ (Mba1_McbistFir, bit(3)) ? defaultMaskedError; - /** MBA0_MCBISTFIR[4:14] + /** MCBISTFIR_0[4:14] * Reserved */ (Mba0_McbistFir, bit(4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError; - /** MBA1_MCBISTFIR[4:14] + /** MCBISTFIR_1[4:14] * Reserved */ (Mba1_McbistFir, bit(4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError; - /** MBA0_MCBISTFIR[15] + /** MCBISTFIR_0[15] * MBSFIRQ_INTERNAL_SCOM_ERROR */ (Mba0_McbistFir, bit(15)) ? thresholdAndMask_mba0; - /** MBA1_MCBISTFIR[15] + /** MCBISTFIR_1[15] * MBSFIRQ_INTERNAL_SCOM_ERROR */ (Mba1_McbistFir, bit(15)) ? thresholdAndMask_mba1; - /** MBA0_MCBISTFIR[16] + /** MCBISTFIR_0[16] * MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE */ (Mba0_McbistFir, bit(16)) ? thresholdAndMask_mba0; - /** MBA1_MCBISTFIR[16] + /** MCBISTFIR_1[16] * MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE */ (Mba1_McbistFir, bit(16)) ? thresholdAndMask_mba1; |