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-rw-r--r--src/include/usr/sbeio/sbe_psudd.H33
1 files changed, 33 insertions, 0 deletions
diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H
index 5b2983c39..76603859f 100644
--- a/src/include/usr/sbeio/sbe_psudd.H
+++ b/src/include/usr/sbeio/sbe_psudd.H
@@ -102,6 +102,7 @@ class SbePsu
//BYTE 7 options
enum psuGenericMessageCommands
{
+ SBE_PSU_READ_SEEPROM = 0x03,
SBE_PSU_SET_FFDC_ADDRESS = 0x04,
SBE_PSU_GENERIC_MSG_QUIESCE = 0x05,
SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06,
@@ -226,6 +227,25 @@ class SbePsu
* 0x4 - Reg 2 is non-reserved (read or write this reg)
* 0x8 - Reg 3 is non-reserved (read or write this reg)
*/
+ enum psuReadSeepromMsgs
+ {
+ SBE_READ_SEEPROM_REQ_USED_REGS = 0x07,
+ SBE_READ_SEEPROM_RSP_USED_REGS = 0x01,
+ };
+
+ /**
+ * @brief non reserved word enums
+ *
+ * Shows which of the request and response msg registers are
+ * not reserved. Reserved registers do not need to be written
+ * or read.
+ *
+ * This is a 4 bit field:
+ * 0x1 - Reg 0 is non-reserved (read or write this reg)
+ * 0x2 - Reg 1 is non-reserved (read or write this reg)
+ * 0x4 - Reg 2 is non-reserved (read or write this reg)
+ * 0x8 - Reg 3 is non-reserved (read or write this reg)
+ */
enum psuStashKeyAddrNonReservedMsgs
{
SBE_STASH_KEY_ADDR_REQ_USED_REGS = 0x07,
@@ -413,6 +433,19 @@ class SbePsu
uint64_t cd7_setFFDCAddr_CommAddr; // mbxReg3
} PACKED;
+ struct //readSeeprom
+ {
+ uint16_t cd7_readSeeprom_Reserved;
+ uint16_t cd7_readSeeprom_ControlFlags;
+ uint16_t cd7_readSeeprom_SeqId;
+ uint8_t cd7_readSeeprom_CommandClass;
+ uint8_t cd7_readSeeprom_Command;
+ uint32_t cd7_readSeeprom_SeepromOffset; // mbxReg1
+ uint32_t cd7_readSeeprom_ReadSize; // mbxReg1
+ uint64_t cd7_readSeeprom_DestinationAddr; // mbxReg2
+ uint64_t cd7_readSeeprom_MbxReg3Reserved; // mbxReg3
+ } PACKED;
+
psuCommand(uint16_t i_controlFlags, //Mbx Reg 0 input
uint8_t i_commandClass, //Mbx Reg 0 input
uint8_t i_command) : //Mbx Reg 0 input
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