diff options
Diffstat (limited to 'src/include/usr/isteps/pm')
-rw-r--r-- | src/include/usr/isteps/pm/occAccess.H | 3 | ||||
-rw-r--r-- | src/include/usr/isteps/pm/occCheckstop.H | 6 | ||||
-rw-r--r-- | src/include/usr/isteps/pm/pm_common_ext.H | 5 |
3 files changed, 11 insertions, 3 deletions
diff --git a/src/include/usr/isteps/pm/occAccess.H b/src/include/usr/isteps/pm/occAccess.H index a5b46ff45..f8c3ea8c7 100644 --- a/src/include/usr/isteps/pm/occAccess.H +++ b/src/include/usr/isteps/pm/occAccess.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2017 */ +/* Contributors Listed Below - COPYRIGHT 2014,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -25,7 +25,6 @@ #ifndef OCCACCESS_H_ #define OCCACCESS_H_ -#include <config.h> #include <errl/errlentry.H> #include <targeting/common/commontargeting.H> diff --git a/src/include/usr/isteps/pm/occCheckstop.H b/src/include/usr/isteps/pm/occCheckstop.H index 026c8db55..edb4b4ab3 100644 --- a/src/include/usr/isteps/pm/occCheckstop.H +++ b/src/include/usr/isteps/pm/occCheckstop.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2017 */ +/* Contributors Listed Below - COPYRIGHT 2014,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -47,6 +47,10 @@ namespace HBOCC NOT_FIR_MASTER = 0x00000000, IS_FIR_MASTER = 0x00000001, + // SMF Mode + SMF_MODE_DISABLED = 0x00000000, + SMF_MODE_ENABLED = 0x00000001, + // SRAM Addresses for OCC Main App and GPE0 app OCC_405_SRAM_ADDRESS = 0xFFF40000, OCC_GPE0_SRAM_ADDRESS = 0xFFF01000, diff --git a/src/include/usr/isteps/pm/pm_common_ext.H b/src/include/usr/isteps/pm/pm_common_ext.H index 307dfbc7f..5c6e3985d 100644 --- a/src/include/usr/isteps/pm/pm_common_ext.H +++ b/src/include/usr/isteps/pm/pm_common_ext.H @@ -52,6 +52,11 @@ namespace HBPM // FIR collection configuration data needed by FIR Master // OCC in the event of a checkstop uint8_t firdataConfig[3072]; + + // For informing OCC if SMF mode is enabled: + // 0x00000000 = Default (SMF disabled) + // 0x00000001 = SMF mode is enabled + uint32_t smfMode; }; /** |