diff options
Diffstat (limited to 'src/include/usr/isteps/nvdimm')
| -rw-r--r-- | src/include/usr/isteps/nvdimm/bpmreasoncodes.H | 90 | ||||
| -rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimm.H | 400 | ||||
| -rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimmif.H | 16 | ||||
| -rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H | 158 |
4 files changed, 590 insertions, 74 deletions
diff --git a/src/include/usr/isteps/nvdimm/bpmreasoncodes.H b/src/include/usr/isteps/nvdimm/bpmreasoncodes.H new file mode 100644 index 000000000..2957e2e6e --- /dev/null +++ b/src/include/usr/isteps/nvdimm/bpmreasoncodes.H @@ -0,0 +1,90 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/isteps/nvdimm/bpmreasoncodes.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2019 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/** + * @file bpmreasoncode.H + * + * @brief Reason codes and module ids for the BPM + */ +#ifndef __BPMREASONCODES_H +#define __BPMREASONCODES_H + +#include <hbotcompid.H> + +namespace BPM_RC +{ + + enum bpmModuleId + { + BPM_ISSUE_COMMAND = 0x00, + BPM_IN_UPDATE_MODE = 0x01, + BPM_UPDATE_FIRMWARE = 0x02, + BPM_ENTER_BSL_MODE = 0x03, + BPM_SETUP_PAYLOAD = 0x04, + BPM_DUMP_SEGMENT = 0x05, + BPM_DISABLE_WRITE_PROTECTION = 0x06, + BPM_WRITE_MAGIC_REG = 0x07, + BPM_GET_RESPONSE = 0x08, + BPM_RETRY_BLOCK_WRITE = 0x09, + BPM_WAIT_FOR_CMD_BIT_RESET = 0x0A, + BPM_WAIT_FOR_BUSY_BIT_RESET = 0x0B, + BPM_CHECK_FIRMWARE_CRC = 0x0C, + BPM_VERIFY_GOOD_BPM_STATE = 0x0D, + BPM_RUN_FW_UPDATES = 0x0F, + BPM_WRITE_VIA_SCAP = 0x10, + BPM_BLOCK_WRITE = 0x11, + BPM_RUN_UPDATE = 0x12, + BPM_START_UPDATE = 0xFD, + BPM_END_UPDATE = 0xFE, + BPM_DUMMY_ERROR = 0xFF, + }; + + enum bpmReasonCode + { + BPM_INVALID_PAYLOAD_SIZE = BPM_COMP_ID | 0x00, + BPM_UPDATE_MODE_VERIFICATION_FAIL = BPM_COMP_ID | 0x01, + BPM_RESET_VECTOR_NEVER_RECEIVED = BPM_COMP_ID | 0x02, + BPM_FAILED_TO_ENTER_BSL_MODE = BPM_COMP_ID | 0x03, + BPM_INVALID_PAYLOAD_DATA_SIZE = BPM_COMP_ID | 0x04, + BPM_BSL_MODE_ENABLED = BPM_COMP_ID | 0x05, + BPM_DISABLE_WRITE_PROTECTION_FAILED = BPM_COMP_ID | 0x06, + BPM_WRITE_TO_MAGIC_REG_FAILED = BPM_COMP_ID | 0x07, + BPM_RESPONSE_CRC_MISMATCH = BPM_COMP_ID | 0x08, + BPM_EXCEEDED_RETRY_LIMIT = BPM_COMP_ID | 0x09, + BPM_CMD_STATUS_ERROR_BIT_SET = BPM_COMP_ID | 0x0A, + BPM_FIRMWARE_CRC_VERIFY_FAILURE = BPM_COMP_ID | 0x0B, + BPM_VERSION_MISMATCH = BPM_COMP_ID | 0x0C, + BPM_EXCEEDED_RETRY_LIMIT_REG = BPM_COMP_ID | 0x0D, + BPM_EXCEEDED_RETRY_LIMIT_DATA = BPM_COMP_ID | 0x0E, + BPM_BAD_RESPONSE = BPM_COMP_ID | 0x0F, + BPM_UPDATE_SUCCESSFUL = BPM_COMP_ID | 0xFC, + BPM_ENTER_UPDATE_MODE = BPM_COMP_ID | 0xFD, + BPM_EXIT_UPDATE_MODE = BPM_COMP_ID | 0xFE, + BPM_DUMMY_REASONCODE = BPM_COMP_ID | 0xFF, + }; + +}; + + +#endif diff --git a/src/include/usr/isteps/nvdimm/nvdimm.H b/src/include/usr/isteps/nvdimm/nvdimm.H index 567299925..966d4fd17 100644 --- a/src/include/usr/isteps/nvdimm/nvdimm.H +++ b/src/include/usr/isteps/nvdimm/nvdimm.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -29,20 +29,24 @@ namespace NVDIMM { + enum nvdimm_err_status { - NSTD_VAL_NOPRSV = 0x08, // memory valid, contents not preserved (genesis) - NSTD_VAL_NOPRSV_MASK = 0xF7, - NSTD_VAL_PRSV = 0x04, // memory contents preserved - NSTD_VAL_PRSV_MASK = 0xFB, - NSTD_ERR_NOPRSV = 0x02, // memory failed to preserve contents - NSTD_ERR_NOPRSV_MASK = 0xFD, - NSTD_ERR_NOBKUP = 0x01, // memory unable to preserve future content - NSTD_ERR_NOBKUP_MASK = 0xFE, - NSTD_ERR = 0x03, // NSTD_ERR_NOPRSV+NSTD_ERR_NOBKUP + NSTD_VAL_ERASED = 0x08, // Image erased, SCM device contents not persisted + NSTD_VAL_ERASED_MASK = 0xF7, + NSTD_VAL_RESTORED = 0x04, // Valid image successfully restored, SCM persisted + NSTD_VAL_RESTORED_MASK = 0xFB, + NSTD_VAL_SR_FAILED = 0x02, // Save/Restore failed to persist memory contents + NSTD_VAL_SR_FAILED_MASK = 0xFD, + NSTD_VAL_DISARMED = 0x01, // memory unable to preserve future content + NSTD_VAL_DISARMED_MASK = 0xFE, + NSTD_ERR_VAL_SR = 0x40, // Partially working. Error detected but save/restore (SR) may still work + NSTD_ERR_VAL_SR_MASK = 0xBF, + NSTD_ERR = 0x03, // NSTD_ERR_NOPRSV+NSTD_ERR_NOBKUP }; #ifndef __HOSTBOOT_RUNTIME + /** * @brief Entry function to NVDIMM management * - Restore image from NVDIMM NAND flash to DRAM @@ -69,15 +73,105 @@ void nvdimm_restore(TARGETING::TargetHandleList &i_nvdimmList); **/ bool nvdimm_update(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Entry function to set NVDIMM thresholds + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + **/ +void nvdimm_thresholds(TARGETING::TargetHandleList &i_nvdimmList); + + #endif /** + * @brief Entry function to NVDIMM unlock encryption + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimm_encrypt_unlock(TARGETING::TargetHandleList &i_nvdimmList); + + +/** + * @brief Entry function to NVDIMM generate keys + * Generate encryption keys and set the FW key attribute + * + * @return true if no errors logged, else false + */ +bool nvdimm_gen_keys(void); + +/** + * @brief Entry function to NVDIMM remove keys + * Set the FW key attribute = 0 + * Tell HWSV to clear anchor key attribute + * + * @return true if no errors logged, else false + */ +bool nvdimm_remove_keys(void); + +/** + * @brief Entry function to NVDIMM enable encryption + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimm_encrypt_enable(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Entry function to NVDIMM crypto erase + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimm_crypto_erase(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Entry function to NVDIMM factory default + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimmFactoryDefault(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Entry function to NVDIMM secure erase verify + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimmSecureEraseVerifyStart(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Entry function to NVDIMM secure erase verify status + * + * @param[in] i_nvdimmList - list of nvdimm targets + * + * @return true if no errors logged, else false + */ +bool nvdimmSecureEraseVerifyStatus(TARGETING::TargetHandleList &i_nvdimmList); + +/** + * @brief Helper function to get list of nvdimm target pointers + * + * @param[out] o_nvdimmList - list of nvdimm targets + * + */ +void nvdimm_getNvdimmList(TARGETING::TargetHandleList &o_nvdimmList); + +/** * @brief This function erases image on the nvdimm target * * @param[in] i_nvdimm - nvdimm target with NV controller * - * @return errlHndl_t - Null if successful, otherwise a pointer to + * @return errlHndl_t - nullptr if successful, otherwise a pointer to * the error log. */ errlHndl_t nvdimmEraseNF(TARGETING::Target *i_nvdimm); @@ -92,17 +186,6 @@ errlHndl_t nvdimmEraseNF(TARGETING::Target *i_nvdimm); */ void nvdimmSetStatusFlag(TARGETING::Target *i_nvdimm, const uint8_t i_status_flag); -#ifdef __HOSTBOOT_RUNTIME - -/** - * @brief Check nvdimm error state - * - * @param[in] i_nvdimm - nvdimm target - * - * @return bool - true if nvdimm is in any error state, false otherwise - */ -bool nvdimmInErrorState(TARGETING::Target *i_nvdimm); - /** * @brief This function arms/disarms the trigger based on i_state * @@ -110,7 +193,7 @@ bool nvdimmInErrorState(TARGETING::Target *i_nvdimm); * * @param[in] i_state - true to arm, false to disarm * - * @return errlHndl_t - Null if successful, otherwise a pointer to + * @return errlHndl_t - nullptr if successful, otherwise a pointer to * the error log. */ errlHndl_t nvdimmChangeArmState(TARGETING::Target *i_nvdimm, bool i_state); @@ -130,39 +213,290 @@ errlHndl_t nvdimmChangeArmState(TARGETING::Target *i_nvdimm, bool i_state); bool nvdimmArm(TARGETING::TargetHandleList &i_nvdimmTargetList); /** + * @brief Disarms the trigger to enable backup in the event of a + * power loss on each NVDIMM + * + * @param[in] i_nvdimmTargetList : list of dimms that are NVDIMMs + * @return true if no errors logged, else false + */ +bool nvdimmDisarm(TARGETING::TargetHandleList &i_nvdimmTargetList); + +#ifdef __HOSTBOOT_RUNTIME + +/** + * @brief Check nvdimm error state + * + * @param[in] i_nvdimm - nvdimm target + * + * @return bool - true if nvdimm is in any error state, false otherwise + */ +bool nvdimmInErrorState(TARGETING::Target *i_nvdimm); + +/** + * @brief Check the ES (enery source)/backup power module(BPM) health status of + * the individual NVDIMMs supplied in list + * + * @details The BPM will trigger the health check when power is applied at the + * beginning of the IPL, with results ready to check about 20 mins + * later. It is the caller's responsibility to ensure enough time has + * passed to make this call. + * Excerpt from the Jedec Standard, Byte Addressable Energy Backed + * Interface of the interested flags (bits 0 .. 2). + * ES_CMD_STATUS0 + * Bit 0 : Health Check in Progress + * Bit 1 : Health Check Succeeded + * Bit 2 : Health Check Failed + * + * @param[in] i_nvdimmTargetList - list of NVDIMMs to check the ES health of + * + * @return false if one or more NVDIMMs fail ES health check, else true + */ +bool nvDimmEsCheckHealthStatus(const TARGETING::TargetHandleList + &i_nvdimmTargetList); + +/** + * @brief A wrapper around the call to nvDimmEsCheckHealthStatus + * + * @details This will aggregate all the NVDIMMs of the system and pass + * them to the call nvDimmEsCheckHealthStatus + * + * @see nvDimmEsCheckHealthStatus for more details + * + * @return false if one or more NVDIMMs fail an ES health check, else true + */ +bool nvDimmEsCheckHealthStatusOnSystem(); + + +/** + * @brief Check the NVM (non-volatile memory)/flash health status of the + * individual NVDIMMs supplied in list. + * + * @details This method will check the flash error count registers + * (FLASH_ERROR_COUNT0 to FLASH_ERROR_COUNT2) to determine if the + * number of flash error exceeds the maximum allowed. Will also check + * the flash bad block percentage register (FLASH_BAD_BLK_PCT) to + * determine if the percentage exceeds the maximum allowed. + * If any one of these or both of these fail their perspective + * maximums then a callout will be made with either or both failures. + * + * @param[in] i_nvdimmTargetList - list of NVDIMMs to check the NVM health of + * + * @return false if one or more NVDIMMs fail NVM health check, else true + */ +bool nvDimmNvmCheckHealthStatus(const TARGETING::TargetHandleList + &i_nvdimmTargetList); + +/** + * @brief A wrapper around the call to nvDimmNvmCheckHealthStatus + * + * @details This will aggregate all the NVDIMMs of the system and pass + * them to the call nvDimmNvmCheckHealthStatus + * + * @see nvDimmNvmCheckHealthStatus for more details + * + * @return false if one or more NVDIMMs fail an NVM health check, else true + */ +bool nvDimmNvmCheckHealthStatusOnSystem(); + + +/** + * @brief Send NV_STATUS to host + */ +void nvdimmSendNvStatus(); + +#endif + +/** * @brief NVDIMM protection state * - * NOT_PROTECTED - default state - * PROTECTED - switches to this when armed & OCC is in control - * UNPROTECTED_BECAUSE_ERROR - PRD detected error on NV controller - * Note: error will stay with target preventing PROTECTED status - * until power is cycled again + * NVDIMM_ARMED - set armed state + * NVDIMM_DISARMED - set disarmed state + * OCC_ACTIVE - set active state + * OCC_INACTIVE - set inactive state + * NVDIMM_FATAL_HW_ERROR - set fatal hw state + * NVDIMM_RISKY_HW_ERROR - set risky hw state + * NVDIMM_ENCRYPTION_ERROR - set encryption state + * Note: fatal error will stay with target preventing + * PROTECTED status until power is cycled again + * ENCRYPTION_ENABLED - contents of nvdimm are encrypted + * ENCRYPTION_DISABLED - contents of nvdimm are not encrypted + * ERASE_VERIFY_STARTED - set secure_erase_verify_complete to 0 + * ERASE_VERIFY_COMPLETE = set secure_erase_verify_complete to 1 */ enum nvdimm_protection_t { - NOT_PROTECTED = 0, - PROTECTED = 1, - UNPROTECTED_BECAUSE_ERROR = 2 + NVDIMM_ARMED = 0, + NVDIMM_DISARMED = 1, + OCC_ACTIVE = 2, + OCC_INACTIVE = 3, + NVDIMM_FATAL_HW_ERROR = 4, + NVDIMM_RISKY_HW_ERROR = 5, + NVDIMM_ENCRYPTION_ERROR = 6, + ENCRYPTION_ENABLED = 7, + ENCRYPTION_DISABLED = 8, + ERASE_VERIFY_STARTED = 9, + ERASE_VERIFY_COMPLETED = 10, + SEND_NV_STATUS = 11, + /* deprecated, still used by PRD */ + UNPROTECTED_BECAUSE_ERROR = 4, }; /** * @brief Notify PHYP of NVDIMM protection status * - * @param i_target Processor with NVDIMM + * @param i_target Processor with NVDIMM or NVDIMM itself + * - ARMED state updated per NVDIMM + * - ERROR states updated per NVDIMM + * - OCC state updated per PROC * @param i_state Protection state of NVDIMM + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. */ errlHndl_t notifyNvdimmProtectionChange(TARGETING::Target* i_target, const nvdimm_protection_t i_state); -#endif + +/** + * @brief Get operational unit operation timeout + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[out] o_timeout - operation timeout + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t getOperOpsTimeout(TARGETING::Target* i_nvdimm, + uint16_t& o_timeout); + + +/** + * @brief Wait for operational unit operation to complete + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[in] i_cmd - operational unit ops command + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t waitOperOpsComplete(TARGETING::Target* i_nvdimm, + uint8_t i_cmd); + + +/** + * @brief Get the vendor log unit + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[in] i_unitId - vendor log unit id + * + * @param[out] o_unitData - vendor log unit data + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t getLogPerUnit(TARGETING::Target* i_nvdimm, + uint16_t i_unitId, + std::vector<uint8_t>& o_unitData); + +/** + * @brief Calculate host CRC + * + * @param[in] i_data - host data + * + * @param[in] i_data_size - data size + * + * @return crc + */ +uint16_t crc16(const uint8_t * i_data, int i_size); + + +/** + * @brief Get operational unit crc + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[out] o_crc - nvdimm hw crc + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t getOperUnitCrc(TARGETING::Target* i_nvdimm, uint16_t& o_crc); + + +/** + * @brief Compare host and nvdimm checksum + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[in] i_unitData - data sent to the nvdimm by the host + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t compareCksum(TARGETING::Target* i_nvdimm, + std::vector<uint8_t>& i_unitData); + + +/** + * @brief Function to add NVDIMM vendor log data to errorlog FFDC + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[inout] io_err - error log to add FFDC data. Must not be nullptr + * + */ +void nvdimmAddVendorLog(TARGETING::Target *i_nvdimm, errlHndl_t& io_err); + + +/** + * @brief Add NVDIMM Update regs to FFDC for errors encountered + * during NVDIMM firmware update process + * Regs specified in NVDIMM IPL Error Handling Document + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[in] io_err - error log to add FFDC data. Must not be nullptr + * + */ +void nvdimmAddUpdateRegs(TARGETING::Target *i_nvdimm, errlHndl_t& io_err); + + +/** + * @brief Function to add some NVDIMM Page 4 status regs to errorlog FFDC + * PANIC_CNT Counts FPGA firmware events + * PARITY_ERROR_COUNT Counts FPGA SRAM parity errors + * FLASH_ERROR_COUNT0 Counts FLASH read/write errors + * FLASH_ERROR_COUNT1 + * FLASH_ERROR_COUNT2 + * FLASH_BAD_BLOCK_COUNT0 Counts bad blocks within the flash array + * FLASH_BAD_BLOCK_COUNT1 + * SCAP_STATUS BackupPowerModule/SuperCap state + * STATUS_EVENT_INT_INFO1 NVDIMM error info + * STATUS_EVENT_INT_INFO2 + * + * @param[in] i_nvdimm - nvdimm target + * + * @param[inout] io_err - error log to add FFDC data. Must not be nullptr + * + */ +void nvdimmAddPage4Regs(TARGETING::Target *i_nvdimm, errlHndl_t& io_err); + + /** * @brief Entry function to NVDIMM initialization * - Checks for ready state * - Waits for the ongoing backup to complete * - Disarms the trigger for draminit * @param i_target nvdimm target + * + * @return errlHndl_t - nullptr if successful, otherwise a pointer to + * the error log. */ void nvdimm_init(TARGETING::Target *i_nvdimm); + } #endif // NVDIMM_EXT_H__ diff --git a/src/include/usr/isteps/nvdimm/nvdimmif.H b/src/include/usr/isteps/nvdimm/nvdimmif.H index 4ddfcf970..e96bb17d4 100644 --- a/src/include/usr/isteps/nvdimm/nvdimmif.H +++ b/src/include/usr/isteps/nvdimm/nvdimmif.H @@ -42,6 +42,22 @@ namespace NVDIMM */ void getNVDIMMs( std::list<EEPROM::EepromInfo_t>& o_info ); +/** + * @brief Check if given address is owned by nvdimms and return + a new address that isn't if it was + * @param[in] i_topAddr = High mainstore address (see get_top_homer_mem_addr) + * @return uint64_t - Highest address without a nvdimm + */ +uint64_t get_top_addr_with_no_nvdimms( uint64_t i_topAddr ); + +// Make a very simple inline if we don't support NVDIMMs in this compile +#ifndef CONFIG_NVDIMM +inline uint64_t get_top_addr_with_no_nvdimms( uint64_t i_topAddr ) +{ + return i_topAddr; +}; +#endif + }; // end namespace NVDIMM #endif // end __NVDIMMIF_H diff --git a/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H b/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H index 0b1680d92..134988be6 100644 --- a/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H +++ b/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -85,6 +85,32 @@ enum nvdimmModuleId VALIDATE_FW_IMAGE = 0x23, WAIT_FW_OPS_BLOCK_RECEIVED = 0x24, NVDIMM_IS_UPDATE_NEEDED = 0x25, + NVDIMM_RUN_UPDATE_USING_LID = 0x26, + NVDIMM_GET_TPM = 0x27, + NVDIMM_SET_KEY_REG = 0x28, + NVDIMM_ENCRYPT_ENABLE = 0x29, + NVDIMM_CRYPTO_ERASE = 0x2A, + NVDIMM_CHECK_VALID_ATTR_DATA = 0x2B, + NVDIMM_HANDLE_CONFLICTING_KEYS = 0x2C, + NVDIMM_ENCRYPT_UNLOCK = 0x2D, + NVDIMM_GET_DARN_NUMBER = 0x2E, + NVDIMM_KEYIFY_RANDOM_NUMBER = 0x2F, + SET_ATTR_NVDIMM_ENCRYPTION_KEYS_FW = 0x30, + SEND_ATTR_NVDIMM_ARMED = 0x31, + NVDIMM_FACTORY_RESET = 0x32, + NVDIMM_ES_HEALTH_CHECK = 0x33, // Health check on the ES (energy source)/backup power module + NVDIMM_CHECK_RESETN = 0x34, + NVDIMM_CHECK_CSAVE = 0x35, + NVDIMM_MODULE_HEALTH_STATUS_CHECK = 0x36, + NVDIMM_SET_EVENT_NOTIFICATION = 0x37, + NVDIMM_NVM_HEALTH_CHECK = 0x38, // Health check on the NVM (non-volatile memory)/flash + NVDIMM_WAIT_OPER_OPS_COMPLETE = 0x39, + NVDIMM_COMPARE_CKSUM = 0x3A, + NVDIMM_CHECK_FW_SLOT = 0x3B, + NVDIMM_ARM_PRE_CHECK = 0x3C, + NVDIMM_ARM = 0x3D, + CLEAR_FW_OPS_STATUS = 0x3E, + NVDIMM_SECURE_ERASE_VERIFY_STATUS = 0x3F, }; /** @@ -95,52 +121,102 @@ enum nvdimmModuleId */ enum nvdimmReasonCode { - NVDIMM_INVALID_REASONCODE = NVDIMM_COMP_ID | 0x00, // Invalid Reasoncode - NVDIMM_INVALID_OPERATION = NVDIMM_COMP_ID | 0x01, - NVDIMM_INVALID_DEVICE_TYPE = NVDIMM_COMP_ID | 0x02, - NVDIMM_ATTR_INFO_NOT_FOUND = NVDIMM_COMP_ID | 0x03, - NVDIMM_INVALID_CHIP = NVDIMM_COMP_ID | 0x04, - NVDIMM_I2C_MASTER_PATH_ERROR = NVDIMM_COMP_ID | 0x05, - NVDIMM_TARGET_NULL = NVDIMM_COMP_ID | 0x06, - NVDIMM_INVALID_ADDR_OFFSET_SIZE = NVDIMM_COMP_ID | 0x07, - NVDIMM_OVERFLOW_ERROR = NVDIMM_COMP_ID | 0x08, - NVDIMM_I2C_WRITE_PAGE_SIZE_ZERO = NVDIMM_COMP_ID | 0x09, - NVDIMM_INVALID_OFFSET = NVDIMM_COMP_ID | 0x0A, - NVDIMM_READ_FAILURE = NVDIMM_COMP_ID | 0x0B, // NV Controller read failure - NVDIMM_WRITE_FAILURE = NVDIMM_COMP_ID | 0x0C, // NV Controller write failure - NVDIMM_BACKUP_TIMEOUT = NVDIMM_COMP_ID | 0x0D, // Backup/save timeout - NVDIMM_RESTORE_TIMEOUT = NVDIMM_COMP_ID | 0x0E, // Restore timeout - NVDIMM_ERASE_TIMEOUT = NVDIMM_COMP_ID | 0x0F, // Erase timeout - NVDIMM_CHARGE_TIMEOUT = NVDIMM_COMP_ID | 0x10, // Battery charging timeout - NVDIMM_ARM_TIMEOUT = NVDIMM_COMP_ID | 0x11, // Arming timeout - NVDIMM_SET_ES_ERROR = NVDIMM_COMP_ID | 0x12, // Failure to set the ES policy - NVDIMM_MSS_STR_ENTRY_ERROR = NVDIMM_COMP_ID | 0x13, // Failure to enter STR - NVDIMM_MSS_STR_EXIT_ERROR = NVDIMM_COMP_ID | 0x14, // Failure to exit STR - NVDIMM_MSS_POST_RSTR_ERROR = NVDIMM_COMP_ID | 0x15, // Failure to perform post restore work - NVDIMM_OPEN_PAGE_TIMEOUT = NVDIMM_COMP_ID | 0x16, // Open page timeout - NVDIMM_STATUS_TIMEOUT = NVDIMM_COMP_ID | 0x17, // Status timeout - NVDIMM_ARM_FAILED = NVDIMM_COMP_ID | 0x18, // Failure to arm reset_n - NVDIMM_ERASE_FAILED = NVDIMM_COMP_ID | 0x19, // Failure to erase - NVDIMM_RESTORE_FAILED = NVDIMM_COMP_ID | 0x1A, // Failure to restore - NVDIMM_NOT_READY = NVDIMM_COMP_ID | 0x1B, // NVDIMM not ready for host to access - NVDIMM_NULL_FIRMWARE_REQUEST_PTR = NVDIMM_COMP_ID | 0x1C, // Firmware request is NULL - NVDIMM_UNSUPPORTED_NVDIMM_TYPE = NVDIMM_COMP_ID | 0x1D, // Unsupported NVDIMM type for update - NVDIMM_OPERATION_IN_PROGRESS = NVDIMM_COMP_ID | 0x1E, // NV controller is busy - NVDIMM_CHECKSUM_ERROR = NVDIMM_COMP_ID | 0x1F, // Checksum error between host and nv calculated - NVDIMM_ZERO_TOTAL_REGIONS = NVDIMM_COMP_ID | 0x20, // Zero write regions calculated - NVDIMM_UPDATE_MODE_UNCHANGED = NVDIMM_COMP_ID | 0x21, // Unable to change update mode - NVDIMM_FW_OPS_IN_PROGRESS_TIMEOUT = NVDIMM_COMP_ID | 0x22, // Operations In Progress timeout - NVDIMM_DATA_SIZE_TOO_LARGE = NVDIMM_COMP_ID | 0x23, // Trying to write too much data - NVDIMM_DATA_SIZE_INVALID = NVDIMM_COMP_ID | 0x24, // Data size is invalid - NVDIMM_BLOCK_NOT_RECEIVED = NVDIMM_COMP_ID | 0x25, // Block data not received - NVDIMM_FW_OPS_NOT_SUCCESSFUL = NVDIMM_COMP_ID | 0x26, // Unsuccessful Firmware Operation - NVDIMM_UPDATE_NOT_SUPPORTED = NVDIMM_COMP_ID | 0x27, // NV controller cannot be updated + NVDIMM_INVALID_REASONCODE = NVDIMM_COMP_ID | 0x00, // Invalid Reasoncode + NVDIMM_INVALID_OPERATION = NVDIMM_COMP_ID | 0x01, + NVDIMM_INVALID_DEVICE_TYPE = NVDIMM_COMP_ID | 0x02, + NVDIMM_ATTR_INFO_NOT_FOUND = NVDIMM_COMP_ID | 0x03, + NVDIMM_INVALID_CHIP = NVDIMM_COMP_ID | 0x04, + NVDIMM_I2C_MASTER_PATH_ERROR = NVDIMM_COMP_ID | 0x05, + NVDIMM_TARGET_NULL = NVDIMM_COMP_ID | 0x06, + NVDIMM_INVALID_ADDR_OFFSET_SIZE = NVDIMM_COMP_ID | 0x07, + NVDIMM_OVERFLOW_ERROR = NVDIMM_COMP_ID | 0x08, + NVDIMM_I2C_WRITE_PAGE_SIZE_ZERO = NVDIMM_COMP_ID | 0x09, + NVDIMM_INVALID_OFFSET = NVDIMM_COMP_ID | 0x0A, + NVDIMM_READ_FAILURE = NVDIMM_COMP_ID | 0x0B, // NV Controller read failure + NVDIMM_WRITE_FAILURE = NVDIMM_COMP_ID | 0x0C, // NV Controller write failure + NVDIMM_BACKUP_TIMEOUT = NVDIMM_COMP_ID | 0x0D, // Backup/save timeout + NVDIMM_RESTORE_TIMEOUT = NVDIMM_COMP_ID | 0x0E, // Restore timeout + NVDIMM_ERASE_TIMEOUT = NVDIMM_COMP_ID | 0x0F, // Erase timeout + NVDIMM_CHARGE_TIMEOUT = NVDIMM_COMP_ID | 0x10, // Battery charging timeout + NVDIMM_ARM_TIMEOUT = NVDIMM_COMP_ID | 0x11, // Arming timeout + NVDIMM_SET_ES_ERROR = NVDIMM_COMP_ID | 0x12, // Failure to set the ES policy + NVDIMM_MSS_STR_ENTRY_ERROR = NVDIMM_COMP_ID | 0x13, // Failure to enter STR + NVDIMM_MSS_STR_EXIT_ERROR = NVDIMM_COMP_ID | 0x14, // Failure to exit STR + NVDIMM_MSS_POST_RSTR_ERROR = NVDIMM_COMP_ID | 0x15, // Failure to perform post restore work + NVDIMM_OPEN_PAGE_TIMEOUT = NVDIMM_COMP_ID | 0x16, // Open page timeout + NVDIMM_STATUS_TIMEOUT = NVDIMM_COMP_ID | 0x17, // Status timeout + NVDIMM_ARM_FAILED = NVDIMM_COMP_ID | 0x18, // Failure to arm reset_n + NVDIMM_ERASE_FAILED = NVDIMM_COMP_ID | 0x19, // Failure to erase + NVDIMM_RESTORE_FAILED = NVDIMM_COMP_ID | 0x1A, // Failure to restore + NVDIMM_NOT_READY = NVDIMM_COMP_ID | 0x1B, // NVDIMM not ready for host to access + NVDIMM_NULL_FIRMWARE_REQUEST_PTR = NVDIMM_COMP_ID | 0x1C, // Firmware request is NULL + NVDIMM_UNSUPPORTED_NVDIMM_TYPE = NVDIMM_COMP_ID | 0x1D, // Unsupported NVDIMM type for update + NVDIMM_OPERATION_IN_PROGRESS = NVDIMM_COMP_ID | 0x1E, // NV controller is busy + NVDIMM_CHECKSUM_ERROR = NVDIMM_COMP_ID | 0x1F, // Checksum error between host and nv calculated + NVDIMM_ZERO_TOTAL_REGIONS = NVDIMM_COMP_ID | 0x20, // Zero write regions calculated + NVDIMM_UPDATE_MODE_UNCHANGED = NVDIMM_COMP_ID | 0x21, // Unable to change update mode + NVDIMM_FW_OPS_IN_PROGRESS_TIMEOUT = NVDIMM_COMP_ID | 0x22, // Operations In Progress timeout + NVDIMM_DATA_SIZE_TOO_LARGE = NVDIMM_COMP_ID | 0x23, // Trying to write too much data + NVDIMM_DATA_SIZE_INVALID = NVDIMM_COMP_ID | 0x24, // Data size is invalid + NVDIMM_BLOCK_NOT_RECEIVED = NVDIMM_COMP_ID | 0x25, // Block data not received + NVDIMM_FW_OPS_NOT_SUCCESSFUL = NVDIMM_COMP_ID | 0x26, // Unsuccessful Firmware Operation + NVDIMM_UPDATE_NOT_SUPPORTED = NVDIMM_COMP_ID | 0x27, // NV controller cannot be updated + NVDIMM_START_UPDATE = NVDIMM_COMP_ID | 0x28, // start update + NVDIMM_UPDATE_COMPLETE = NVDIMM_COMP_ID | 0x29, // update completed + NVDIMM_TPM_NOT_FOUND = NVDIMM_COMP_ID | 0x2A, // TPM not found + NVDIMM_POWER_SAVE_FAILURE = NVDIMM_COMP_ID | 0x2B, // Save failed due to power loss + NVDIMM_CSAVE_ERROR = NVDIMM_COMP_ID | 0x2C, // CSave failed due to error + NVDIMM_VOLTAGE_REGULATOR_FAILED = NVDIMM_COMP_ID | 0x2D, + NVDIMM_VDD_LOST = NVDIMM_COMP_ID | 0x2E, + NVDIMM_VPP_LOST = NVDIMM_COMP_ID | 0x2F, + NVDIMM_VTT_LOST = NVDIMM_COMP_ID | 0x30, + NVDIMM_DRAM_NOT_SELF_REFRESH = NVDIMM_COMP_ID | 0x31, + NVDIMM_CONTROLLER_HARDWARE_ERROR = NVDIMM_COMP_ID | 0x32, + NVDIMM_NVM_CONTROLLER_ERROR = NVDIMM_COMP_ID | 0x33, + NVDIMM_NVM_LIFETIME_ERROR = NVDIMM_COMP_ID | 0x34, + NVDIMM_NOT_ENOUGH_ENERGY_FOR_CSAVE = NVDIMM_COMP_ID | 0x35, + NVDIMM_INVALID_FIRMWARE_ERROR = NVDIMM_COMP_ID | 0x36, // Module Health Status Registers + NVDIMM_CONFIG_DATA_ERROR = NVDIMM_COMP_ID | 0x37, + NVDIMM_NO_ES_PRESENT = NVDIMM_COMP_ID | 0x38, + NVDIMM_ES_POLICY_NOT_SET = NVDIMM_COMP_ID | 0x39, + NVDIMM_ES_HARDWARE_FAILURE = NVDIMM_COMP_ID | 0x3A, + NVDIMM_ES_HEALTH_ASSESSMENT_ERROR = NVDIMM_COMP_ID | 0x3B, + NVDIMM_ES_LIFETIME_ERROR = NVDIMM_COMP_ID | 0x3C, + NVDIMM_ES_TEMP_ERROR = NVDIMM_COMP_ID | 0x3D, + NVDIMM_SET_EVENT_NOTIFICATION_ERROR = NVDIMM_COMP_ID | 0x3E, + NVDIMM_VERIF_BYTE_CHECK_FAILED = NVDIMM_COMP_ID | 0x3F, // Encryption key reg verif failed + NVDIMM_ENCRYPTION_ENABLE_FAILED = NVDIMM_COMP_ID | 0x40, // Encryption enable failed + NVDIMM_ENCRYPTION_ERASE_PENDING_FAILED = NVDIMM_COMP_ID | 0x41, // Encryption crypto erase pending failed + NVDIMM_ENCRYPTION_ERASE_FAILED = NVDIMM_COMP_ID | 0x42, // Encryption crypto erase failed + NVDIMM_ENCRYPTION_UNLOCK_FAILED = NVDIMM_COMP_ID | 0x43, // Encryption unlock failed + NVDIMM_ENCRYPTION_INVALID_ATTRIBUTE = NVDIMM_COMP_ID | 0x44, // Encryption attribute key data invalid + NVDIMM_ENCRYPTION_KEY_ATTRS_INVALID = NVDIMM_COMP_ID | 0x45, // Encryption key attributes are both invalid + NVDIMM_ENCRYPTION_MAX_DARN_ERRORS = NVDIMM_COMP_ID | 0x46, // Darn random key gen reached max errors + NVDIMM_ENCRYPTION_BAD_RANDOM_DATA = NVDIMM_COMP_ID | 0x47, // Generated key data not valid + NVDIMM_CANNOT_MAKE_ATTRIBUTE = NVDIMM_COMP_ID | 0x48, // Cannot make Attribute + NVDIMM_ES_HEALTH_CHECK_IN_PROGRESS_FAILURE = NVDIMM_COMP_ID | 0x49, // !< pertains to ES_CMD_STATUS0[0]; the ES health check in progress flag + NVDIMM_ES_HEALTH_CHECK_REPORTED_FAILURE = NVDIMM_COMP_ID | 0x4A, // !< pertains to ES_CMD_STATUS0[2]; the ES health check reported a failure flag + NVDIMM_ES_LIFETIME_MIN_REQ_NOT_MET = NVDIMM_COMP_ID | 0x4B, // !< pertains to ES_LIFETIME; BPM does not meet minimum requirement for a new BPM + NVDIMM_ES_HEALTH_CHECK_NEVER_INITIATED = NVDIMM_COMP_ID | 0x4C, // !< An ES health check was never initiated at start of IPL + NVDIMM_NVM_HEALTH_CHECK_FAILED = NVDIMM_COMP_ID | 0x4D, // !< An NVM health check on the NVDIMM failed + NVDIMM_VENDOR_LOG_TIMEOUT = NVDIMM_COMP_ID | 0x4E, // Vendor log for FFDC timeout + NVDIMM_VENDOR_LOG_CKSUM_FAILED = NVDIMM_COMP_ID | 0x4F, // Vendor log for FFDC checksum fail + NVDIMM_INVALID_FW_SLOT = NVDIMM_COMP_ID | 0x50, + NVDIMM_ERASE_ERROR = NVDIMM_COMP_ID | 0x51, + NVDIMM_ARM_PRE_CHECK_FAILED = NVDIMM_COMP_ID | 0x52, + NVDIMM_ARM_ENCRYPTION_UNLOCK_FAILED = NVDIMM_COMP_ID | 0x53, + NVDIMM_ARM_RETRY = NVDIMM_COMP_ID | 0x54, + NVDIMM_CLEAR_FW_OPS_STATUS_TIMEOUT = NVDIMM_COMP_ID | 0x55, // Failed to clear FW_OPS_STATUS + NVDIMM_NOT_RUNNING_LATEST_LEVEL = NVDIMM_COMP_ID | 0x56, // Either running from slot 0 or level was not updated + NVDIMM_ERASE_VERIFY_STATUS_NONZERO = NVDIMM_COMP_ID | 0x57, + NVDIMM_ERASE_VERIFY_RESULT_NONZERO = NVDIMM_COMP_ID | 0x58, }; enum UserDetailsTypes { NVDIMM_UDT_NO_FORMAT = 0x0, NVDIMM_UDT_PARAMETERS = 0x1, + NVDIMM_OP_PARAMETERS = 0x2, }; }; // end NVDIMM |
