1 files changed, 43 insertions, 0 deletions
diff --git a/src/include/usr/hwas/common/hwasCommon.H b/src/include/usr/hwas/common/hwasCommon.H
index 00eab2f55..547531ca8 100644
--- a/src/include/usr/hwas/common/hwasCommon.H
+++ b/src/include/usr/hwas/common/hwasCommon.H
@@ -74,6 +74,49 @@ errlHndl_t platPresenceDetect(TARGETING::TargetHandleList &io_targets);
  */
 errlHndl_t platReadIDEC(const TARGETING::TargetHandle_t &i_target);
 
+/**
+ * @brief platform specific code to determine the PG vector of the input
+ *  target. The platform specific code is responsible for returning the
+ *  vector. The caller is reponsible for allocating and de-allocating the space.
+ *
+ * @param[in]  i_target    target to check for chip ID/EC
+ * @param[out] o_pgData    pointer to area that will hold the partialGood vector
+ *                          read from VPD; must be malloc'ed by the caller,
+ *                          and must be VPD_CP00_PG_DATA_LENGTH in size.
+ *
+ * @return errlHndl_t       valid errlHndl_t handle if there was an error
+ *                          NULL if no errors;
+ */
+errlHndl_t platReadPartialGood(const TARGETING::TargetHandle_t &i_target,
+                                void *o_pgData);
+
+// constants the platReadPartialGood will use for looking at the VPD data
+const uint32_t VPD_CP00_PG_DATA_LENGTH      = 64;
+const uint32_t VPD_CP00_PG_HDR_LENGTH       = 1;
+
+// components of the partial good vector
+const uint32_t VPD_CP00_PG_PIB_INDEX        = 0;
+const uint32_t VPD_CP00_PG_PIB_GOOD         = 0x0000;
+
+const uint32_t VPD_CP00_PG_PERVASIVE_INDEX  = 1;
+const uint32_t VPD_CP00_PG_PERVASIVE_GOOD   = 0xF180;
+
+const uint32_t VPD_CP00_PG_POWERBUS_INDEX   = 2;
+const uint32_t VPD_CP00_PG_POWERBUS_GOOD    = 0xFC00;
+
+const uint32_t VPD_CP00_PG_XBUS_INDEX       = 4;
+const uint32_t VPD_CP00_PG_XBUS_GOOD        = 0xF000;
+
+const uint32_t VPD_CP00_PG_ABUS_INDEX       = 8;
+const uint32_t VPD_CP00_PG_ABUS_GOOD        = 0xE100;
+
+const uint32_t VPD_CP00_PG_PCIE_INDEX       = 9;
+const uint32_t VPD_CP00_PG_PCIE_GOOD        = 0xF700;
+
+const uint32_t VPD_CP00_PG_EX0_INDEX        = 16;
+const uint32_t VPD_CP00_PG_EX0_GOOD         = 0xF300;
+
+
 } // namespace HWAS
 
 #endif // HWASCOMMON_H_