diff options
Diffstat (limited to 'src/include/kernel')
| -rw-r--r-- | src/include/kernel/intmsghandler.H | 18 | ||||
| -rw-r--r-- | src/include/kernel/misc.H | 36 |
2 files changed, 46 insertions, 8 deletions
diff --git a/src/include/kernel/intmsghandler.H b/src/include/kernel/intmsghandler.H index 73fbd9313..88e1c2c1e 100644 --- a/src/include/kernel/intmsghandler.H +++ b/src/include/kernel/intmsghandler.H @@ -61,10 +61,11 @@ class InterruptMsgHdlr : public MessageHandler // Logical Shift Left fields for mmio Base address from PIR. // (IP addr bit pos - PIR bit pos) P8_IP_THREADID_LSL = (12-0), - P8_IP_COREID_LSL = (15-3), + P8_IP_COREID_LSL = (15-3), P8_IP_CHIPID_LSL = (20-7), P8_IP_NODEID_LSL = (22-10), XIRR_ADDR_OFFSET = 4, + MFRR_ADDR_OFFSET = 12, }; // Notes: @@ -77,7 +78,7 @@ class InterruptMsgHdlr : public MessageHandler InterruptMsgHdlr(MessageQueue * i_msgQ) : MessageHandler(NULL,i_msgQ) {} - /** + /** * Destructor. */ virtual ~InterruptMsgHdlr() {}; @@ -104,10 +105,10 @@ class InterruptMsgHdlr : public MessageHandler // The PIR chip id field has 1 extra bit (8 chips), so we need // to shift the node and chip separately - offset |= + offset |= (i_pir & P8_PIR_NODEID_MSK) << P8_IP_NODEID_LSL; - offset |= + offset |= (i_pir & P8_PIR_CHIPID_MSK) << P8_IP_CHIPID_LSL; // The core and thread id field are adjacent in both the PIR and @@ -118,7 +119,7 @@ class InterruptMsgHdlr : public MessageHandler return offset; } - + /** * Create the InterruptMsgHdlr to handle external interrupts * @param[in] i_msgQ The message queue @@ -138,6 +139,13 @@ class InterruptMsgHdlr : public MessageHandler */ static void addCpuCore(uint64_t i_pir); + /** + * Issue an IPI to the core. + * + * @param[in] i_pir - The PIR of the CPU to send IPI at. + */ + static void sendIPI(uint64_t i_pir); + private: static InterruptMsgHdlr * cv_instance; diff --git a/src/include/kernel/misc.H b/src/include/kernel/misc.H index 11677d250..f0fe0ffd0 100644 --- a/src/include/kernel/misc.H +++ b/src/include/kernel/misc.H @@ -90,6 +90,37 @@ namespace KernelMisc uint64_t iv_timebase; }; + /** @class WinkleAll + * + * @brief DeferredWork class for implementing cpu_all_winkle. + */ + class WinkleAll : public ::DeferredWork + { + public: + /** ctor + * + * @param i_caller - Task calling cpu_all_winkle to be restored + * after winkle is complete. + * + */ + WinkleAll(task_t* i_caller) : + iv_caller(i_caller), iv_timebase(0), iv_firstThread(0) {}; + + void masterPreWork(); + void activeMainWork(); + void masterPostWork(); + void nonactiveMainWork(); + + private: + /** Caller of cpu_all_winkle() */ + task_t* iv_caller; + /** Current time-base value for restore after winkle. */ + uint64_t iv_timebase; + /** Sync value for first thread to wake up. */ + uint64_t iv_firstThread; + + }; + /** @fn expand_full_cache * * @brief Expands the image footprint from a half-cache to full-cache @@ -123,14 +154,13 @@ namespace KernelMisc * * NOTE: This function is a wrapper function for writeScratchReg that * takes care of modifying the scratch register address value depending - * on the getCPUType. The writeScratchReg takes the scratch address + * on the getCPUType. The writeScratchReg takes the scratch address * passed in and puts that date in that register using assembly code * * @param[in] uint64_t - scratch_addr - * @param[in] uint64_t - Data + * @param[in] uint64_t - Data */ void updateScratchReg(MMIO_Scratch_Register scratch_addr, uint64_t data); - }; #endif |
