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-rw-r--r--src/include/arch/memorymap.H25
-rw-r--r--src/include/arch/ppc.H30
2 files changed, 51 insertions, 4 deletions
diff --git a/src/include/arch/memorymap.H b/src/include/arch/memorymap.H
index 7b75f6363..1ea479d8c 100644
--- a/src/include/arch/memorymap.H
+++ b/src/include/arch/memorymap.H
@@ -39,8 +39,13 @@ constexpr uint64_t MMIO_OFFSET_PER_CHIP = (4*TERABYTE); //0x40000000000
constexpr uint64_t MMIO_OFFSET_PER_GROUP = (32*TERABYTE); //0x200000000000
constexpr uint64_t MMIO_BASE = 0x6000000000000;
+
/**
* @brief Compute MMIO value for a given chip and base value
+ * @param[in] i_baseAddr group0-chip0 address
+ * @param[in] i_group Fabric Group ID to compute address for
+ * @param[in] i_chip Fabric Chip ID to compute address for
+ * @return Fully qualified memory address
*/
inline uint64_t computeMemoryMapOffset( uint64_t i_baseAddr,
uint8_t i_group,
@@ -52,6 +57,26 @@ inline uint64_t computeMemoryMapOffset( uint64_t i_baseAddr,
};
/**
+ * @brief Determine fabric id from a MMIO address
+ * @param[in] i_addr position-specific memory address
+ * @param[out] i_group Fabric Group ID to compute address for
+ * @param[out] i_chip Fabric Chip ID to compute address for
+ */
+inline void getFabricIdFromAddr( uint64_t i_addr,
+ uint8_t& o_group,
+ uint8_t& o_chip )
+{
+ // chop off any high-order offset
+ uint64_t l_addr = i_addr % MMIO_BASE;
+ // use integer math to get the group id
+ o_group = l_addr / MMIO_OFFSET_PER_GROUP;
+ // chop off the group
+ l_addr = l_addr % MMIO_OFFSET_PER_GROUP;
+ // use integer math to get the chip id
+ o_chip = l_addr % MMIO_OFFSET_PER_CHIP;
+};
+
+/**
* @brief A few default values that will need to be known
* by low-level code
*/
diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index 4d1762db7..b9b8df7ee 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -417,6 +417,24 @@ inline void writeScratchReg(uint64_t _scratch_addr, uint64_t _data)
}
+#ifdef __HOSTBOOT_RUNTIME
+
+/** @brief getDarn - deliver a random number instruction
+ * Returns 64 bits of random data, requires random number generator
+ * configured appropriately + locked down, only available at runtime.
+ */
+ALWAYS_INLINE
+inline uint64_t getDarn()
+{
+ register uint64_t rt = 0;
+ asm volatile(".long 0x7C0105E6 | "
+ "((%0 & 0x1F) << 21)" :
+ "=r" (rt));
+ return rt;
+}
+
+#endif
+
/** @brief This is a special assembler instruction that is a nop on
* regular hardware, but has special meaning to Simics. Code that
* executes this instruction in Simics will cause a "hap," a
@@ -457,10 +475,12 @@ inline void MAGIC_INSTRUCTION(int _n)
{
register int n = _n;
isync();
- asm volatile("rlwimi %0,%0,0,%1,%2" \
- :: "i" (((n) >> 8) & 0x1f), \
- "i" (((n) >> 4) & 0xf), \
- "i" ((((n) >> 0) & 0xf) | 16)); \
+ long register r3 asm("r3");
+ asm volatile("rlwimi %1,%1,0,%2,%3" \
+ : "=r"(r3) : "i" (((n) >> 8) & 0x1f), \
+ "i" (((n) >> 4) & 0xf), \
+ "i" ((((n) >> 0) & 0xf) | 16), \
+ "r"(r3)); \
}
// Simics components that we can raise log levels for
@@ -503,6 +523,7 @@ enum
MAGIC_FAKEPAYLOAD_ENTER = 7010, // Entered the fake payload.
MAGIC_SIMICS_CHECK = 7011, // Check if system is running on simics
MAGIC_LOAD_PAYLOAD = 7012, // load payload from flash
+ MAGIC_HB_DUMP = 7014, // Create a hostboot dump
MAGIC_BREAK_ON_ERROR = 7018, // Breakpoint in error cases if
// env var HB_BREAK_ON_ERROR
MAGIC_GET_SBE_TRACES = 7019, // Collect SBE traces
@@ -512,6 +533,7 @@ enum
MAGIC_TOGGLE_OUTPUT = 7023, // Enable simic log capture
MAGIC_CONTINUOUS_TRACE = 7055, // extract mixed trace buffer
+ MAGIC_GCOV_MODULE_UNLOAD = 7056, // extract gcov info
// 8000-8999 are defined by the Simics CEC team
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